From: Tengfei Fan <quic_tengfan@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Viken Dadhaniya <quic_vdadhani@quicinc.com>,
<andersson@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <conor+dt@kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <quic_msavaliy@quicinc.com>, <quic_anupkulk@quicinc.com>,
Tingwei <quic_tingweiz@quicinc.com>,
"Aiqun(Maria) Yu" <quic_aiquny@quicinc.com>
Subject: Re: [PATCH v1] arm64: dts: qcom: sa8775p: Add UART node
Date: Mon, 29 Jul 2024 18:47:03 +0800 [thread overview]
Message-ID: <f1d987d3-d1fc-4c3c-af4e-b23833c936d0@quicinc.com> (raw)
In-Reply-To: <f5ed3285-82da-4ba8-9b4d-a0cc7323fde4@linaro.org>
On 7/10/2024 6:39 PM, Konrad Dybcio wrote:
> On 10.07.2024 11:47 AM, Krzysztof Kozlowski wrote:
>> On 10/07/2024 11:41, Viken Dadhaniya wrote:
>>> Add missing UART configuration for sa8775.
>>>
>>> Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
>>> ---
>>> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 231 ++++++++++++++++++++++++++
>>> 1 file changed, 231 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> index 23f1b2e5e624..c107ee40341d 100644
>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> @@ -1,6 +1,7 @@
>>> // SPDX-License-Identifier: BSD-3-Clause
>>> /*
>>> * Copyright (c) 2023, Linaro Limited
>>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>>> */
>>>
>>> #include <dt-bindings/interconnect/qcom,icc.h>
>>> @@ -657,6 +658,21 @@
>>> status = "disabled";
>>> };
>>>
>>> + uart14: serial@880000 {
>>> + compatible = "qcom,geni-uart";
>>> + reg = <0x0 0x00880000 0x0 0x4000>;
>>> + interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
>>> + clock-names = "se";
>>> + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
>>> + &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
>>> + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
>>> + &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;
>>> + interconnect-names = "qup-core", "qup-config";
>>> + power-domains = <&rpmhpd SA8775P_CX>;
>>
>> All the clocks, interconenct and power domains look to me questionable.
>> AFAIK, most of it (if not all) is going to be removed.
>
> Yeah.. I'm lukewarm on accepting any sa8775p changes until that qcs9100(?)
> situation is squared out first
>
> Konrad
After considering the feedback provided on the subject, We have decided
to keep current SA8775p compatible and ABI compatibility in drivers.
Therefore, this patch is still needed, please continue to review this
patch.
Thank you for your input.
--
Thx and BRs,
Tengfei Fan
prev parent reply other threads:[~2024-07-29 10:47 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-10 9:41 [PATCH v1] arm64: dts: qcom: sa8775p: Add UART node Viken Dadhaniya
2024-07-10 9:47 ` Krzysztof Kozlowski
2024-07-10 10:39 ` Konrad Dybcio
2024-07-11 5:04 ` Viken Dadhaniya
2024-07-11 6:17 ` Krzysztof Kozlowski
2024-07-12 9:32 ` Viken Dadhaniya
2024-07-12 17:16 ` Krzysztof Kozlowski
2024-07-29 10:47 ` Tengfei Fan [this message]
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