[PATCH 0/7] arm64: qcom: sda660-ifc6560: enable GPU and WiFi support

[PATCH 0/7] arm64: qcom: sda660-ifc6560: enable GPU and WiFi support

[Dmitry Baryshkov]

Follow the MSM8998 example and limit num_context_banks on SDM630 /
SDM660 platforms. This allows Linux to make use of the A2NOC and KGSL
SMMU, making it possible to enable GPU and WiFi on those platforms, and,
in particular, Inforce IFC6560 SBC.

Note, while WiFI starts up and can work for a short amount of time, MSS
starts crashing with the following message:

qcom-q6v5-mss 4080000.remoteproc: fatal error received: dog_hb.c:266:Task starvation: diag, ping: 4, triage with owner(d.dump 0xde5825

Note2: DTS changes should be applied only after IOMMU chages get merged.
If it is not possible to get IOMMU changes into 6.12 in its last days of
the merge window, I'd kindly ask for the immutable branch from the iommu
subsys to be submerged into MSM tree.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Dmitry Baryshkov (7):
      iommu/arm-smmu-qcom: apply num_context_bank fixes for SDM630 / SDM660
      arm64: dts: qcom: sdm630: enable GPU SMMU and GPUCC
      arm64: dts: qcom: sda660-ifc6560: enable GPU
      arm64: dts: qcom: sda660-ifc6560: fix l10a voltage ranges
      arm64: dts: qcom: sdm630: enable A2NOC and LPASS SMMU
      arm64: dts: qcom: sdm630: add WiFI device node
      arm64: dts: qcom: sda660-ifc6560: enable mDSP and WiFi devices

 .../arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts | 32 +++++++++++++++++-
 arch/arm64/boot/dts/qcom/sdm630.dtsi               | 38 ++++++++++++++++++----
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c         | 11 +++++++
 3 files changed, 73 insertions(+), 8 deletions(-)
---
base-commit: f70cb2e8ce3f8883a526a28f93b7744d1a1a9ce0
change-id: 20240403-sdm660-wifi-a58e87b8f7d1

Best regards,
-- 
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

[PATCH 1/7] iommu/arm-smmu-qcom: apply num_context_bank fixes for SDM630 / SDM660

[Dmitry Baryshkov]

The Qualcomm SDM630 / SDM660 platform requires the same kind of
workaround as MSM8998: some IOMMUs have context banks reserved by
firmware / TZ, touching those banks resets the board.

Apply the num_context_bank workaround to those two SMMU devices in order
to allow them to be used by Linux.

Fixes: b812834b5329 ("iommu: arm-smmu-qcom: Add sdm630/msm8998 compatibles for qcom quirks")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 087fb4f6f4d3..13a3e3585c89 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -288,6 +288,12 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
 	 */
 	if (of_device_is_compatible(smmu->dev->of_node, "qcom,msm8998-smmu-v2") && smmu->num_context_banks == 13)
 		smmu->num_context_banks = 12;
+	else if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm630-smmu-v2")) {
+		if (smmu->num_context_banks == 21) /* SDM630 / SDM660 A2NOC SMMU */
+			smmu->num_context_banks = 7;
+		else if (smmu->num_context_banks == 14) /* SDM630 / SDM660 LPASS SMMU */
+			smmu->num_context_banks = 13;
+	}
 
 	/*
 	 * Some platforms support more than the Arm SMMU architected maximum of
@@ -350,6 +356,11 @@ static int qcom_adreno_smmuv2_cfg_probe(struct arm_smmu_device *smmu)
 	/* Support for 16K pages is advertised on some SoCs, but it doesn't seem to work */
 	smmu->features &= ~ARM_SMMU_FEAT_FMT_AARCH64_16K;
 
+	/* TZ protects several last context banks, hide them from Linux */
+	if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm630-smmu-v2") &&
+	    smmu->num_context_banks == 5)
+		smmu->num_context_banks = 2;
+
 	return 0;
 }
 

-- 
2.39.2

[PATCH 2/7] arm64: dts: qcom: sdm630: enable GPU SMMU and GPUCC

[Dmitry Baryshkov]

Now as the arm-smmu-qcom driver gained workarounds for the Adreno SMMU,
it becomes possible to safely enable GPU on the devices. Enable GPU SMMU
and GPU clock controller. GPU should be enabled for target devices that
have ZAP shader blob.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index c8da5cb8d04e..40ad99d75738 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1186,8 +1186,6 @@ kgsl_smmu: iommu@5040000 {
 				<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>;
-
-			status = "disabled";
 		};
 
 		gpucc: clock-controller@5065000 {
@@ -1203,7 +1201,6 @@ gpucc: clock-controller@5065000 {
 			clock-names = "xo",
 				      "gcc_gpu_gpll0_clk",
 				      "gcc_gpu_gpll0_div_clk";
-			status = "disabled";
 		};
 
 		lpass_smmu: iommu@5100000 {

-- 
2.39.2

[PATCH 3/7] arm64: dts: qcom: sda660-ifc6560: enable GPU

[Dmitry Baryshkov]

Enable Adreno GPU on the Inforce IFC6560 SBC. It requires the Zap shader
binary that was provided by the vendor.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts | 8 ++++++++
 arch/arm64/boot/dts/qcom/sdm630.dtsi                | 4 ++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
index 60412281ab27..ac0197624c09 100644
--- a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
+++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
@@ -110,6 +110,14 @@ vreg_l10a_1p8: vreg-l10a-regulator {
 	};
 };
 
+&adreno_gpu {
+	status = "okay";
+};
+
+&adreno_gpu_zap {
+	firmware-name = "qcom/sda660/a512_zap.mbn";
+};
+
 &adsp_pil {
 	firmware-name = "qcom/sda660/adsp.mbn";
 };
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 40ad99d75738..92695375a63b 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1150,6 +1150,10 @@ opp-160000000 {
 					opp-supported-hw = <0xff>;
 				};
 			};
+
+			adreno_gpu_zap: zap-shader {
+				memory-region = <&zap_shader_region>;
+			};
 		};
 
 		kgsl_smmu: iommu@5040000 {

-- 
2.39.2

[PATCH 4/7] arm64: dts: qcom: sda660-ifc6560: fix l10a voltage ranges

[Dmitry Baryshkov]

L10A, being a fixed regulator, should have min_voltage = max_voltage,
otherwise fixed rulator fails to probe. Fix the max_voltage range to be
equal to minimum.

Fixes: 4edbcf264fe2 ("arm64: dts: qcom: sda660-ifc6560: document missing USB PHY supplies")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
index ac0197624c09..09bc010ce56a 100644
--- a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
+++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
@@ -104,7 +104,7 @@ vreg_l10a_1p8: vreg-l10a-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vreg_l10a_1p8";
 		regulator-min-microvolt = <1804000>;
-		regulator-max-microvolt = <1896000>;
+		regulator-max-microvolt = <1804000>;
 		regulator-always-on;
 		regulator-boot-on;
 	};

-- 
2.39.2

[PATCH 5/7] arm64: dts: qcom: sdm630: enable A2NOC and LPASS SMMU

[Dmitry Baryshkov]

Now as the arm-smmu-qcom driver gained workarounds for the A2NOC and
LPASS SMMU devices, enable those two devices.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 92695375a63b..dc8bc63bdc70 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -665,8 +665,6 @@ anoc2_smmu: iommu@16c0000 {
 				<GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
-
-			status = "disabled";
 		};
 
 		a2noc: interconnect@1704000 {
@@ -1234,8 +1232,6 @@ lpass_smmu: iommu@5100000 {
 				<GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 				<GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>;
-
-			status = "disabled";
 		};
 
 		sram@290000 {

-- 
2.39.2

[PATCH 6/7] arm64: dts: qcom: sdm630: add WiFI device node

[Dmitry Baryshkov]

Add device node for the WiFi device being a part of the integrated
SDM660 / SDM630 platforms.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index dc8bc63bdc70..4536fa45869a 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -2412,6 +2412,33 @@ intc: interrupt-controller@17a00000 {
 			redistributor-stride = <0x0 0x20000>;
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		wifi: wifi@18800000 {
+			compatible = "qcom,wcn3990-wifi";
+			reg = <0x18800000 0x800000>;
+			reg-names = "membase";
+			memory-region = <&wlan_msa_mem>;
+			clocks = <&rpmcc RPM_SMD_RF_CLK1_PIN>;
+			clock-names = "cxo_ref_clk_pin";
+			interrupts =
+				<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
+			iommus = <&anoc2_smmu 0x1a00>,
+				 <&anoc2_smmu 0x1a01>;
+			qcom,snoc-host-cap-8bit-quirk;
+			qcom,no-msa-ready-indicator;
+			status = "disabled";
+		};
 	};
 
 	sound: sound {

-- 
2.39.2

[PATCH 7/7] arm64: dts: qcom: sda660-ifc6560: enable mDSP and WiFi devices

[Dmitry Baryshkov]

Enable the onboard WiFi device present on the Inforce IFC6560 SBC.
Pretty much like MSM8998 this device also doesn't generate the
MSA_READY_IND indication.

For the reference:

ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0xff soc_id 0x40050000
ath10k_snoc 18800000.wifi: qmi fw_version 0x101d01da fw_build_timestamp 2018-07-26 21:42 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.1.0.1.c2-00474-QCAHLSWMTPLZ-1
ath10k_snoc 18800000.wifi: qmi not waiting for msa_ready indicator
ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000
ath10k_snoc 18800000.wifi: kconfig debug 1 debugfs 0 tracing 0 dfs 0 testmode 0
ath10k_snoc 18800000.wifi: firmware ver  api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790
ath10k_snoc 18800000.wifi: htt-ver 3.54 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1
ath10k_snoc 18800000.wifi: invalid MAC address; choosing random

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

---
Cc: ath11k@lists.infradead.org
Cc: Kalle Valo <kvalo@kernel.org>
---
 .../arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
index 09bc010ce56a..7948c8f6ab64 100644
--- a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
+++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
@@ -252,6 +252,11 @@ &qusb2phy1 {
 	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
 };
 
+&remoteproc_mss {
+	firmware-name = "qcom/sda660/mba.mbn", "qcom/sda660/modem.mbn";
+	status = "okay";
+};
+
 &rpm_requests {
 	regulators-0 {
 		compatible = "qcom,rpm-pm660-regulators";
@@ -291,6 +296,11 @@ vreg_l1a_1p225: l1 {
 			regulator-allow-set-load;
 		};
 
+		vreg_l5a_0p8: l5 {
+			regulator-min-microvolt = <848000>;
+			regulator-max-microvolt = <848000>;
+		};
+
 		vreg_l6a_1p3: l6 {
 			regulator-min-microvolt = <1304000>;
 			regulator-max-microvolt = <1368000>;
@@ -489,3 +499,15 @@ &usb3_qmpphy {
 	vdda-pll-supply = <&vreg_l10a_1p8>;
 	status = "okay";
 };
+
+&wifi {
+	status = "okay";
+
+	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
+	vdd-1.8-xo-supply = <&vreg_l9a_1p8>;
+	vdd-1.3-rfa-supply = <&vreg_l6a_1p3>;
+	vdd-3.3-ch0-supply = <&vreg_l19a_3p3>;
+	vdd-3.3-ch1-supply = <&vreg_l8b_3p3>;
+
+	qcom,ath10k-calibration-variant = "Inforce_IFC6560";
+};

-- 
2.39.2

Re: [PATCH 1/7] iommu/arm-smmu-qcom: apply num_context_bank fixes for SDM630 / SDM660

[Bjorn Andersson]

On Sat, Sep 07, 2024 at 09:48:12PM GMT, Dmitry Baryshkov wrote:
> The Qualcomm SDM630 / SDM660 platform requires the same kind of
> workaround as MSM8998: some IOMMUs have context banks reserved by
> firmware / TZ, touching those banks resets the board.
> 
> Apply the num_context_bank workaround to those two SMMU devices in order
> to allow them to be used by Linux.
> 
> Fixes: b812834b5329 ("iommu: arm-smmu-qcom: Add sdm630/msm8998 compatibles for qcom quirks")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Reviewed-by: Bjorn Andersson <andersson@kernel.org>

> ---
>  drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> index 087fb4f6f4d3..13a3e3585c89 100644
> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
> @@ -288,6 +288,12 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
>  	 */
>  	if (of_device_is_compatible(smmu->dev->of_node, "qcom,msm8998-smmu-v2") && smmu->num_context_banks == 13)
>  		smmu->num_context_banks = 12;

This should now be wrapped in {}

Regards,
Bjorn

> +	else if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm630-smmu-v2")) {
> +		if (smmu->num_context_banks == 21) /* SDM630 / SDM660 A2NOC SMMU */
> +			smmu->num_context_banks = 7;
> +		else if (smmu->num_context_banks == 14) /* SDM630 / SDM660 LPASS SMMU */
> +			smmu->num_context_banks = 13;
> +	}
>  
>  	/*
>  	 * Some platforms support more than the Arm SMMU architected maximum of
> @@ -350,6 +356,11 @@ static int qcom_adreno_smmuv2_cfg_probe(struct arm_smmu_device *smmu)
>  	/* Support for 16K pages is advertised on some SoCs, but it doesn't seem to work */
>  	smmu->features &= ~ARM_SMMU_FEAT_FMT_AARCH64_16K;
>  
> +	/* TZ protects several last context banks, hide them from Linux */
> +	if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm630-smmu-v2") &&
> +	    smmu->num_context_banks == 5)
> +		smmu->num_context_banks = 2;
> +
>  	return 0;
>  }
>  
> 
> -- 
> 2.39.2
> 

Re: [PATCH 2/7] arm64: dts: qcom: sdm630: enable GPU SMMU and GPUCC

[Konrad Dybcio]

On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> Now as the arm-smmu-qcom driver gained workarounds for the Adreno SMMU,
> it becomes possible to safely enable GPU on the devices. Enable GPU SMMU
> and GPU clock controller. GPU should be enabled for target devices that
> have ZAP shader blob.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>

Konrad

Re: [PATCH 3/7] arm64: dts: qcom: sda660-ifc6560: enable GPU

[Konrad Dybcio]

On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> Enable Adreno GPU on the Inforce IFC6560 SBC. It requires the Zap shader
> binary that was provided by the vendor.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>

May I ask you to rename adreno_gpu to gpu for consistency
with other DTs?

Konrad

Re: [PATCH 5/7] arm64: dts: qcom: sdm630: enable A2NOC and LPASS SMMU

[Konrad Dybcio]

On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> Now as the arm-smmu-qcom driver gained workarounds for the A2NOC and
> LPASS SMMU devices, enable those two devices.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>

Konrad

Re: [PATCH 4/7] arm64: dts: qcom: sda660-ifc6560: fix l10a voltage ranges

[Konrad Dybcio]

On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> L10A, being a fixed regulator, should have min_voltage = max_voltage,
> otherwise fixed rulator fails to probe. Fix the max_voltage range to be
> equal to minimum.
> 
> Fixes: 4edbcf264fe2 ("arm64: dts: qcom: sda660-ifc6560: document missing USB PHY supplies")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---

Oops

Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>

Konrad

Re: [PATCH 6/7] arm64: dts: qcom: sdm630: add WiFI device node

[Konrad Dybcio]

On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> Add device node for the WiFi device being a part of the integrated
> SDM660 / SDM630 platforms.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sdm630.dtsi | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index dc8bc63bdc70..4536fa45869a 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -2412,6 +2412,33 @@ intc: interrupt-controller@17a00000 {
>  			redistributor-stride = <0x0 0x20000>;
>  			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
>  		};
> +
> +		wifi: wifi@18800000 {
> +			compatible = "qcom,wcn3990-wifi";
> +			reg = <0x18800000 0x800000>;
> +			reg-names = "membase";
> +			memory-region = <&wlan_msa_mem>;
> +			clocks = <&rpmcc RPM_SMD_RF_CLK1_PIN>;
> +			clock-names = "cxo_ref_clk_pin";
> +			interrupts =
> +				<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,

Please unbreak this line

Konrad

Re: [PATCH 7/7] arm64: dts: qcom: sda660-ifc6560: enable mDSP and WiFi devices

[Konrad Dybcio]

On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> Enable the onboard WiFi device present on the Inforce IFC6560 SBC.
> Pretty much like MSM8998 this device also doesn't generate the
> MSA_READY_IND indication.
> 
> For the reference:
> 
> ath10k_snoc 18800000.wifi: qmi chip_id 0x30214 chip_family 0x4001 board_id 0xff soc_id 0x40050000
> ath10k_snoc 18800000.wifi: qmi fw_version 0x101d01da fw_build_timestamp 2018-07-26 21:42 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.1.0.1.c2-00474-QCAHLSWMTPLZ-1
> ath10k_snoc 18800000.wifi: qmi not waiting for msa_ready indicator
> ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000
> ath10k_snoc 18800000.wifi: kconfig debug 1 debugfs 0 tracing 0 dfs 0 testmode 0
> ath10k_snoc 18800000.wifi: firmware ver  api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790
> ath10k_snoc 18800000.wifi: htt-ver 3.54 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1
> ath10k_snoc 18800000.wifi: invalid MAC address; choosing random
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> ---
> Cc: ath11k@lists.infradead.org
> Cc: Kalle Valo <kvalo@kernel.org>
> ---
>  .../arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> index 09bc010ce56a..7948c8f6ab64 100644
> --- a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts
> @@ -252,6 +252,11 @@ &qusb2phy1 {
>  	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
>  };
>  
> +&remoteproc_mss {
> +	firmware-name = "qcom/sda660/mba.mbn", "qcom/sda660/modem.mbn";
> +	status = "okay";
> +};
> +
>  &rpm_requests {
>  	regulators-0 {
>  		compatible = "qcom,rpm-pm660-regulators";
> @@ -291,6 +296,11 @@ vreg_l1a_1p225: l1 {
>  			regulator-allow-set-load;
>  		};
>  
> +		vreg_l5a_0p8: l5 {
> +			regulator-min-microvolt = <848000>;
> +			regulator-max-microvolt = <848000>;
> +		};
> +
>  		vreg_l6a_1p3: l6 {
>  			regulator-min-microvolt = <1304000>;
>  			regulator-max-microvolt = <1368000>;
> @@ -489,3 +499,15 @@ &usb3_qmpphy {
>  	vdda-pll-supply = <&vreg_l10a_1p8>;
>  	status = "okay";
>  };
> +
> +&wifi {
> +	status = "okay";

You placed status last in the addition above but not here :P

with that fixed:



Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>

Konrad

Re: [PATCH 3/7] arm64: dts: qcom: sda660-ifc6560: enable GPU

[Dmitry Baryshkov]

On Mon, 9 Sept 2024 at 13:55, Konrad Dybcio <konradybcio@kernel.org> wrote:
>
> On 7.09.2024 8:48 PM, Dmitry Baryshkov wrote:
> > Enable Adreno GPU on the Inforce IFC6560 SBC. It requires the Zap shader
> > binary that was provided by the vendor.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
>
> Reviewed-by: Konrad Dybcio <konradybcio@kernel.org>
>
> May I ask you to rename adreno_gpu to gpu for consistency
> with other DTs?

Yeah, I thought about it, but it would also require reworking existing DTs.

I'll do it.


-- 
With best wishes
Dmitry

Re: [PATCH 0/7] arm64: qcom: sda660-ifc6560: enable GPU and WiFi support

[Will Deacon]

On Sat, 07 Sep 2024 21:48:11 +0300, Dmitry Baryshkov wrote:
> Follow the MSM8998 example and limit num_context_banks on SDM630 /
> SDM660 platforms. This allows Linux to make use of the A2NOC and KGSL
> SMMU, making it possible to enable GPU and WiFi on those platforms, and,
> in particular, Inforce IFC6560 SBC.
> 
> Note, while WiFI starts up and can work for a short amount of time, MSS
> starts crashing with the following message:
> 
> [...]

Applied SMMU driver change to will (for-joerg/arm-smmu/updates), thanks!

[1/7] iommu/arm-smmu-qcom: apply num_context_bank fixes for SDM630 / SDM660
      https://git.kernel.org/will/c/19eb465c969f

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

Re: (subset) [PATCH 0/7] arm64: qcom: sda660-ifc6560: enable GPU and WiFi support

[Bjorn Andersson]

On Sat, 07 Sep 2024 21:48:11 +0300, Dmitry Baryshkov wrote:
> Follow the MSM8998 example and limit num_context_banks on SDM630 /
> SDM660 platforms. This allows Linux to make use of the A2NOC and KGSL
> SMMU, making it possible to enable GPU and WiFi on those platforms, and,
> in particular, Inforce IFC6560 SBC.
> 
> Note, while WiFI starts up and can work for a short amount of time, MSS
> starts crashing with the following message:
> 
> [...]

Applied, thanks!

[2/7] arm64: dts: qcom: sdm630: enable GPU SMMU and GPUCC
      commit: 166b955a8d60b38d4fbbb9a18994a49e607ab17e
[3/7] arm64: dts: qcom: sda660-ifc6560: enable GPU
      commit: deac51aedd1e1e5ba0d46f23ef0012a8754e4871
[4/7] arm64: dts: qcom: sda660-ifc6560: fix l10a voltage ranges
      commit: 1dd7d9d41dedf8d42e04c0f2febd4dbe5a062d4a
[5/7] arm64: dts: qcom: sdm630: enable A2NOC and LPASS SMMU
      commit: 41caaf517014d11c17b2e6f3b057f7b6c9507cb0
[6/7] arm64: dts: qcom: sdm630: add WiFI device node
      commit: d7e67846c08f46974da26c54af7793d47037d452
[7/7] arm64: dts: qcom: sda660-ifc6560: enable mDSP and WiFi devices
      commit: 04d8ed02cb9b86a0e231ae0271527fbbfb411695

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>