From: Claudiu Beznea <claudiu.beznea@kernel.org>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: geert+renesas@glider.be, linusw@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, magnus.damm@gmail.com,
claudiu.beznea@tuxon.dev, linux-renesas-soc@vger.kernel.org,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH 9/9] arm64: dts: renesas: rzg3s-smarc-som: Enable I3C
Date: Fri, 22 May 2026 16:01:48 +0300 [thread overview]
Message-ID: <f2ffcf92-34b7-40e8-877c-669c2d320506@kernel.org> (raw)
In-Reply-To: <ahBMKWrKQDko3cG8@shikoro>
Hi, Wolfram,
On 5/22/26 15:29, Wolfram Sang wrote:
> Hi Claudiu,
>
>> + i3c_pins: i3c {
>> + pins = "I3C_SDA", "I3C_SCL";
>> +#if SW_CONFIG4 == SW_ON
>> + power-source = <1200>;
>> +#else
>> + power-source = <1800>;
>> +#endif
>> + input-enable;
>> + renesas,i3c-standby = <0>;
>> + };
>> +
>> + i3c_standby_pins: i3c-standby {
>> + pins = "I3C_SDA", "I3C_SCL";
>> +#if SW_CONFIG4 == SW_ON
>> + power-source = <1200>;
>> +#else
>> + power-source = <1800>;
>> +#endif
>> + renesas,i3c-standby = <1>;
>> + };
>
> That doesn't look like HW description to me because the pins are the
> same for regular and standby mode.
Yes, same pins, different states. Isn't that the role of different pinctrl
entries in DT for the same node? E.g., for SHDI we use the same approach, same
pins but different states. Bellow is an example from RZ/G3S but same approach is
used for other Renesas SoCs as well:
https://elixir.bootlin.com/linux/v7.1-rc4/source/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi#L305
https://elixir.bootlin.com/linux/v7.1-rc4/source/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi#L321
> Their state is changed when powering
> down, but that should not need DT encoding, I'd think. The driver should
> know what to do, or?
Through different pinctrl states different pinctrl settings are applied in the
pin controller HW by calling well known pinctrl APIs from the consumer drivers
(e.g. pinctrl_pm_select_sleep_state() in case of the I3C driver as proposed in [1]).
Is there another way the I3C driver (or any pinctrl driver consumer) could apply
pinctrl settings?
[1] https://lore.kernel.org/all/20260522101815.1722909-18-claudiu.beznea@kernel.org
--
Thank you,
Claudiu
prev parent reply other threads:[~2026-05-22 13:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 10:22 [PATCH 0/9] pinctrl: renesas: rzg2l: Add support for RZ/G3S I3C Claudiu Beznea
2026-05-22 10:22 ` [PATCH 1/9] pinctrl: renesas: rzg2l: Generalize the power source code Claudiu Beznea
2026-05-22 10:22 ` [PATCH 2/9] pinctrl: renesas: rzg2l: Drop defines present in struct rzg2l_hwcfg Claudiu Beznea
2026-05-22 10:22 ` [PATCH 3/9] pinctrl: renesas: rzg2l: Keep member documentation aligned Claudiu Beznea
2026-05-22 10:22 ` [PATCH 4/9] pinctrl: renesas: rzg2l: Use tab instead of spaces Claudiu Beznea
2026-05-22 10:22 ` [PATCH 5/9] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the missing I3C power source option Claudiu Beznea
2026-05-22 16:11 ` Conor Dooley
2026-05-22 10:22 ` [PATCH 6/9] pinctrl: renesas: rzg2l: Add RZ/G3S support for selecting the I3C power source Claudiu Beznea
2026-05-22 10:22 ` [PATCH 7/9] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Document the I3C standby property Claudiu Beznea
2026-05-22 12:30 ` Wolfram Sang
2026-05-22 10:22 ` [PATCH 8/9] pinctrl: renesas: rzg2l: Add RZ/G3S support for selecting the I3C standby state Claudiu Beznea
2026-05-22 10:22 ` [PATCH 9/9] arm64: dts: renesas: rzg3s-smarc-som: Enable I3C Claudiu Beznea
2026-05-22 12:29 ` Wolfram Sang
2026-05-22 13:01 ` Claudiu Beznea [this message]
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