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[82.64.67.166]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47763e4d7f2sm15640615e9.4.2025.11.06.05.07.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Nov 2025 05:07:39 -0800 (PST) Message-ID: Date: Thu, 6 Nov 2025 14:07:38 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Neil Armstrong Reply-To: Neil Armstrong Subject: Re: [PATCH 2/5] irqchip: Add support for Amlogic S6 S7 and S7D SoCs To: xianwei.zhao@amlogic.com, Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Heiner Kallweit Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org References: <20251105-irqchip-gpio-s6-s7-s7d-v1-0-b4d1fe4781c1@amlogic.com> <20251105-irqchip-gpio-s6-s7-s7d-v1-2-b4d1fe4781c1@amlogic.com> Content-Language: en-US, fr Autocrypt: addr=neil.armstrong@linaro.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/5/25 10:45, Xianwei Zhao via B4 Relay wrote: > From: Xianwei Zhao > > The Amlogic S6/S7/S7D SoCs support 12 GPIO IRQ lines, > details are as below. > > S6 IRQ Number: > - 99:98 2 pins on bank CC > - 97 1 pin on bank TESTN > - 96:81 16 pins on bank A > - 80:65 16 pins on bank Z > - 64:45 20 pins on bank X > - 44:37 8 pins on bank H offs H1 > - 36:32 5 pins on bank F > - 31:25 7 pins on bank D > - 24:22 3 pins on bank E > - 21:14 8 pins on bank C > - 13:0 14 pins on bank B > > S7 IRQ Number: > - 83:82 2 pins on bank CC > - 81 1 pin on bank TESTN > - 80:68 13 pins on bank Z > - 67:48 20 pins on bank X > - 47:36 12 pins on bank H > - 35:24 12 pins on bank D > - 23:22 2 pins on bank E > - 21:14 8 pins on bank C > - 13:0 14 pins on bank B > > S7D IRQ Number: > - 83:82 2 pins on bank CC > - 81:75 7 pins on bank DV > - 74 1 pin on bank TESTN > - 73:61 13 pins on bank Z > - 60:41 20 pins on bank X > - 40:29 12 pins on bank H > - 28:24 5 pins on bank D > - 23:22 2 pins on bank E > - 21:14 8 pins on bank C > - 13:0 14 pins on bank B > > Signed-off-by: Xianwei Zhao > --- > drivers/irqchip/irq-meson-gpio.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/irqchip/irq-meson-gpio.c b/drivers/irqchip/irq-meson-gpio.c > index 7d177626d64b..7e718b07e960 100644 > --- a/drivers/irqchip/irq-meson-gpio.c > +++ b/drivers/irqchip/irq-meson-gpio.c > @@ -174,6 +174,14 @@ static const struct meson_gpio_irq_params s4_params = { > INIT_MESON_S4_COMMON_DATA(82) > }; > > +static const struct meson_gpio_irq_params s6_params = { > + INIT_MESON_S4_COMMON_DATA(100) > +}; > + > +static const struct meson_gpio_irq_params s7_params = { > + INIT_MESON_S4_COMMON_DATA(84) > +}; > + > static const struct meson_gpio_irq_params c3_params = { > INIT_MESON_S4_COMMON_DATA(55) > }; > @@ -195,6 +203,9 @@ static const struct of_device_id meson_irq_gpio_matches[] __maybe_unused = { > { .compatible = "amlogic,a4-gpio-ao-intc", .data = &a4_ao_params }, > { .compatible = "amlogic,a4-gpio-intc", .data = &a4_params }, > { .compatible = "amlogic,a5-gpio-intc", .data = &a5_params }, > + { .compatible = "amlogic,s6-gpio-intc", .data = &s6_params }, > + { .compatible = "amlogic,s7-gpio-intc", .data = &s7_params }, > + { .compatible = "amlogic,s7d-gpio-intc", .data = &s7_params }, > { .compatible = "amlogic,c3-gpio-intc", .data = &c3_params }, > { .compatible = "amlogic,t7-gpio-intc", .data = &t7_params }, > { } > Reviewed-by: Neil Armstrong