From: Judith Mendez <jm@ti.com>
To: Bhavya Kapoor <b-kapoor@ti.com>, <devicetree@vger.kernel.org>
Cc: <conor+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<robh+dt@kernel.org>, <kristo@kernel.org>, <vigneshr@ti.com>,
<nm@ti.com>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/3] arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode
Date: Tue, 5 Dec 2023 13:22:44 -0600 [thread overview]
Message-ID: <f3b5cc05-9a68-4319-a7fe-963123ae82c5@ti.com> (raw)
In-Reply-To: <20231201082045.790478-2-b-kapoor@ti.com>
Hi Bhavya,
On 12/1/23 2:20 AM, Bhavya Kapoor wrote:
> DDR52 speed mode is enabled for eMMC in J7200 but its Itap Delay Value
> is not present in the device tree. Thus, add Itap Delay Value for eMMC
> High Speed DDR which is DDR52 speed mode for J7200 SoC according to
> datasheet for J7200.
>
> [+] Refer to : section 7.9.5.16.1 MMCSD0 - eMMC Interface, in
> J7200 datasheet
> - https://www.ti.com/lit/ds/symlink/dra821u-q1.pdf
>
LGTM
Reviewed-by: Judith Mendez <jm@ti.com>
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 264913f83287..39ce465c8e00 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -647,6 +647,7 @@ main_sdhci0: mmc@4f80000 {
> ti,otap-del-sel-hs400 = <0x5>;
> ti,itap-del-sel-legacy = <0x10>;
> ti,itap-del-sel-mmc-hs = <0xa>;
> + ti,itap-del-sel-ddr52 = <0x3>;
> ti,strobe-sel = <0x77>;
> ti,clkbuf-sel = <0x7>;
> ti,trm-icp = <0x8>;
~ Judith
next prev parent reply other threads:[~2023-12-05 19:22 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 8:20 [PATCH 0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR Bhavya Kapoor
2023-12-01 8:20 ` [PATCH 1/3] arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode Bhavya Kapoor
2023-12-05 19:22 ` Judith Mendez [this message]
2023-12-01 8:20 ` [PATCH 2/3] arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 " Bhavya Kapoor
2023-12-05 19:24 ` Judith Mendez
2023-12-01 8:20 ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-main: " Bhavya Kapoor
2023-12-05 19:25 ` Judith Mendez
2023-12-05 18:31 ` [PATCH 0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR Kumar, Udit
2023-12-14 11:07 ` Bhavya Kapoor
2023-12-14 15:00 ` Kumar, Udit
2023-12-15 17:21 ` Nishanth Menon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f3b5cc05-9a68-4319-a7fe-963123ae82c5@ti.com \
--to=jm@ti.com \
--cc=b-kapoor@ti.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kristo@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nm@ti.com \
--cc=robh+dt@kernel.org \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).