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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Khristine Andreea Barbulescu
	<khristineandreea.barbulescu@oss.nxp.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Chester Lin <chester62515@gmail.com>,
	Matthias Brugger <mbrugger@suse.com>,
	Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
	Larisa Grigore <larisa.grigore@nxp.com>,
	Lee Jones <lee@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	Aisheng Dong <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Alberto Ruiz <aruizrui@redhat.com>,
	Christophe Lizzi <clizzi@redhat.com>,
	devicetree@vger.kernel.org, Enric Balletbo <eballetb@redhat.com>,
	Eric Chanudet <echanude@redhat.com>,
	imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	linux-kernel@vger.kernel.org, NXP S32 Linux Team <s32@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module
Date: Mon, 23 Mar 2026 09:07:54 +0100	[thread overview]
Message-ID: <f3ff461b-edd7-423a-ac99-e70145aaaaea@kernel.org> (raw)
In-Reply-To: <5f1b651b-1064-4280-a7e0-b7d66c396cde@oss.nxp.com>

On 23/03/2026 08:57, Khristine Andreea Barbulescu wrote:
> On 3/14/2026 9:31 AM, Arnd Bergmann wrote:
>> On Fri, Mar 13, 2026, at 18:10, Krzysztof Kozlowski wrote:
>>> On 25/02/2026 10:40, Ghennadi Procopciuc wrote:
>>>> On 2/23/2026 3:14 PM, Krzysztof Kozlowski wrote:
>>>>>> there are no resources allocated specifically for nodes like
>>>>>> "nxp,s32g-siul2-syscfg". Their consumers are the pinctrl/gpio
>>>>>> driver and other drivers that read SoC‑specific information from
>>>>>> those shared registers.
>>>>>>  
>>>>>> My alternative is to keep two separate syscon providers for the
>>>>>
>>>>> You got review already.
>>>>>
>>>> I still believe that nvmem is a suitable and accurate mechanism for
>>>> describing SoC‑specific identification information, as originally
>>>> proposed in [0], assuming the necessary adjustments are made.
>>>>
>>>> More specifically, instead of modeling software-defined cells, the nvmem
>>>> layout would describe the actual hardware registers backing this
>>>> information. One advantage of this approach is that consumer nodes (for
>>>> example PCIe, Ethernet, or other IPs that need SoC identification data)
>>>> can reference these registers using the standard nvmem-cells /
>>>> nvmem-cell-names mechanism, without introducing custom, per-subsystem
>>>> bindings.
>>>
>>> nvmem is applicable only if this is NVMEM. Information about the soc is
>>> not NVMEM, unless this are blow out fuses / efuse. Does not look like,
>>> because SoC information is set probably during design phase, not board
>>> assembly.
>>
>> Agreed, nvmem clearly makes no sense here, the patch description
>> appears to accurately describe the MMIO area as hardware registers
>> with a fixed meaning rather than a convention for how the
>> memory is being used.
>>
>> That said, there is probably room for improvement, since some of
>> the register contents are read-only and could just be accessed
>> by the boot firmware in order to move the information into more
>> regular DT properties instead of defining bindings for drivers
>> to access the information in raw form.
>>
>>     Arnd
> 
> Hi Krzysztof & Arnd,
> 
> Assuming we drop the syscon approach entirely, for the SerDes
> presence information we could follow Arnd’s suggestion and have
> it provided by the boot firmware instead of exposing it through SIUL2.

I think there is misunderstanding. By dropping syscon nodes, I meant to
drop the nodes. Remove them. It implies that whatever their contain must
go somewhere, right? Because your hardware is fixed and you cannot drop
it from the hardware, right?

So their parent node is the syscon.

Best regards,
Krzysztof

  reply	other threads:[~2026-03-23  8:08 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20 11:59 [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module Khristine Andreea Barbulescu
2026-01-21  2:19   ` Rob Herring
2026-02-19 11:36     ` Khristine Andreea Barbulescu
2026-02-20 10:16       ` Krzysztof Kozlowski
2026-02-20 14:36         ` Khristine Andreea Barbulescu
2026-02-20 14:41           ` Krzysztof Kozlowski
2026-02-23 11:51             ` Khristine Andreea Barbulescu
2026-02-23 13:14               ` Krzysztof Kozlowski
2026-02-25  9:40                 ` Ghennadi Procopciuc
2026-03-03 13:28                   ` Ghennadi Procopciuc
2026-03-13 17:10                   ` Krzysztof Kozlowski
2026-03-14  7:31                     ` Arnd Bergmann
2026-03-23  7:57                       ` Khristine Andreea Barbulescu
2026-03-23  8:07                         ` Krzysztof Kozlowski [this message]
2026-03-23 15:33                         ` Arnd Bergmann
2026-02-20 10:18       ` Krzysztof Kozlowski
2026-02-20 14:14         ` Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 02/10] mfd: nxp-siul2: add support for NXP SIUL2 Khristine Andreea Barbulescu
2026-01-22 18:52   ` Sander Vanheule
2026-01-20 11:59 ` [PATCH v8 03/10] arm64: dts: s32g: change pinctrl node into the new mfd node Khristine Andreea Barbulescu
2026-01-27  9:13   ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 04/10] pinctrl: s32cc: use dev_err_probe() and improve error messages Khristine Andreea Barbulescu
2026-01-20 12:04   ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 05/10] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-01-20 12:04   ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be probed as an MFD cell Khristine Andreea Barbulescu
2026-01-20 12:08   ` Bartosz Golaszewski
2026-01-23 13:57   ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 07/10] pinctrl: s32cc: skip syscon child nodes when parsing funcs and groups Khristine Andreea Barbulescu
2026-01-20 12:16   ` Bartosz Golaszewski
2026-01-27  9:14   ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 08/10] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-01-23 13:56   ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 09/10] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Khristine Andreea Barbulescu
2026-01-27  9:17   ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 10/10] pinctrl: s32cc: set num_custom_params to 0 Khristine Andreea Barbulescu
2026-01-20 12:16   ` Bartosz Golaszewski
2026-01-20 13:45     ` Daniel Baluta
2026-01-20 19:49 ` [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Rob Herring

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