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From: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
To: Jonathan Cameron <jic23@kernel.org>
Cc: robh@kernel.org, krzysztof.kozlowski@linaro.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, agross@kernel.org,
	andersson@kernel.org, lumag@kernel.org,
	dmitry.baryshkov@oss.qualcomm.com, konradybcio@kernel.org,
	daniel.lezcano@linaro.org, sboyd@kernel.org, amitk@kernel.org,
	thara.gopinath@gmail.com, lee@kernel.org, rafael@kernel.org,
	subbaraman.narayanamurthy@oss.qualcomm.com,
	david.collins@oss.qualcomm.com,
	anjelique.melendez@oss.qualcomm.com,
	kamal.wadhwa@oss.qualcomm.com, rui.zhang@intel.com,
	lukasz.luba@arm.com, devicetree@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	cros-qcom-dts-watchers@chromium.org, quic_kotarake@quicinc.com,
	neil.armstrong@linaro.org, stephan.gerhold@linaro.org
Subject: Re: [PATCH V7 4/5] iio: adc: Add support for QCOM PMIC5 Gen3 ADC
Date: Thu, 18 Sep 2025 01:17:30 +0530	[thread overview]
Message-ID: <f420c40f-f2a5-4b64-8e89-dfc6db042edc@oss.qualcomm.com> (raw)
In-Reply-To: <20250830184233.7ddf6ae8@jic23-huawei>

Hi Jonathan,

On 8/30/2025 11:12 PM, Jonathan Cameron wrote:
> On Tue, 26 Aug 2025 14:06:56 +0530
> Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> wrote:
> 
>> The ADC architecture on PMIC5 Gen3 is similar to that on PMIC5 Gen2,
>> with all SW communication to ADC going through PMK8550 which
>> communicates with other PMICs through PBS.
>>
>> One major difference is that the register interface used here is that
>> of an SDAM (Shared Direct Access Memory) peripheral present on PMK8550.
>> There may be more than one SDAM used for ADC5 Gen3 and each has eight
>> channels, which may be used for either immediate reads (same functionality
>> as previous PMIC5 and PMIC5 Gen2 ADC peripherals) or recurring measurements
>> (same as ADC_TM functionality).
>>
>> By convention, we reserve the first channel of the first SDAM for all
>> immediate reads and use the remaining channels across all SDAMs for
>> ADC_TM monitoring functionality.
>>
>> Add support for PMIC5 Gen3 ADC driver for immediate read functionality.
>> ADC_TM is implemented as an auxiliary thermal driver under this ADC
>> driver.
>>
>> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
> 
> Hi Jishnu,
> 
> A few additional comments from a fresh read through.
> 
> Thanks,
> 
> Jonathan
> 

....

>> +
>> +static int adc5_gen3_get_fw_channel_data(struct adc5_chip *adc,
>> +					 struct adc5_channel_prop *prop,
>> +					 struct fwnode_handle *fwnode)
>> +{
>> +	const char *name = fwnode_get_name(fwnode);
>> +	const struct adc5_data *data = adc->data;
>> +	u32 chan, value, varr[2], sid = 0;
> 
> Why initialize sid?

I think this is not needed, I'll remove it.
I'll also address all your other comments in the next patch series.

Thanks,
Jishnu

> 
>> +	struct device *dev = adc->dev;
>> +	const char *channel_name;
>> +	int ret;
>> +
>> +	ret = fwnode_property_read_u32(fwnode, "reg", &chan);
>> +	if (ret < 0)
>> +		return dev_err_probe(dev, ret, "invalid channel number %s\n",
>> +				     name);
>> +
>> +	/*
>> +	 * Value read from "reg" is virtual channel number
>> +	 * virtual channel number = sid << 8 | channel number
>> +	 */
>> +	sid = FIELD_GET(ADC5_GEN3_VIRTUAL_SID_MASK, chan);
>> +	chan = FIELD_GET(ADC5_GEN3_CHANNEL_MASK, chan);
> 
>> +	return 0;
>> +}
> 


  reply	other threads:[~2025-09-17 19:47 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-26  8:36 [PATCH V7 0/5] Add support for QCOM SPMI PMIC5 Gen3 ADC Jishnu Prakash
2025-08-26  8:36 ` [PATCH V7 1/5] dt-bindings: iio/adc: Move QCOM ADC bindings to iio/adc folder Jishnu Prakash
2025-08-26  8:36 ` [PATCH V7 2/5] dt-bindings: iio: adc: Split out QCOM VADC channel properties Jishnu Prakash
2025-08-26  8:36 ` [PATCH V7 3/5] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC Jishnu Prakash
2025-08-29  7:19   ` Krzysztof Kozlowski
2025-09-16 14:28     ` Jishnu Prakash
2025-09-17  0:29       ` Krzysztof Kozlowski
2025-09-17 19:47         ` Jishnu Prakash
2025-09-18  0:15           ` Krzysztof Kozlowski
2025-09-19 14:47             ` Jishnu Prakash
2025-09-27 13:47               ` Jonathan Cameron
2025-10-04  2:41                 ` Jishnu Prakash
2025-10-04  6:52                   ` Krzysztof Kozlowski
2025-10-08 14:20                     ` Jishnu Prakash
2025-10-08 23:52                       ` Krzysztof Kozlowski
2025-10-17 11:18                         ` Jishnu Prakash
2025-10-17 13:40                           ` Krzysztof Kozlowski
2025-10-20 12:51                             ` Konrad Dybcio
2025-10-20 15:55                               ` Krzysztof Kozlowski
2025-10-22 11:02                                 ` Konrad Dybcio
2025-10-27 16:30                                   ` Krzysztof Kozlowski
2025-11-01  2:20                                     ` Jishnu Prakash
2025-08-26  8:36 ` [PATCH V7 4/5] " Jishnu Prakash
2025-08-30 17:42   ` Jonathan Cameron
2025-09-17 19:47     ` Jishnu Prakash [this message]
2025-08-26  8:36 ` [PATCH V7 5/5] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2025-08-27  1:44   ` Dmitry Baryshkov
2025-08-29  7:14   ` Krzysztof Kozlowski
2025-08-30 17:58   ` Jonathan Cameron
2025-09-17 19:47     ` Jishnu Prakash
2025-08-29  7:11 ` [PATCH V7 0/5] Add support for QCOM SPMI PMIC5 Gen3 ADC Krzysztof Kozlowski
2025-09-16 14:27   ` Jishnu Prakash
2025-08-29  7:12 ` Krzysztof Kozlowski
2025-08-29  8:09   ` Dmitry Baryshkov
2025-08-29  9:11     ` Krzysztof Kozlowski
2025-08-29  9:20       ` Dmitry Baryshkov
2025-08-29 16:31         ` Jonathan Cameron
2025-09-17 19:43           ` Bjorn Andersson
2025-09-19 14:47             ` Jishnu Prakash

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