From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27D632DAFC5; Tue, 22 Jul 2025 09:04:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753175096; cv=none; b=fzyNRi7o18vCBXEjVubEwaFUUFL58oM6zcVQrowzDo5FQpJKeZxIGDyfWIwET9VWFzEXp0alY6X68Hrz3mSd08lJP/W86T+EHq9/JCVSeN4jmEPi8Y58bTfRE2Tq2JZI0E38wHJFbOLJNYbl0CSUErQRIxvlOupMPeDC0DrS3JA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753175096; c=relaxed/simple; bh=5a3qmKtFanuttcsG8G7/hPPyMdc+1UznbE0m5pJOyuE=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=kwn/lN4rBaLI592V5ecDJWe/1HWhPWPI97yx2fzW5LoqGLhpFIlOsxBW23MVTr9DzJTs9MX5FtbwCcBOTyraUtD/hRpJFrwEqLFrGgAmlr6tNGW2nE9Ad12Iw59DEuu8LaY2NTAym/89kBDQgAn4tmBy7vlEloiGKNZBZYj720M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=D5Sp5GIs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="D5Sp5GIs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9F4EFC4CEF4; Tue, 22 Jul 2025 09:04:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753175095; bh=5a3qmKtFanuttcsG8G7/hPPyMdc+1UznbE0m5pJOyuE=; h=Date:Subject:To:References:From:In-Reply-To:From; b=D5Sp5GIs+vvmCirZ9FZ7MznRLxrxx/6/weDkhXt0CxVY1V8ztf70fY9q9Psk5ClQT yrjoEcP0ck5xRXNIyHFYZBwI6x1Z3QqHG5SD21wkjC8Iw/sJPEyYp+Ecf/9A7UA2pG OyCgpntGFkJkqVlRwrDVsHfPq4GC2QYWZcd3al5k4tsYgTP2Zn/d8Z27535bEIYXL4 A7PpyW1ti8YhnB/7iPB/tRH0FwtsBoR9I6qmHYkzwxU89fdo3gBKazvPx2f7zUad8c Dkv5ua94XijNnce3P+9lVMgHBfGLil9GdDN099CsgsOipnkHR63Qhw5wXxfd6hfh7X 8LaenmXvmzg+g== Message-ID: Date: Tue, 22 Jul 2025 11:04:51 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 1/2] dt-bindings: regulator: Add Richtek RTR5133 Support To: jeff_chang@richtek.com, lgirdwood@gmail.com, broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20250722083543.2730796-1-jeff_chang@richtek.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 22/07/2025 10:34, jeff_chang@richtek.com wrote: > From: Jeff Chang > > Add bindings for Richtek RT5133 IC Controlled PMIC Subject - RTR or RT? Google tells me nothing about RTR. > > Signed-off-by: Jeff Chang > --- > > PATCH v4 > 1. Add commit message and also /script/checkpatch --strict to fix warning. > 2. Using subject prefixes matching dt-binding subsystem. > 3. Re-order patches. DT patch before driver patch. > 4. Fix description of yaml. > 5. Add more description for base regulator. > 6. Drop regulator-compatible proeprty. > 7. Add prefix for vendor property richtek,oc-shutdown-all and richtek,pgb-shutdown-all. > 8. Add more description for shutdown-all property. > 9. Interrupts-extended -> interrupts. > 10. pio->gpio for proper defines. > 11. Drop unused labels. Keep rt5133_ldo1 label for ldo7 and ldo8. > > .../bindings/regulator/richtek,rt5133.yaml | 175 ++++++++++++++++++ > 1 file changed, 175 insertions(+) > create mode 100644 Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml > > diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml > new file mode 100644 > index 000000000000..0da725596a87 > --- /dev/null > +++ b/Documentation/devicetree/bindings/regulator/richtek,rt5133.yaml > @@ -0,0 +1,175 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/regulator/richtek,rt5133.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Richtek RT5133 PMIC Regulator > + > +maintainers: > + - ShihChia Chang > + > +description: > + The RT5133 is an integrated Power Management IC for portable devices, featuring > + 8 LDOs and 3 GPOs. It allows programmable output voltages, soft-start times, > + and protections via I2C. GPO operation depends on LDO1 voltage. > + > +properties: > + compatible: > + enum: > + - richtek,rt5133 > + > + reg: > + maxItems: 1 > + > + enable-gpios: > + maxItems: 1 > + > + wakeup-source: true > + > + interrupts: > + maxItems: 1 > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + > + regulators: > + type: object > + additionalProperties: false > + > + properties: > + base: > + type: object > + $ref: regulator.yaml# > + unevaluatedProperties: false > + description: > + Properties for base regulator which control force-off base circuit. > + Base circuit is the power source for LDO1~LDO6. Disabling it will > + reduce IQ for Chip. I don't understand what this regulator is for. Your example is also incomplete - missing min/max constraints like voltage. Explain, what is this output pin? I already asked for explanations. I have diagram in front of me, so explain precisely instead of sending THE SAME again - which pin is it? Also, what is IQ? Except Intelligence Quotient? > + > + properties: > + richtek,oc-shutdown-all: > + type: boolean > + description: > + Anyone of LDO is in OC state, shut down all channels to protect CHIP. > + Without this property, only shut down the OC LDO channel. I don't understand this. I also do not understand why this is property of "base" not the chip itself... So don't send next version with the same. > + > + richtek,pgb-shutdown-all: > + type: boolean > + description: > + Anyone of LDO is in PGB state, shut down all channels to protect CHIP. CHIP is an acronym? Or chip? > + Without this property, only shut down the PGB LDO channel. > + > + required: > + - regulator-name > + > + patternProperties: > + "^ldo([1-6])$": > + type: object > + $ref: regulator.yaml# > + unevaluatedProperties: false > + description: > + Properties for single LDO regulator > + > + required: > + - regulator-name > + > + "^ldo([7-8])$": > + type: object > + $ref: regulator.yaml# > + unevaluatedProperties: false > + description: > + Properties for single LDO regulator > + > + properties: > + rt5133-ldo1-supply: supplies do not have vendor prefixes. > + description: | > + Only for ldo7 ldo8, pvin7 and pvin8 reference design are RT5133 ldo1. > + If not connect to ldo1 vout, this property for pvin7 and pvin8 is necessary. I don't understand why LDO1 supply is here. Again, which pin is it? > + > + required: > + - regulator-name > + > +required: > + - compatible > + - reg > + - interrupts > + - wakeup-source > + > +unevaluatedProperties: false > + > +examples: > + - | > + i2c { > + #address-cells = <1>; > + #size-cells = <0>; > + > + rt5133@18 { Nothing improved. > + compatible = "richtek,rt5133"; > + reg = <0x18>; > + wakeup-source; > + interrupts-extended = <&gpio 187 0x0>; Nothing improved Implement previous comments and respond to each of them to confirm you understood them. > Best regards, Krzysztof