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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Andrew Lunn <andrew@lunn.ch>,
	George Moussalem <george.moussalem@outlook.com>,
	Kathiravan Thirumoorthy
	<kathiravan.thirumoorthy@oss.qualcomm.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	netdev@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v3 4/4] net: phy: at803x: add RX and TX clock management for IPQ5018 PHY
Date: Thu, 11 Jun 2026 13:54:40 +0200	[thread overview]
Message-ID: <f492327c-7ee1-443f-bb11-b78af0eda207@oss.qualcomm.com> (raw)
In-Reply-To: <afdced5b-73b9-4214-a94a-c13fadd39dce@lunn.ch>

On 6/5/26 8:14 PM, Andrew Lunn wrote:
>>>> This PHY is integrated into the IPQ5018 SoC, connected to the first GMAC
>>>> (GMAC0) and probed upon boot. However, this PHY is not used on all
>>>> boards because an external PHY or switch can be wired to the SoC's
>>>> second GMAC instead (through a PCS). So from a power management
>>>> perspective, it would be better if we can disable the clocks if there's
>>>> no link detected.
>>>
>>> Humm, is link the correct criteria? If the PHY is not used,
>>> .config_aneg should not be called. Why not have the probe method get
>>> the optional clocks, but leave them off. When .config_aneg is called
>>> for the first time, enable the clocks?
>>
>> Will check if config_aneg is called and test accordingly.
>>
>> ip link set eth0 up/down and cable (un)plug do trigger
>> link_change_notify, and based on the link state the RX/TX clocks are
>> turned off/on properly.
> 
> You are talking about something else here. You say the device is not
> used. If it is not used, .config_aneg should not be called.
> 
> This is a second use case, the device is used, and you want to limit
> the power it consumes, when there is no link. Do you have any numbers?
> How much power is actually saved?

If the PHY is part of the SoC, keeping it online would require some
more hw to be online, so it probably sums up.. I don't know for sure,
I don't really work with the router SoCs

Is there any prior art wrt enabling/disabling the PHYs (not necessarily
clocks specifically, but say power supplies) at runtime?
A quick grep only points to this very driver, which gets the regulator
during probe, enables it and never turns it off

Maybe +Kathiravan knows more?

Konrad

  parent reply	other threads:[~2026-06-11 11:54 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-05 12:41 [PATCH v3 0/4] IPQ5018: Add and enable GEPHY RX and TX clocks George Moussalem via B4 Relay
2026-06-05 12:41 ` [PATCH v3 1/4] dt-bindings: net: ethernet-phy: increase max clock count to two George Moussalem via B4 Relay
2026-06-05 15:59   ` Rob Herring
2026-06-05 12:41 ` [PATCH v3 2/4] dt-bindings: net: qca,ar803x: Add clocks for IPQ5018 PHY George Moussalem via B4 Relay
2026-06-05 12:41 ` [PATCH v3 3/4] arm64: qcom: ipq5018: Add GEPHY RX and TX clocks George Moussalem via B4 Relay
2026-06-11  9:28   ` Paolo Abeni
2026-06-11 11:17     ` Konrad Dybcio
2026-06-11 11:17       ` Konrad Dybcio
2026-06-05 12:41 ` [PATCH v3 4/4] net: phy: at803x: add RX and TX clock management for IPQ5018 PHY George Moussalem via B4 Relay
2026-06-05 14:23   ` Andrew Lunn
2026-06-05 14:45     ` George Moussalem
2026-06-05 15:01       ` Andrew Lunn
2026-06-05 16:51         ` George Moussalem
2026-06-05 18:14           ` Andrew Lunn
2026-06-06 10:35             ` George Moussalem
2026-06-11 11:54             ` Konrad Dybcio [this message]
2026-06-11 12:52               ` Andrew Lunn
2026-06-11 12:58                 ` George Moussalem
2026-06-06 12:41   ` sashiko-bot
2026-06-11  9:24   ` Paolo Abeni

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