* [PATCH 0/2] Add Support for the FriendlyElec NanoPC T6 @ 2023-08-02 5:14 Thomas McKahan 2023-08-02 5:14 ` [PATCH 1/2] dt-bindings: arm: rockchip: Add " Thomas McKahan 2023-08-02 5:14 ` [PATCH 2/2] arm64: dts: " Thomas McKahan 0 siblings, 2 replies; 7+ messages in thread From: Thomas McKahan @ 2023-08-02 5:14 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, linux-rockchip Cc: Thomas McKahan, devicetree, linux-arm-kernel, linux-kernel Hello, This adds support for the RK3588-based NanoPC T6 single board computer. Note this series is dependent on the PCIe 3 support [0] being upstreamed. The NanoPC T6 uses PCIe3x4 like the Rock 5B and EVB1. [0] https://lore.kernel.org/all/20230717173512.65169-1-sebastian.reichel@collabora.com/ Thomas McKahan (2): dt-bindings: arm: rockchip: Add NanoPC T6 arm64: dts: rockchip: Add NanoPC T6 .../devicetree/bindings/arm/rockchip.yaml | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 845 ++++++++++++++++++ 3 files changed, 851 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/2] dt-bindings: arm: rockchip: Add NanoPC T6 2023-08-02 5:14 [PATCH 0/2] Add Support for the FriendlyElec NanoPC T6 Thomas McKahan @ 2023-08-02 5:14 ` Thomas McKahan 2023-08-02 15:37 ` Conor Dooley 2023-08-02 5:14 ` [PATCH 2/2] arm64: dts: " Thomas McKahan 1 sibling, 1 reply; 7+ messages in thread From: Thomas McKahan @ 2023-08-02 5:14 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, linux-rockchip Cc: Thomas McKahan, devicetree, linux-arm-kernel, linux-kernel Add the NanoPC T6, a single board computer from FriendlyElec Signed-off-by: Thomas McKahan <tmckahan@singleboardsolutions.com> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 115ca986e20f..ca5389862887 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -227,6 +227,11 @@ properties: - friendlyarm,nanopi-r5s - const: rockchip,rk3568 + - description: FriendlyElec NanoPC T6 + items: + - const: friendlyarm,nanopc-t6 + - const: rockchip,rk3588 + - description: GeekBuying GeekBox items: - const: geekbuying,geekbox -- 2.34.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/2] dt-bindings: arm: rockchip: Add NanoPC T6 2023-08-02 5:14 ` [PATCH 1/2] dt-bindings: arm: rockchip: Add " Thomas McKahan @ 2023-08-02 15:37 ` Conor Dooley 0 siblings, 0 replies; 7+ messages in thread From: Conor Dooley @ 2023-08-02 15:37 UTC (permalink / raw) To: Thomas McKahan Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, linux-rockchip, devicetree, linux-arm-kernel, linux-kernel [-- Attachment #1: Type: text/plain, Size: 1083 bytes --] On Wed, Aug 02, 2023 at 01:14:06AM -0400, Thomas McKahan wrote: > Add the NanoPC T6, a single board computer from FriendlyElec > > Signed-off-by: Thomas McKahan <tmckahan@singleboardsolutions.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index 115ca986e20f..ca5389862887 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -227,6 +227,11 @@ properties: > - friendlyarm,nanopi-r5s > - const: rockchip,rk3568 > > + - description: FriendlyElec NanoPC T6 > + items: > + - const: friendlyarm,nanopc-t6 > + - const: rockchip,rk3588 > + > - description: GeekBuying GeekBox > items: > - const: geekbuying,geekbox > -- > 2.34.1 > [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/2] arm64: dts: rockchip: Add NanoPC T6 2023-08-02 5:14 [PATCH 0/2] Add Support for the FriendlyElec NanoPC T6 Thomas McKahan 2023-08-02 5:14 ` [PATCH 1/2] dt-bindings: arm: rockchip: Add " Thomas McKahan @ 2023-08-02 5:14 ` Thomas McKahan 2023-08-07 6:44 ` Krzysztof Kozlowski 1 sibling, 1 reply; 7+ messages in thread From: Thomas McKahan @ 2023-08-02 5:14 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, linux-rockchip Cc: Thomas McKahan, devicetree, linux-arm-kernel, linux-kernel Add the NanoPC T6, a single board computer from FriendlyElec based on the RK3588. Initial device tree supports debug UART, SD, eMMC, PCIe 3, PMIC, and 40 pin GPIO assignments. Signed-off-by: Thomas McKahan <tmckahan@singleboardsolutions.com> --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 845 ++++++++++++++++++ 2 files changed, 846 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 1ebbb3e9c2f9..e7728007fd1b 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts new file mode 100644 index 000000000000..2362da2c53d9 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts @@ -0,0 +1,845 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2023 Thomas McKahan + * + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/usb/pd.h> +#include "rk3588.dtsi" + +/ { + model = "FriendlyElec NanoPC-T6"; + compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + serial2 = &uart2; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + sound { + status = "okay"; + compatible = "simple-audio-card"; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + + simple-audio-card,name = "realtek,rt5616-codec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; + simple-audio-card,hp-pin-name = "Headphones"; + + simple-audio-card,widgets = + "Headphone", "Headphones", + "Microphone", "Microphone Jack"; + simple-audio-card,routing = + "Headphones", "HPOL", + "Headphones", "HPOR", + "MIC1", "Microphone Jack", + "Microphone Jack", "micbias1"; + + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rt5616>; + }; + }; + + leds { + compatible = "gpio-leds"; + + sys_led: led-0 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; + label = "system-led"; + pinctrl-names = "default"; + pinctrl-0 = <&sys_led_pin>; + linux,default-trigger = "heartbeat"; + }; + + usr_led: led-1 { + gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; + label = "user-led"; + pinctrl-names = "default"; + pinctrl-0 = <&usr_led_pin>; + }; + }; + + vcc12v_dcin: vcc12v-dcin-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + /* vcc5v0_sys powers peripherals */ + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin>; + }; + + /* vcc4v0_sys powers the RK806, RK860's */ + vcc4v0_sys: vcc4v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc4v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + vin-supply = <&vcc12v_dcin>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc-1v1-nldo-s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc4v0_sys>; + }; + + vbus5v0_typec: vbus5v0-typec { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_pwren>; + regulator-name = "vbus5v0_typec"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_pcie30: vcc3v3-pcie30 { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_m2_0_pwren>; + regulator-name = "vcc3v3_pcie30"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_b0{ + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1{ + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2{ + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3{ + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&gpio0 { + gpio-line-names = /* GPIO0 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO0 C0-C7 */ + "", "", "", "", + "HEADER_10", "HEADER_08", "HEADER_32", "", + /* GPIO0 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; + +&gpio1 { + gpio-line-names = /* GPIO1 A0-A7 */ + "HEADER_27", "HEADER_28", "", "", + "", "", "", "HEADER_15", + /* GPIO1 B0-B7 */ + "HEADER_26", "HEADER_21", "HEADER_19", "HEADER_23", + "HEADER_24", "HEADER_22", "", "", + /* GPIO1 C0-C7 */ + "", "", "", "", + "", "", "", "", + /* GPIO1 D0-D7 */ + "", "", "", "", + "", "", "HEADER_05", "HEADER_03"; +}; + +&gpio2 { + gpio-line-names = /* GPIO2 A0-A7 */ + "", "", "", "", + "", "", "", "", + /* GPIO2 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO2 C0-C7 */ + "", "CSI1_11", "CSI1_12", "", + "", "", "", "", + /* GPIO2 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = /* GPIO3 A0-A7 */ + "HEADER_35", "HEADER_38", "HEADER_40", "HEADER_36", + "HEADER_37", "", "DSI0_12", "", + /* GPIO3 B0-B7 */ + "HEADER_33", "DSI0_10", "HEADER_07", "HEADER_16", + "HEADER_18", "HEADER_29", "HEADER_31", "HEADER_12", + /* GPIO3 C0-C7 */ + "DSI0_08", "DSI0_14", "HEADER_11", "HEADER_13", + "", "", "", "", + /* GPIO3 D0-D7 */ + "", "", "", "", + "", "DSI1_10", "", ""; +}; + +&gpio4 { + gpio-line-names = /* GPIO4 A0-A7 */ + "DSI1_08", "DSI1_14", "", "DSI1_12", + "", "", "", "", + /* GPIO4 B0-B7 */ + "", "", "", "", + "", "", "", "", + /* GPIO4 C0-C7 */ + "", "", "", "", + "CSI0_11", "CSI0_12", "", "", + /* GPIO4 D0-D7 */ + "", "", "", "", + "", "", "", ""; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c2 { + status = "okay"; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + rockchip,suspend-voltage-selector = <1>; + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc4v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c6 { + clock-frequency = <200000>; + status = "okay"; + + fusb302: typec-portc@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&usbc0_int>; + pinctrl-names = "default"; + vbus-supply = <&vbus5v0_typec>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB-C"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + op-sink-microwatt = <1000000>; + }; + + }; + + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; + wakeup-source; + }; + +}; + +&i2c7 { + clock-frequency = <200000>; + status = "okay"; + + rt5616: codec@1b { + compatible = "realtek,rt5616"; + reg = <0x1b>; + clocks = <&cru I2S0_8CH_MCLKOUT>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; + assigned-clock-rates = <12288000>; + + port { + rt5616_p0_0: endpoint { + remote-endpoint = <&i2s0_8ch_p0_0>; + }; + }; + }; + + /* connected with MIPI-CSI1 */ +}; + +&i2c8 { + pinctrl-0 = <&i2c8m2_xfer>; +}; + +&i2s0_8ch { + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_lrck + &i2s0_mclk + &i2s0_sclk + &i2s0_sdi0 + &i2s0_sdo0>; + status = "okay"; + + i2s0_8ch_p0: port { + i2s0_8ch_p0_0: endpoint { + dai-format = "i2s"; + mclk-fs = <256>; + remote-endpoint = <&rt5616_p0_0>; + }; + }; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x4 { + reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; + +&pinctrl { + gpio-leds { + sys_led_pin: sys-led-pin { + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usr_led_pin: usr-led-pin { + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_det: hp-det { + rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pcie { + pcie_m2_0_pwren: pcie-m20-pwren { + rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + typec5v_pwren: typec5v-pwren { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_int: usbc0-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pwm1 { + pinctrl-0 = <&pwm1m1_pins>; + status = "okay"; +}; + +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + non-removable; + max-frequency = <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + status = "okay"; +}; + +&sdmmc { + max-frequency = <200000000>; + no-sdio; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&spi2 { + status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + num-cs = <1>; + + pmic@0 { + compatible = "rockchip,rk806"; + spi-max-frequency = <1000000>; + reg = <0x0>; + + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + vcc1-supply = <&vcc4v0_sys>; + vcc2-supply = <&vcc4v0_sys>; + vcc3-supply = <&vcc4v0_sys>; + vcc4-supply = <&vcc4v0_sys>; + vcc5-supply = <&vcc4v0_sys>; + vcc6-supply = <&vcc4v0_sys>; + vcc7-supply = <&vcc4v0_sys>; + vcc8-supply = <&vcc4v0_sys>; + vcc9-supply = <&vcc4v0_sys>; + vcc10-supply = <&vcc4v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc4v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc4v0_sys>; + + gpio-controller; + #gpio-cells = <2>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_log_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-init-microvolt = <750000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_vdenc_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_2v0_pldo_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vcc_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +&u2phy2_host { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; -- 2.34.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: rockchip: Add NanoPC T6 2023-08-02 5:14 ` [PATCH 2/2] arm64: dts: " Thomas McKahan @ 2023-08-07 6:44 ` Krzysztof Kozlowski [not found] ` <20230808002751.00001385@singleboardsolutions.com> 0 siblings, 1 reply; 7+ messages in thread From: Krzysztof Kozlowski @ 2023-08-07 6:44 UTC (permalink / raw) To: Thomas McKahan, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, linux-rockchip Cc: devicetree, linux-arm-kernel, linux-kernel On 02/08/2023 07:14, Thomas McKahan wrote: > Add the NanoPC T6, a single board computer from FriendlyElec based on > the RK3588. > > Initial device tree supports debug UART, SD, eMMC, PCIe 3, PMIC, > and 40 pin GPIO assignments. > > Signed-off-by: Thomas McKahan <tmckahan@singleboardsolutions.com> > --- > arch/arm64/boot/dts/rockchip/Makefile | 1 + > .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 845 ++++++++++++++++++ > 2 files changed, 846 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index 1ebbb3e9c2f9..e7728007fd1b 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > new file mode 100644 > index 000000000000..2362da2c53d9 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > @@ -0,0 +1,845 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. > + * Copyright (c) 2023 Thomas McKahan > + * > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/pinctrl/rockchip.h> > +#include <dt-bindings/usb/pd.h> > +#include "rk3588.dtsi" > + > +/ { > + model = "FriendlyElec NanoPC-T6"; > + compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; > + > + aliases { > + mmc0 = &sdhci; > + mmc1 = &sdmmc; > + serial2 = &uart2; > + }; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + sound { > + status = "okay"; Was it disabled anywhere? Anyway, compatible is always the first property. > + compatible = "simple-audio-card"; > + pinctrl-names = "default"; > + pinctrl-0 = <&hp_det>; > + > + simple-audio-card,name = "realtek,rt5616-codec"; > + simple-audio-card,format = "i2s"; > + simple-audio-card,mclk-fs = <256>; > + > + simple-audio-card,hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; > + simple-audio-card,hp-pin-name = "Headphones"; > + > + simple-audio-card,widgets = > + "Headphone", "Headphones", > + "Microphone", "Microphone Jack"; > + simple-audio-card,routing = > + "Headphones", "HPOL", > + "Headphones", "HPOR", > + "MIC1", "Microphone Jack", > + "Microphone Jack", "micbias1"; > + > + simple-audio-card,cpu { > + sound-dai = <&i2s0_8ch>; > + }; > + simple-audio-card,codec { > + sound-dai = <&rt5616>; > + }; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + sys_led: led-0 { > + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; > + label = "system-led"; > + pinctrl-names = "default"; > + pinctrl-0 = <&sys_led_pin>; > + linux,default-trigger = "heartbeat"; > + }; > + > + usr_led: led-1 { > + gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; > + label = "user-led"; > + pinctrl-names = "default"; > + pinctrl-0 = <&usr_led_pin>; > + }; > + }; > + > + vcc12v_dcin: vcc12v-dcin-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc12v_dcin"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + }; > + > + /* vcc5v0_sys powers peripherals */ > + vcc5v0_sys: vcc5v0-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc12v_dcin>; > + }; > + > + /* vcc4v0_sys powers the RK806, RK860's */ > + vcc4v0_sys: vcc4v0-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc4v0_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <4000000>; > + regulator-max-microvolt = <4000000>; > + vin-supply = <&vcc12v_dcin>; > + }; > + > + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc-1v1-nldo-s3"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + vin-supply = <&vcc4v0_sys>; > + }; > + > + vbus5v0_typec: vbus5v0-typec { What happened with -regulator suffix? > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&typec5v_pwren>; > + regulator-name = "vbus5v0_typec"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v0_sys>; > + }; > + > + vcc3v3_pcie30: vcc3v3-pcie30 { What happened with -regulator suffix? ... > + }; > + Drop stray blank line. > + }; > + > + hym8563: hym8563@51 { Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > + compatible = "haoyu,hym8563"; > + reg = <0x51>; > + #clock-cells = <0>; > + clock-output-names = "hym8563"; > + pinctrl-names = "default"; > + pinctrl-0 = <&hym8563_int>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; > + wakeup-source; > + }; > + > +}; > + > +&i2c7 { > + clock-frequency = <200000>; > + status = "okay"; > + > + rt5616: codec@1b { > + compatible = "realtek,rt5616"; > + reg = <0x1b>; > + clocks = <&cru I2S0_8CH_MCLKOUT>; > + clock-names = "mclk"; > + #sound-dai-cells = <0>; > + assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; > + assigned-clock-rates = <12288000>; > + > + port { > + rt5616_p0_0: endpoint { > + remote-endpoint = <&i2s0_8ch_p0_0>; > + }; > + }; > + }; > + > + /* connected with MIPI-CSI1 */ > +}; > + > +&i2c8 { > + pinctrl-0 = <&i2c8m2_xfer>; > +}; > + > +&i2s0_8ch { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2s0_lrck > + &i2s0_mclk > + &i2s0_sclk > + &i2s0_sdi0 > + &i2s0_sdo0>; Odd alignment. > + status = "okay"; > + > + i2s0_8ch_p0: port { > + i2s0_8ch_p0_0: endpoint { > + dai-format = "i2s"; > + mclk-fs = <256>; > + remote-endpoint = <&rt5616_p0_0>; > + }; > + }; > +}; > + > +&pcie30phy { > + status = "okay"; > +}; > + ... > +&spi2 { > + status = "okay"; > + assigned-clocks = <&cru CLK_SPI2>; > + assigned-clock-rates = <200000000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; > + num-cs = <1>; > + > + pmic@0 { > + compatible = "rockchip,rk806"; > + spi-max-frequency = <1000000>; > + reg = <0x0>; > + > + interrupt-parent = <&gpio0>; > + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, > + <&rk806_dvs2_null>, <&rk806_dvs3_null>; > + > + vcc1-supply = <&vcc4v0_sys>; > + vcc2-supply = <&vcc4v0_sys>; > + vcc3-supply = <&vcc4v0_sys>; > + vcc4-supply = <&vcc4v0_sys>; > + vcc5-supply = <&vcc4v0_sys>; > + vcc6-supply = <&vcc4v0_sys>; > + vcc7-supply = <&vcc4v0_sys>; > + vcc8-supply = <&vcc4v0_sys>; > + vcc9-supply = <&vcc4v0_sys>; > + vcc10-supply = <&vcc4v0_sys>; > + vcc11-supply = <&vcc_2v0_pldo_s3>; > + vcc12-supply = <&vcc4v0_sys>; > + vcc13-supply = <&vcc_1v1_nldo_s3>; > + vcc14-supply = <&vcc_1v1_nldo_s3>; > + vcca-supply = <&vcc4v0_sys>; > + > + gpio-controller; > + #gpio-cells = <2>; > + > + rk806_dvs1_null: dvs1-null-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun0"; > + }; > + > + rk806_dvs2_null: dvs2-null-pins { > + pins = "gpio_pwrctrl2"; > + function = "pin_fun0"; > + }; > + > + rk806_dvs3_null: dvs3-null-pins { > + pins = "gpio_pwrctrl3"; > + function = "pin_fun0"; > + }; > + > + regulators { > + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { > + regulator-boot-on; Boolean properties are not first, but last. regulator-name is the first one. This odd style... > + regulator-min-microvolt = <550000>; > + regulator-max-microvolt = <950000>; > + regulator-ramp-delay = <12500>; > + regulator-name = "vdd_gpu_s0"; > + regulator-enable-ramp-delay = <400>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
[parent not found: <20230808002751.00001385@singleboardsolutions.com>]
* Re: [PATCH 2/2] arm64: dts: rockchip: Add NanoPC T6 [not found] ` <20230808002751.00001385@singleboardsolutions.com> @ 2023-08-08 5:57 ` Krzysztof Kozlowski 2023-08-08 11:35 ` Heiko Stübner 1 sibling, 0 replies; 7+ messages in thread From: Krzysztof Kozlowski @ 2023-08-08 5:57 UTC (permalink / raw) To: Thomas McKahan Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, linux-rockchip, devicetree, linux-arm-kernel, linux-kernel On 08/08/2023 06:32, Thomas McKahan wrote: >>> + >>> + regulators { >>> + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { >>> + regulator-boot-on; >> >> Boolean properties are not first, but last. regulator-name is the first >> one. This odd style... >> > > I agree, however it seems the norm in Rockchip devices. This will > become an outlier in Rockchip but fall in line with the general case. > I'll put it in V2 with the other mentioned fixes unless a conflicting > opinion is expressed. OK, no need to change then. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/2] arm64: dts: rockchip: Add NanoPC T6 [not found] ` <20230808002751.00001385@singleboardsolutions.com> 2023-08-08 5:57 ` Krzysztof Kozlowski @ 2023-08-08 11:35 ` Heiko Stübner 1 sibling, 0 replies; 7+ messages in thread From: Heiko Stübner @ 2023-08-08 11:35 UTC (permalink / raw) To: Krzysztof Kozlowski, Thomas McKahan Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-rockchip, devicetree, linux-arm-kernel, linux-kernel Am Dienstag, 8. August 2023, 06:32:45 CEST schrieb Thomas McKahan: > On Mon, 7 Aug 2023 08:44:40 +0200 > Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > > On 02/08/2023 07:14, Thomas McKahan wrote: > > > Add the NanoPC T6, a single board computer from FriendlyElec based on > > > the RK3588. > > > > > > Initial device tree supports debug UART, SD, eMMC, PCIe 3, PMIC, > > > and 40 pin GPIO assignments. > > > > > > Signed-off-by: Thomas McKahan <tmckahan@singleboardsolutions.com> > > > --- > > > arch/arm64/boot/dts/rockchip/Makefile | 1 + > > > .../boot/dts/rockchip/rk3588-nanopc-t6.dts | 845 ++++++++++++++++++ > > > 2 files changed, 846 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > > > > > > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > > > index 1ebbb3e9c2f9..e7728007fd1b 100644 > > > --- a/arch/arm64/boot/dts/rockchip/Makefile > > > +++ b/arch/arm64/boot/dts/rockchip/Makefile > > > @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb > > > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb > > > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb > > > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb > > > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb > > > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb > > > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb > > > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > > > new file mode 100644 > > > index 000000000000..2362da2c53d9 > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dts > > > @@ -0,0 +1,845 @@ > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > > +/* > > > + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. > > > + * Copyright (c) 2023 Thomas McKahan > > > + * > > > + */ > > > + > > > +/dts-v1/; > > > + > > > +#include <dt-bindings/gpio/gpio.h> > > > +#include <dt-bindings/pinctrl/rockchip.h> > > > +#include <dt-bindings/usb/pd.h> > > > +#include "rk3588.dtsi" > > > + > > > +/ { > > > + model = "FriendlyElec NanoPC-T6"; > > > + compatible = "friendlyarm,nanopc-t6", "rockchip,rk3588"; > > > + > > ... > > > > +&spi2 { > > > + status = "okay"; > > > + assigned-clocks = <&cru CLK_SPI2>; > > > + assigned-clock-rates = <200000000>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; > > > + num-cs = <1>; > > > + > > > + pmic@0 { > > > + compatible = "rockchip,rk806"; > > > + spi-max-frequency = <1000000>; > > > + reg = <0x0>; > > > + > > > + interrupt-parent = <&gpio0>; > > > + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; > > > + > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, > > > + <&rk806_dvs2_null>, <&rk806_dvs3_null>; > > > + > > > + vcc1-supply = <&vcc4v0_sys>; > > > + vcc2-supply = <&vcc4v0_sys>; > > > + vcc3-supply = <&vcc4v0_sys>; > > > + vcc4-supply = <&vcc4v0_sys>; > > > + vcc5-supply = <&vcc4v0_sys>; > > > + vcc6-supply = <&vcc4v0_sys>; > > > + vcc7-supply = <&vcc4v0_sys>; > > > + vcc8-supply = <&vcc4v0_sys>; > > > + vcc9-supply = <&vcc4v0_sys>; > > > + vcc10-supply = <&vcc4v0_sys>; > > > + vcc11-supply = <&vcc_2v0_pldo_s3>; > > > + vcc12-supply = <&vcc4v0_sys>; > > > + vcc13-supply = <&vcc_1v1_nldo_s3>; > > > + vcc14-supply = <&vcc_1v1_nldo_s3>; > > > + vcca-supply = <&vcc4v0_sys>; > > > + > > > + gpio-controller; > > > + #gpio-cells = <2>; > > > + > > > + rk806_dvs1_null: dvs1-null-pins { > > > + pins = "gpio_pwrctrl2"; > > > + function = "pin_fun0"; > > > + }; > > > + > > > + rk806_dvs2_null: dvs2-null-pins { > > > + pins = "gpio_pwrctrl2"; > > > + function = "pin_fun0"; > > > + }; > > > + > > > + rk806_dvs3_null: dvs3-null-pins { > > > + pins = "gpio_pwrctrl3"; > > > + function = "pin_fun0"; > > > + }; > > > + > > > + regulators { > > > + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { > > > + regulator-boot-on; > > > > Boolean properties are not first, but last. regulator-name is the first > > one. This odd style... > > > > I agree, however it seems the norm in Rockchip devices. This will > become an outlier in Rockchip but fall in line with the general case. > I'll put it in V2 with the other mentioned fixes unless a conflicting > opinion is expressed. I definitly do prefer regulator-name to be the first regulator-* (same as compatible for regular nodes) and I think generally I do catch outliers in this . But for the rest of the propeties I guess it's different. While true I followed a scheme of booleans at the bottom in the past, going with "name at the top, rest alphabetically" is way easier to explain to people. [normal nodes should do: {compatible, regs, interrupts, ..alphabetical.., status} of course ] And of course regulator nodes are generally in board-files not in central soc dtsis and if needed I'll also just move things around when applying ;-). Heiko > > > > + regulator-min-microvolt = <550000>; > > > + regulator-max-microvolt = <950000>; > > > + regulator-ramp-delay = <12500>; > > > + regulator-name = "vdd_gpu_s0"; > > > + regulator-enable-ramp-delay = <400>; > > > + > > > + regulator-state-mem { > > > + regulator-off-in-suspend; > > > + }; > > > + }; > > > > > > > > Best regards, > > Krzysztof > > > > Best Regards, > Thomas > ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-08-08 18:36 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-08-02 5:14 [PATCH 0/2] Add Support for the FriendlyElec NanoPC T6 Thomas McKahan
2023-08-02 5:14 ` [PATCH 1/2] dt-bindings: arm: rockchip: Add " Thomas McKahan
2023-08-02 15:37 ` Conor Dooley
2023-08-02 5:14 ` [PATCH 2/2] arm64: dts: " Thomas McKahan
2023-08-07 6:44 ` Krzysztof Kozlowski
[not found] ` <20230808002751.00001385@singleboardsolutions.com>
2023-08-08 5:57 ` Krzysztof Kozlowski
2023-08-08 11:35 ` Heiko Stübner
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).