[PATCH 0/4] Add ADSP power domains controller support for MT8192

[PATCH 0/4] Add ADSP power domains controller support for MT8192

[Allen-KH Cheng]

This series is based on matthias github, v6.1-next.

[1] https://patchwork.kernel.org/project/linux-mediatek/patch/20221201073328.1559-1-allen-kh.cheng@mediatek.com/

Allen-KH Cheng (4):
  dt-bindings: power: Add MT8192 ADSP power domain
  soc: mediatek: pm-domains: Add ADSP power domain data for MT8192
  dt-bindings: arm: mediatek: Add missing power-domains property
  arm64: dts: mediatek: Add the missing ADSP power domains controller
    for MT8192

 .../arm/mediatek/mediatek,mt8192-clock.yaml     | 17 +++++++++++++++++
 arch/arm64/boot/dts/mediatek/mt8192.dtsi        |  9 +++++++++
 drivers/soc/mediatek/mt8192-pm-domains.h        | 16 ++++++++++++++++
 include/dt-bindings/power/mt8192-power.h        |  1 +
 4 files changed, 43 insertions(+)

-- 
2.18.0

[PATCH 1/4] dt-bindings: power: Add MT8192 ADSP power domain

[Allen-KH Cheng]

Add power domain ID for the ADSP power partition found on MT8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 include/dt-bindings/power/mt8192-power.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h
index 4eaa53d7270a..63e81cd0d06d 100644
--- a/include/dt-bindings/power/mt8192-power.h
+++ b/include/dt-bindings/power/mt8192-power.h
@@ -28,5 +28,6 @@
 #define MT8192_POWER_DOMAIN_CAM_RAWA	18
 #define MT8192_POWER_DOMAIN_CAM_RAWB	19
 #define MT8192_POWER_DOMAIN_CAM_RAWC	20
+#define MT8192_POWER_DOMAIN_ADSP	21
 
 #endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */
-- 
2.18.0

Re: [PATCH 1/4] dt-bindings: power: Add MT8192 ADSP power domain

[Krzysztof Kozlowski]

On 15/12/2022 13:00, Allen-KH Cheng wrote:
> Add power domain ID for the ADSP power partition found on MT8192 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>  include/dt-bindings/power/mt8192-power.h | 1 +

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH 2/4] soc: mediatek: pm-domains: Add ADSP power domain data for MT8192

[Allen-KH Cheng]

Add ADSP pm-domains (mtcmos) data for MT8192 SoC.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 drivers/soc/mediatek/mt8192-pm-domains.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h b/drivers/soc/mediatek/mt8192-pm-domains.h
index b97b2051920f..19e58f0ca1df 100644
--- a/drivers/soc/mediatek/mt8192-pm-domains.h
+++ b/drivers/soc/mediatek/mt8192-pm-domains.h
@@ -287,6 +287,22 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
 		.sram_pdn_bits = GENMASK(8, 8),
 		.sram_pdn_ack_bits = GENMASK(12, 12),
 	},
+	[MT8192_POWER_DOMAIN_ADSP] = {
+		.name = "adsp",
+		.sta_mask = BIT(22),
+		.ctl_offs = 0x0358,
+		.sram_pdn_bits = GENMASK(8, 8),
+		.sram_pdn_ack_bits = GENMASK(12, 12),
+		.ext_buck_iso_offs = 0x039C,
+		.ext_buck_iso_mask = BIT(2),
+		.bp_infracfg = {
+			BUS_PROT_WR(MT8192_TOP_AXI_PROT_EN_2_ADSP,
+				    MT8192_TOP_AXI_PROT_EN_2_SET,
+				    MT8192_TOP_AXI_PROT_EN_2_CLR,
+				    MT8192_TOP_AXI_PROT_EN_2_STA1),
+		},
+		.caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_EXT_BUCK_ISO,
+	},
 	[MT8192_POWER_DOMAIN_CAM] = {
 		.name = "cam",
 		.sta_mask = BIT(23),
-- 
2.18.0

Re: [PATCH 2/4] soc: mediatek: pm-domains: Add ADSP power domain data for MT8192

[Matthias Brugger]

On 15/12/2022 13:00, Allen-KH Cheng wrote:
> Add ADSP pm-domains (mtcmos) data for MT8192 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   drivers/soc/mediatek/mt8192-pm-domains.h | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h b/drivers/soc/mediatek/mt8192-pm-domains.h
> index b97b2051920f..19e58f0ca1df 100644
> --- a/drivers/soc/mediatek/mt8192-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8192-pm-domains.h
> @@ -287,6 +287,22 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
>   		.sram_pdn_bits = GENMASK(8, 8),
>   		.sram_pdn_ack_bits = GENMASK(12, 12),
>   	},
> +	[MT8192_POWER_DOMAIN_ADSP] = {
> +		.name = "adsp",
> +		.sta_mask = BIT(22),
> +		.ctl_offs = 0x0358,
> +		.sram_pdn_bits = GENMASK(8, 8),
> +		.sram_pdn_ack_bits = GENMASK(12, 12),
> +		.ext_buck_iso_offs = 0x039C,
> +		.ext_buck_iso_mask = BIT(2),

Not defined in upstream. It seems we are missing something here.

Regards,
Matthias

> +		.bp_infracfg = {
> +			BUS_PROT_WR(MT8192_TOP_AXI_PROT_EN_2_ADSP,
> +				    MT8192_TOP_AXI_PROT_EN_2_SET,
> +				    MT8192_TOP_AXI_PROT_EN_2_CLR,
> +				    MT8192_TOP_AXI_PROT_EN_2_STA1),
> +		},
> +		.caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_EXT_BUCK_ISO,
> +	},
>   	[MT8192_POWER_DOMAIN_CAM] = {
>   		.name = "cam",
>   		.sta_mask = BIT(23),

RE: [PATCH 2/4] soc: mediatek: pm-domains: Add ADSP power domain data for MT8192

[Allen-KH Cheng (程冠勳)]

Hi Matthias,

Thanks for the reminder. I will check this and resend next version.

Best Regards,
Allen


-----Original Message-----
From: Matthias Brugger <matthias.bgg@gmail.com> 
Sent: Friday, December 16, 2022 7:16 PM
To: Allen-KH Cheng (程冠勳) <Allen-KH.Cheng@mediatek.com>; Rob Herring <
robh+dt@kernel.org>; Krzysztof Kozlowski <
krzysztof.kozlowski+dt@linaro.org>; Chun-Jie Chen (陳浚桀) <
Chun-Jie.Chen@mediatek.com>; Stephen Boyd <sboyd@kernel.org>; Ikjoon
Jang <ikjn@chromium.org>
Cc: Project_Global_Chrome_Upstream_Group <
Project_Global_Chrome_Upstream_Group@mediatek.com>; 
angelogioacchino.delregno@collabora.com; devicetree@vger.kernel.org; 
linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; 
linux-mediatek@lists.infradead.org; Chen-Yu Tsai <wenst@chromium.org>
Subject: Re: [PATCH 2/4] soc: mediatek: pm-domains: Add ADSP power
domain data for MT8192



On 15/12/2022 13:00, Allen-KH Cheng wrote:
> Add ADSP pm-domains (mtcmos) data for MT8192 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   drivers/soc/mediatek/mt8192-pm-domains.h | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h
> b/drivers/soc/mediatek/mt8192-pm-domains.h
> index b97b2051920f..19e58f0ca1df 100644
> --- a/drivers/soc/mediatek/mt8192-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8192-pm-domains.h
> @@ -287,6 +287,22 @@ static const struct scpsys_domain_data
> scpsys_domain_data_mt8192[] = {
>   		.sram_pdn_bits = GENMASK(8, 8),
>   		.sram_pdn_ack_bits = GENMASK(12, 12),
>   	},
> +	[MT8192_POWER_DOMAIN_ADSP] = {
> +		.name = "adsp",
> +		.sta_mask = BIT(22),
> +		.ctl_offs = 0x0358,
> +		.sram_pdn_bits = GENMASK(8, 8),
> +		.sram_pdn_ack_bits = GENMASK(12, 12),
> +		.ext_buck_iso_offs = 0x039C,
> +		.ext_buck_iso_mask = BIT(2),

Not defined in upstream. It seems we are missing something here.

Regards,
Matthias

> +		.bp_infracfg = {
> +			BUS_PROT_WR(MT8192_TOP_AXI_PROT_EN_2_ADSP,
> +				    MT8192_TOP_AXI_PROT_EN_2_SET,
> +				    MT8192_TOP_AXI_PROT_EN_2_CLR,
> +				    MT8192_TOP_AXI_PROT_EN_2_STA1),
> +		},
> +		.caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_EXT_BUCK_ISO,
> +	},
>   	[MT8192_POWER_DOMAIN_CAM] = {
>   		.name = "cam",
>   		.sta_mask = BIT(23),

[PATCH 3/4] dt-bindings: arm: mediatek: Add missing power-domains property

[Allen-KH Cheng]

The "mediatek,mt8192-scp_adsp" binding requires a power domain to be
specified.

Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock")
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 .../arm/mediatek/mediatek,mt8192-clock.yaml     | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
index b57cc2e69efb..cbedef114103 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
@@ -40,6 +40,9 @@ properties:
   reg:
     maxItems: 1
 
+  power-domains:
+    maxItems: 1
+
   '#clock-cells':
     const: 1
 
@@ -49,11 +52,25 @@ required:
 
 additionalProperties: false
 
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - mediatek,mt8192-scp_adsp
+    then:
+      required:
+        - power-domains
+
 examples:
   - |
+    #include <dt-bindings/power/mt8192-power.h>
+
     scp_adsp: clock-controller@10720000 {
         compatible = "mediatek,mt8192-scp_adsp";
         reg = <0x10720000 0x1000>;
+        power-domains = <&spm MT8192_POWER_DOMAIN_ADSP>;
         #clock-cells = <1>;
     };
 
-- 
2.18.0

Re: [PATCH 3/4] dt-bindings: arm: mediatek: Add missing power-domains property

[Krzysztof Kozlowski]

On 15/12/2022 13:00, Allen-KH Cheng wrote:
> The "mediatek,mt8192-scp_adsp" binding requires a power domain to be
> specified.
> 
> Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock")
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>  .../arm/mediatek/mediatek,mt8192-clock.yaml     | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
> index b57cc2e69efb..cbedef114103 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml
> @@ -40,6 +40,9 @@ properties:
>    reg:
>      maxItems: 1
>  
> +  power-domains:
> +    maxItems: 1
> +
>    '#clock-cells':
>      const: 1
>  
> @@ -49,11 +52,25 @@ required:
>  
>  additionalProperties: false
>  
> +allOf:

allOf goes just before additionalProperties.

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8192-scp_adsp

For the future: please don't use underscores in compatibles.

> +    then:
> +      required:
> +        - power-domains
> +
>  examples:
>    - |
> +    #include <dt-bindings/power/mt8192-power.h>
> +
>      scp_adsp: clock-controller@10720000 {
>          compatible = "mediatek,mt8192-scp_adsp";
>          reg = <0x10720000 0x1000>;
> +        power-domains = <&spm MT8192_POWER_DOMAIN_ADSP>;
>          #clock-cells = <1>;
>      };
>  

Best regards,
Krzysztof

Re: [PATCH 3/4] dt-bindings: arm: mediatek: Add missing power-domains property

[Allen-KH Cheng (程冠勳)]

Hi Krzysztof,

Thanks for the reminder.

On Fri, 2022-12-16 at 11:58 +0100, Krzysztof Kozlowski wrote:
> On 15/12/2022 13:00, Allen-KH Cheng wrote:
> > The "mediatek,mt8192-scp_adsp" binding requires a power domain to
> > be
> > specified.
> > 
> > Fixes: 4a803990aeb1 ("dt-bindings: ARM: Mediatek: Add new document
> > bindings of MT8192 clock")
> > Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> > ---
> >  .../arm/mediatek/mediatek,mt8192-clock.yaml     | 17
> > +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > clock.yaml
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > clock.yaml
> > index b57cc2e69efb..cbedef114103 100644
> > ---
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > clock.yaml
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-
> > clock.yaml
> > @@ -40,6 +40,9 @@ properties:
> >    reg:
> >      maxItems: 1
> >  
> > +  power-domains:
> > +    maxItems: 1
> > +
> >    '#clock-cells':
> >      const: 1
> >  
> > @@ -49,11 +52,25 @@ required:
> >  
> >  additionalProperties: false
> >  
> > +allOf:
> 
> allOf goes just before additionalProperties.
> 

ok, I will fix this.

> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - mediatek,mt8192-scp_adsp
> 
> For the future: please don't use underscores in compatibles.
> 

Noted!

Thanks,
Allen

> > +    then:
> > +      required:
> > +        - power-domains
> > +
> >  examples:
> >    - |
> > +    #include <dt-bindings/power/mt8192-power.h>
> > +
> >      scp_adsp: clock-controller@10720000 {
> >          compatible = "mediatek,mt8192-scp_adsp";
> >          reg = <0x10720000 0x1000>;
> > +        power-domains = <&spm MT8192_POWER_DOMAIN_ADSP>;
> >          #clock-cells = <1>;
> >      };
> >  
> 
> Best regards,
> Krzysztof
> 

[PATCH 4/4] arm64: dts: mediatek: Add the missing ADSP power domains controller for MT8192

[Allen-KH Cheng]

Add the missing ADSP power domains controller for mt8192-scp_adsp clock
controllers.

Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers")
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 6b20376191a7..6ee60db3ac23 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -511,6 +511,14 @@
 						};
 					};
 				};
+
+				power-domain@MT8192_POWER_DOMAIN_ADSP {
+					reg = <MT8192_POWER_DOMAIN_ADSP>;
+					clocks = <&topckgen CLK_TOP_ADSP_SEL>;
+					clock-names = "adsp";
+					mediatek,infracfg = <&infracfg>;
+					#power-domain-cells = <0>;
+				};
 			};
 		};
 
@@ -574,6 +582,7 @@
 		scp_adsp: clock-controller@10720000 {
 			compatible = "mediatek,mt8192-scp_adsp";
 			reg = <0 0x10720000 0 0x1000>;
+			power-domains = <&spm MT8192_POWER_DOMAIN_ADSP>;
 			#clock-cells = <1>;
 		};
 
-- 
2.18.0