From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD398C4332F for ; Wed, 16 Nov 2022 13:09:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233290AbiKPNJV (ORCPT ); Wed, 16 Nov 2022 08:09:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233846AbiKPNJR (ORCPT ); Wed, 16 Nov 2022 08:09:17 -0500 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3518921835 for ; Wed, 16 Nov 2022 05:09:16 -0800 (PST) Received: by mail-ed1-x52f.google.com with SMTP id s12so26435626edd.5 for ; Wed, 16 Nov 2022 05:09:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to:subject :user-agent:mime-version:date:message-id:from:to:cc:subject:date :message-id:reply-to; bh=qgEG92Xup3/mVDZ3A5sVas1YVywyNuVA0qoL/v6KQmE=; b=cOwmbyq4DhKgMTF18V6U3k9aZx4YLgaaythcJQ8VKb30g6Uh7uSNr+hXEmgJs+vc22 cCuqKX7/N9fxy8YbmS7jFkpB0IQ3voiVruO1GSyzIk9ZYSh1obIR38pU9lVutFeIVljk bh8WnLpwr8uX/Uy98Ek72lU7Yb218NXhwjZFvNiiKJhoLcx1B5iKX+wDE5FT4fKwzt1X jybBX4wpKQdI/ueKz/lEGU076TE92mVUPWnIv1QeVdD1xzib7PjdT7Enx1Jsbxq5yZUX Rrz3AxKwzGokqWhMDpKlJtlP5x84eG/+YTYyv/UQ7DAg99eQ3xgz510FuAkpHdqVdJR/ IwLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to:subject :user-agent:mime-version:date:message-id:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=qgEG92Xup3/mVDZ3A5sVas1YVywyNuVA0qoL/v6KQmE=; b=kyQcgpYkckB6Huh30yPxJ9yY2r5aho0nvqIzFCB2XP83Q0a+4neJzCYYT0VAtRxwrc av4u87FJmWrBmtQANII0Ajv3ox1jCoYANDJ2PaIcVmXFccnIOQ4mH/mMG2h4VfsjJJiR lAocr3vNJB2awKZ2bj5eX6VpD5zZqyKR5DeUJBRLhVocOb0x83fCaG+5+GmQDJ2+bU7K L+LDmlRxhITK7KSQkxk3ziLkGMwhqcvLeekC6nE+JHPW0II7/OJrkMxzsEDGgHN1gVfx AgHrgja/OC5U+AUG6LruClwGgEzckS/Ib9NiqKqNIJi5zd4FArvHyQMGrZzImhaaVycQ gZAA== X-Gm-Message-State: ANoB5pltFFlTnGMk0fBpyVE8pReM9wpaksc+tP7Z1VIoYJ0SY1i18nFn t/UkRWzI73Xap1DkxWog1KzzLw== X-Google-Smtp-Source: AA0mqf6L7Mza3E/jBqky69qnp6QiDfXFXHjWoXZBBVdm93LL2vifNyClCRElRyHQAuOU7LZ1+o9YUA== X-Received: by 2002:a05:6402:1204:b0:461:e3f2:38bc with SMTP id c4-20020a056402120400b00461e3f238bcmr19406728edw.149.1668604154720; Wed, 16 Nov 2022 05:09:14 -0800 (PST) Received: from [192.168.31.208] ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id n11-20020a170906118b00b0078cb06c2ef9sm6824283eja.8.2022.11.16.05.09.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 16 Nov 2022 05:09:14 -0800 (PST) Message-ID: Date: Wed, 16 Nov 2022 14:09:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes To: Abel Vesa , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: Linux Kernel Mailing List , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Neil Armstrong References: <20221116130430.2812173-1-abel.vesa@linaro.org> <20221116130430.2812173-3-abel.vesa@linaro.org> From: Konrad Dybcio In-Reply-To: <20221116130430.2812173-3-abel.vesa@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 16/11/2022 14:04, Abel Vesa wrote: > Enable PCIe controllers and PHYs nodes on SM8550 MTP board. > > Co-developed-by: Neil Armstrong > Signed-off-by: Neil Armstrong > Signed-off-by: Abel Vesa > --- > arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts > index d4c8d5b2497e..93a676754666 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts > +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts > @@ -414,6 +414,31 @@ data-pins { > }; > }; > > +&pcie0 { > + wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; > + perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; These references should come before tlmm alphabetically. Konrad > + > +&pcie0_phy { > + vdda-phy-supply = <&vreg_l1e_0p88>; > + vdda-pll-supply = <&vreg_l3e_1p2>; > + status = "okay"; > +}; > + > +&pcie1 { > + wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; > + perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; > + status = "okay"; > +}; > + > +&pcie1_phy { > + vdda-phy-supply = <&vreg_l3c_0p91>; > + vdda-pll-supply = <&vreg_l3e_1p2>; > + vdda-qref-supply = <&vreg_l1e_0p88>; > + status = "okay"; > +}; > + > &uart7 { > status = "okay"; > };