From: Krzysztof Kozlowski <krzk@kernel.org>
To: Harikrishna Shenoy <h-shenoy@ti.com>,
nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, devarsht@ti.com, u-kumar1@ti.com,
s-jain1@ti.com
Subject: Re: [PATCH v2] arm64: dts: ti: k3-j721e-main: Add DSI and DPHY-TX
Date: Thu, 4 Sep 2025 13:02:03 +0200 [thread overview]
Message-ID: <f5953064-b369-4c17-ab09-d45a54f9d4f1@kernel.org> (raw)
In-Reply-To: <20250904105915.3043773-1-h-shenoy@ti.com>
On 04/09/2025 12:59, Harikrishna Shenoy wrote:
> + dsi0: dsi@4800000 {
> + compatible = "ti,j721e-dsi";
> + reg = <0x00 0x04800000 0x00 0x100000>, <0x00 0x04710000 0x00 0x100>;
> + clocks = <&k3_clks 150 1>, <&k3_clks 150 5>;
> + clock-names = "dsi_p_clk", "dsi_sys_clk";
> + power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
> + interrupt-parent = <&gic500>;
> + interrupts = <GIC_SPI 600 IRQ_TYPE_LEVEL_HIGH>;
> + phys = <&dphy_tx>;
> + phy-names = "dphy";
> + status = "disabled";
> +
> + dsi0_ports: ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
Missing ports. This is quite odd to see only cells here. You probably
wanted to omit endpoints, but ports are fixed per SoC.
> + };
> + };
> +
> dss: dss@4a00000 {
> compatible = "ti,j721e-dss";
> reg =
Best regards,
Krzysztof
prev parent reply other threads:[~2025-09-04 11:02 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-04 10:59 [PATCH v2] arm64: dts: ti: k3-j721e-main: Add DSI and DPHY-TX Harikrishna Shenoy
2025-09-04 11:02 ` Krzysztof Kozlowski [this message]
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