From: Michal Simek <michal.simek@xilinx.com>
To: linux-kernel@vger.kernel.org, monstr@monstr.eu,
michal.simek@xilinx.com, git@xilinx.com
Cc: Kalyani Akula <kalyani.akula@xilinx.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Manish Narani <manish.narani@xilinx.com>,
Michael Tretter <m.tretter@pengutronix.de>,
Nava kishore Manne <nava.manne@xilinx.com>,
Rajan Vaja <rajan.vaja@xilinx.com>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description
Date: Tue, 29 Sep 2020 13:43:22 +0200 [thread overview]
Message-ID: <f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com> (raw)
DT schema is checking tuples which should be properly separated. The patch
is doing this separation to avoid the following warning:
..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
any of the given schemas (Possible causes of the failure):
...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
I have seen one conversation about it but don't have link which I can point
to.
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 771f60e0346d..98073f3223e5 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -542,8 +542,8 @@ pcie: pcie@fd0e0000 {
<0x0 0xfd480000 0x0 0x1000>,
<0x80 0x00000000 0x0 0x1000000>;
reg-names = "breg", "pcireg", "cfg";
- ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */
- 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
+ ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
+ <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
bus-range = <0x00 0xff>;
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
--
2.28.0
next reply other threads:[~2020-09-29 11:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-29 11:43 Michal Simek [this message]
2020-10-02 2:02 ` [PATCH] arm64: dts: zynqmp: Fix pcie ranges description Laurent Pinchart
2020-10-02 6:30 ` Michal Simek
2020-11-25 12:28 ` Michal Simek
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