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Wed, 6 May 2026 09:09:38 -0500 Message-ID: Date: Wed, 6 May 2026 09:09:37 -0500 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/2] Add AM62P silicon revision detection via NVMEM To: Francesco Dolcini , Judith Mendez CC: Nishanth Menon , Vignesh Raghavendra , "Tero Kristo" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Santosh Shilimkar" , , , References: <20260209172330.53623-1-jm@ti.com> <20260506110920.GA53971@francesco-nb> Content-Language: en-US From: Andrew Davis In-Reply-To: <20260506110920.GA53971@francesco-nb> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003AE7:EE_|MW4PR10MB6371:EE_ X-MS-Office365-Filtering-Correlation-Id: 444555c7-966d-479f-b823-08deab791ce9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|376014|82310400026|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: I+BXGOpsP+97Beodch3wpDzPVvuEakvm9/kpyzp7CtEs6yCSDG++Rc3ccej7rq5pUXYeOvPMUYLnT0aFghg13kQTC5SAcEqVIrHQsiPSF5QtiAiFX/NQLNvupMrG6QJC0iWQIKNAM5MiCkmA/hga7/YbnwD4S6wfPi2KAsLQQwtkSk3JNOvREFFctzKQVvm5vucTTaBV4nDP5OwYsDtOHaIkmpiAibM02OUsPyvi6vTIWqG7wdBAHF0zHIMIflRpXXL+yxwuFIL+bBfhZt3FocsHbb94edxRFuZ3v5nBUKp9TuE70eNu8oFWNAcDQIFoFseMRJWq9C3ipTIr4h9mnoN3lIQP0d76wxcClA/jUHsX1wA5q4aJLiCEmnuADDk8NsBr+faPWoigOAum9Q6KlF9LLrbffu2XQ5aIXNEyz8YdGGPw1vtnJRNF49i6cSd2qvjfowMZwsrUpB2by4ZbaDAtVAyho19B2M2YnwHB8/5HWT8NQRHA2GdBX1rFFbUoQdNDc+ToCNkN9jtbhBC2YFGrG40Thj/2HWQYxKuyOOzia07KRLd4E/gAtMDDo7my+Ezjg5MHIGx/Q/GMwFJ3QuD7wMl88L5IeJ85sLK0piGzGMwuLYC6lF/Uq+KTPALd3exLHsYMtrmgjmJgNYGVZl4gywKQ+oP+CS7KK9Enahn+BH5Nc0P5Nb85FY8PKN+sfdg4o/YQwVW4Zj1MADFzseSydfX+4N3Bc5S7/nXvyNE= X-Forefront-Antispam-Report: CIP:198.47.21.195;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:flwvzet201.ext.ti.com;PTR:ErrorRetry;CAT:NONE;SFS:(13230040)(36860700016)(1800799024)(376014)(82310400026)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 4ojs9jw+csNf+xbGStoPLSxCqNHMIDjYvSTDlrRJO5E5PEN1FWi6zgaCFLVwZ6Rdg8Dr7YZR4AZ/JPwk7QMZtXkpg+vauFaTDNx3iCyaLIeYRo9CjhQn9fPw+SE2/FjUU3SZX73bXn3vtx9Ejemx8n46/gET/dyxqUgx2m2uD890XcNTyGOKx8x06c0qUUy/0r06cxzyVsFRwmIqQl4sf9HxbTYn38J/n54qlJZw/R0RvGYhqtAslLkMFNrCAjnk7H4edUDa35QT0SbbC4ZGPqhpAxUCrU9xPp5pdRPcSQ+rk5/Qd/ufB+vKlsKXokT+iwwrO1O+VETATGVIHFOn4N31Tk6k5yH4+zj+j/12xcLY85nrFpMfB/xgTUDlZHkIM/U6tulK/33BRHUmcS90RSr4eKBAEhqJK4msm9qcqaccD8mf9HH6uu2rLE3GCNsn X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 14:09:39.6986 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 444555c7-966d-479f-b823-08deab791ce9 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.195];Helo=[flwvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003AE7.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR10MB6371 On 5/6/26 6:09 AM, Francesco Dolcini wrote: > Hello Judith, > > On Mon, Feb 09, 2026 at 11:23:28AM -0600, Judith Mendez wrote: > > ... > >> - NVMEM support is fully optional - the driver continues to work without >> it and falls back to SR1.0 for AM62P devices > > Is this correct? Just wanted to be sure, given the issue we had with TI > 6.18 kernel on this very specific topic. > If you do not define an NVMEM node in DT then this driver falls back to SR1.0 and continues working. If you do define an NVMEN node but do not enable the NVMEM driver for that node then you will go into a probe defer loop as you found. This is a general issue not specific to this driver that could perhaps be solved by setting limits on probe reattempts, but that is outside the scope of this series. Andrew > Francesco >