[PATCH v3 0/4] arm64: exynos: gs101: add ACPM related nodes

[PATCH v3 0/4] arm64: exynos: gs101: add ACPM related nodes

[Tudor Ambarus]

Define SRAM, mailbox and ACPM protocol in device tree.
Enable the mailbox and ACPM protocol in defconfig.

Changes in v3:
- ACPM: don't specify the channel ID and type in DT: the channel ID is
  discovered at runtime and the channel type is always DOORBELL for the
  ACPM interface.
- mbox: update #mbox-cells = <0>;
- rebase on top of v6.13-rc3
- Link to v2: https://lore.kernel.org/r/20241212-b4-acpm-v4-upstream-dts-v2-0-91b7a6f6d0b0@linaro.org

Changes in v2:
- update nodes based on the bindings updates
- update mailbox and power-management (mailbox client) nodes to specify
  channel type (doorbell or data) and channel ID.

v1:
Link: https://lore.kernel.org/linux-arm-kernel/20241205180200.203146-1-tudor.ambarus@linaro.org/

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
Tudor Ambarus (4):
      arm64: dts: exynos: gs101: add SRAM node
      arm64: dts: exynos: gs101: add AP to APM mailbox node
      arm64: dts: exynos: gs101: add ACPM protocol node
      arm64: defconfig: enable ACPM protocol and Exynos mailbox

 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 25 +++++++++++++++++++++++++
 arch/arm64/configs/defconfig                 |  2 ++
 2 files changed, 27 insertions(+)
---
base-commit: 78d4f34e2115b517bcbfe7ec0d018bbbb6f9b0b8
change-id: 20241220-gs101-acpm-dt-6dcde166530a

Best regards,
-- 
Tudor Ambarus <tudor.ambarus@linaro.org>

[PATCH v3 1/4] arm64: dts: exynos: gs101: add SRAM node

[Tudor Ambarus]

SRAM is used by the ACPM protocol to retrieve the ACPM channels
information, which includes the TX/RX rings among other channel
configuration data. Add the SRAM node.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 302c5beb224a..1441e9a252c2 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -269,6 +269,14 @@ bldr_log_hist_reserved: bldr-log-hist-reserved@fd900000 {
 		};
 	};
 
+	apm_sram: sram@2039000 {
+		compatible = "mmio-sram";
+		reg = <0x0 0x2039000 0x40000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x0 0x2039000 0x40000>;
+	};
+
 	soc: soc@0 {
 		compatible = "simple-bus";
 		#address-cells = <1>;

-- 
2.47.1.613.gc27f4b7a9f-goog

[PATCH v3 2/4] arm64: dts: exynos: gs101: add AP to APM mailbox node

[Tudor Ambarus]

GS101 has 14 mailbox controllers. Add the AP to APM mailbox node.

Mailbox controllers have a shared register that can be used for passing
the mailbox messages. The AP to APM mailbox controller is used just as a
doorbell mechanism. It raises interrupt to the firmware after the mailbox
message has been written to SRAM where the TX/RX rings are defined.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 1441e9a252c2..6947dd081a0e 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1445,6 +1445,15 @@ wakeup-interrupt-controller {
 			};
 		};
 
+		ap2apm_mailbox: mailbox@17610000 {
+			compatible = "google,gs101-mbox";
+			reg = <0x17610000 0x1000>;
+			clocks = <&cmu_apm CLK_GOUT_APM_MAILBOX_APM_AP_PCLK>;
+			clock-names = "pclk";
+			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH 0>;
+			#mbox-cells = <0>;
+		};
+
 		pinctrl_gsactrl: pinctrl@17940000 {
 			compatible = "google,gs101-pinctrl";
 			reg = <0x17940000 0x00001000>;

-- 
2.47.1.613.gc27f4b7a9f-goog

Re: [PATCH v3 2/4] arm64: dts: exynos: gs101: add AP to APM mailbox node

[Krzysztof Kozlowski]

On 20/12/2024 15:45, Tudor Ambarus wrote:
> GS101 has 14 mailbox controllers. Add the AP to APM mailbox node.
> 
> Mailbox controllers have a shared register that can be used for passing
> the mailbox messages. The AP to APM mailbox controller is used just as a
> doorbell mechanism. It raises interrupt to the firmware after the mailbox
> message has been written to SRAM where the TX/RX rings are defined.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index 1441e9a252c2..6947dd081a0e 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -1445,6 +1445,15 @@ wakeup-interrupt-controller {
>  			};
>  		};
>  
> +		ap2apm_mailbox: mailbox@17610000 {
> +			compatible = "google,gs101-mbox";


I don't think I have this in my tree and cover letter does not explain
where I can find bindings. Nothing in next from few days ago. Always
document in DTS patchset where are the bindings, unless it's obvious.

Best regards,
Krzysztof

Re: [PATCH v3 2/4] arm64: dts: exynos: gs101: add AP to APM mailbox node

[Tudor Ambarus]

On 12/22/24 11:47 AM, Krzysztof Kozlowski wrote:
> On 20/12/2024 15:45, Tudor Ambarus wrote:
>> GS101 has 14 mailbox controllers. Add the AP to APM mailbox node.
>>
>> Mailbox controllers have a shared register that can be used for passing
>> the mailbox messages. The AP to APM mailbox controller is used just as a
>> doorbell mechanism. It raises interrupt to the firmware after the mailbox
>> message has been written to SRAM where the TX/RX rings are defined.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
>> ---
>>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 9 +++++++++
>>  1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> index 1441e9a252c2..6947dd081a0e 100644
>> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
>> @@ -1445,6 +1445,15 @@ wakeup-interrupt-controller {
>>  			};
>>  		};
>>  
>> +		ap2apm_mailbox: mailbox@17610000 {
>> +			compatible = "google,gs101-mbox";
> 
> 
> I don't think I have this in my tree and cover letter does not explain
> where I can find bindings. Nothing in next from few days ago. Always
> document in DTS patchset where are the bindings, unless it's obvious.
> 

Noted, will add such details. For the reference the bindings are part of
these patch sets:
https://lore.kernel.org/linux-arm-kernel/20241220-acpm-v4-upstream-mbox-v6-0-a6942806e52a@linaro.org/
https://lore.kernel.org/linux-arm-kernel/20241220-gs101-acpm-v5-0-4f26b7fb3f5f@linaro.org/

I'll ping you once we all have an agreement on the bindings. I'm still
waiting for Jassi to let me know if he's fine with dropping the channel
type argument for the ACPM use case or not. ACPM always uses the mailbox
channel in DOORBELL mode, but this info can't be retrieved from SRAM at
runtime. Jassi suggested that I shall pass the channel type via DT.
While I don't mind, I don't find this necessary. Discussion at:
https://lore.kernel.org/linux-arm-kernel/eaab647a-f6f4-4562-89fa-e64daa80bdf4@linaro.org/

Thanks!
ta

[PATCH v3 3/4] arm64: dts: exynos: gs101: add ACPM protocol node

[Tudor Ambarus]

Add the ACPM protocol node. ACPM protocol provides interface for all
the client drivers making use of the features offered by the
Active Power Management (APM) module.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 6947dd081a0e..681ea775ba54 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -277,6 +277,14 @@ apm_sram: sram@2039000 {
 		ranges = <0x0 0x0 0x2039000 0x40000>;
 	};
 
+	firmware {
+		acpm_ipc: power-management {
+			compatible = "google,gs101-acpm-ipc";
+			mboxes = <&ap2apm_mailbox>;
+			shmem = <&apm_sram>;
+		};
+	};
+
 	soc: soc@0 {
 		compatible = "simple-bus";
 		#address-cells = <1>;

-- 
2.47.1.613.gc27f4b7a9f-goog

[PATCH v3 4/4] arm64: defconfig: enable ACPM protocol and Exynos mailbox

[Tudor Ambarus]

Enable the Samsung Exynos ACPM protocol and its transport layer, the
Exynos mailbox driver. Samsung Exynos platforms implement ACPM to
provide support for PMIC, clock frequency scaling, clock configuration
and temperature sensors.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
---
 arch/arm64/configs/defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c62831e61586..91139b1cf813 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -262,6 +262,7 @@ CONFIG_IMX_SCU=y
 CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE=y
 CONFIG_QCOM_QSEECOM=y
 CONFIG_QCOM_QSEECOM_UEFISECAPP=y
+CONFIG_EXYNOS_ACPM_PROTOCOL=m
 CONFIG_GNSS=m
 CONFIG_GNSS_MTK_SERIAL=m
 CONFIG_MTD=y
@@ -1378,6 +1379,7 @@ CONFIG_HWSPINLOCK_QCOM=y
 CONFIG_TEGRA186_TIMER=y
 CONFIG_RENESAS_OSTM=y
 CONFIG_ARM_MHU=y
+CONFIG_EXYNOS_MBOX=m
 CONFIG_IMX_MBOX=y
 CONFIG_OMAP2PLUS_MBOX=m
 CONFIG_PLATFORM_MHU=y

-- 
2.47.1.613.gc27f4b7a9f-goog

Re: [PATCH v3 0/4] arm64: exynos: gs101: add ACPM related nodes

[Krzysztof Kozlowski]

On 20/12/2024 15:45, Tudor Ambarus wrote:
> Define SRAM, mailbox and ACPM protocol in device tree.
> Enable the mailbox and ACPM protocol in defconfig.
> 
> Changes in v3:
> - ACPM: don't specify the channel ID and type in DT: the channel ID is
>   discovered at runtime and the channel type is always DOORBELL for the
>   ACPM interface.
> - mbox: update #mbox-cells = <0>;
> - rebase on top of v6.13-rc3
> - Link to v2: https://lore.kernel.org/r/20241212-b4-acpm-v4-upstream-dts-v2-0-91b7a6f6d0b0@linaro.org
> 
> Changes in v2:
> - update nodes based on the bindings updates
> - update mailbox and power-management (mailbox client) nodes to specify
>   channel type (doorbell or data) and channel ID.
> 
> v1:
> Link: https://lore.kernel.org/linux-arm-kernel/20241205180200.203146-1-tudor.ambarus@linaro.org/
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
> Tudor Ambarus (4):
>       arm64: dts: exynos: gs101: add SRAM node
>       arm64: dts: exynos: gs101: add AP to APM mailbox node


Please ping me when the mailbox driver bindings get accepted.

Best regards,
Krzysztof