Re: [PATCH 1/3] arm64: dts: qcom: Add header file for ADC5 Gen3 channel macros

[Neil Armstrong <neil.armstrong@linaro.org>]

On 6/15/26 18:48, Konrad Dybcio wrote:
> On 6/15/26 6:39 PM, Neil Armstrong wrote:
>> Hi,
>>
>> On 6/15/26 17:55, Konrad Dybcio wrote:
>>> On 4/30/26 10:58 AM, Jishnu Prakash wrote:
>>>> Add macro definitions for virtual channels (combination of ADC channel
>>>> number and PMIC SID number), to be used in devicetree by clients of ADC5
>>>> GEN3 device and in the "reg" property of ADC channels.
>>>>
>>>> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
>>>> ---
>>>
>>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>
>> And what happens with my patch [1] ?
>>
>> I had zero feedback so far
>>
>> [1] https://lore.kernel.org/all/20260504-topic-sm8x50-adc5-gen3-v2-1-5cc04d6ecda0@linaro.org/
> 
> I think this approach (single generic header) is better. The existing
> ADC7 bindings which your series draws inspiration from come with a ton
> of boilerplate.
> 
> There are some non-trivial mappings in there though, e.g.:
> 
> +#define PM8550B_ADC5_GEN3_AMUX4_GPIO12_100K_PU(sid)		((sid) << 8 | ADC5_GEN3_AMUX4_GPIO_100K_PU)
> 
> but these would presumably be deducible from downstream

I'll try to rebase on this patch, seems all the values are defined, I just need to match the old and new defines

Neil

> 
> Konrad