From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Alex Soo <yuklin.soo@starfivetech.com>,
Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>,
Hal Feng <hal.feng@starfivetech.com>,
Ley Foon Tan <leyfoon.tan@starfivetech.com>,
Jianlong Huang <jianlong.huang@starfivetech.com>,
Emil Renner Berthing <kernel@esmil.dk>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Drew Fustini <drew@beagleboard.org>
Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>
Subject: Re: [RFC PATCH 6/6] riscv: dts: starfive: jh8100: add pinctrl device tree nodes
Date: Thu, 21 Dec 2023 16:53:11 +0100 [thread overview]
Message-ID: <f72b6ea4-a99b-4821-bb35-ee47b7b5cb8f@linaro.org> (raw)
In-Reply-To: <20231221083622.3445726-7-yuklin.soo@starfivetech.com>
On 21/12/2023 09:36, Alex Soo wrote:
> Add pinctrl_east/pinctrl_west/pinctrl_gmac/pinctrl_aon device
> tree nodes for JH8100 SoC.
>
> Signed-off-by: Alex Soo <yuklin.soo@starfivetech.com>
> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
I have some doubts about it...
> ---
> arch/riscv/boot/dts/starfive/jh8100-evb.dts | 5 +
> arch/riscv/boot/dts/starfive/jh8100-pinfunc.h | 418 ++++++++++++++++++
> arch/riscv/boot/dts/starfive/jh8100.dtsi | 44 ++
> 3 files changed, 467 insertions(+)
> create mode 100644 arch/riscv/boot/dts/starfive/jh8100-pinfunc.h
>
> diff --git a/arch/riscv/boot/dts/starfive/jh8100-evb.dts b/arch/riscv/boot/dts/starfive/jh8100-evb.dts
> index c16bc25d8988..8634e41984f8 100644
> --- a/arch/riscv/boot/dts/starfive/jh8100-evb.dts
> +++ b/arch/riscv/boot/dts/starfive/jh8100-evb.dts
> @@ -26,3 +26,8 @@ memory@40000000 {
> &uart0 {
> status = "okay";
> };
> +
> +&pinctrl_aon {
Wrong order. Nodes do not go to the end.
> + wakeup-gpios = <&pinctrl_aon PAD_RGPIO2 GPIO_ACTIVE_HIGH>;
> + wakeup-source;
None of these were tested.
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh8100-pinfunc.h b/arch/riscv/boot/dts/starfive/jh8100-pinfunc.h
> new file mode 100644
> index 000000000000..3fb16ef62d90
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh8100-pinfunc.h
> @@ -0,0 +1,418 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR MIT */
> +/*
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> + * Author: Alex Soo <yuklin.soo@starfivetech.com>
> + *
> + */
> +
> +#ifndef __JH8100_PINFUNC_H__
> +#define __JH8100_PINFUNC_H__
> +
> +/*
> + * mux bits:
> + * | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 |
> + * | din | dout | doen | function | gpio nr |
> + *
> + * dout: output signal
> + * doen: output enable signal
> + * din: optional input signal, 0xff = none
> + * function:
> + * gpio nr: gpio number, 0 - 63
> + */
> +#define GPIOMUX(n, dout, doen, din) ( \
> + (((din) & 0xff) << 24) | \
> + (((dout) & 0xff) << 16) | \
> + (((doen) & 0x3f) << 10) | \
> + ((n) & 0x3f))
> +
> +#define PINMUX(n, func) ((1 << 10) | (((func) & 0x3) << 8) | ((n) & 0xff))
> +
> +/* sys_iomux_east dout */
> +#define GPOUT_LOW 0
> +#define GPOUT_HIGH 1
Where are these used?
> +#define GPOUT_SYS_CAN0_STBY 2
> +#define GPOUT_SYS_CAN0_TST_NEXT_BIT 3
> +#define GPOUT_SYS_CAN0_TST_SAMPLE_POINT 4
> +#define GPOUT_SYS_CAN0_TXD 5
> +#define GPOUT_SYS_I2C0_CLK 6
> +#define GPOUT_SYS_I2C0_DATA 7
> +#define GPOUT_SYS_I2S0_STEREO_RSCKO 8
You add here bunch of constants not used anywhere. No single example of
their usage, not a one.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-12-21 15:53 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-21 8:36 [RFC PATCH 0/6] Add Pinctrl driver for Starfive JH8100 SoC Alex Soo
2023-12-21 8:36 ` [RFC PATCH 1/6] dt-bindings: pinctrl: starfive: add JH8100 pinctrl bindings Alex Soo
2023-12-21 9:25 ` Rob Herring
2023-12-21 13:57 ` Linus Walleij
2023-12-21 15:45 ` Krzysztof Kozlowski
2024-01-04 3:12 ` Yuklin Soo
2024-01-04 18:07 ` Conor Dooley
2024-01-04 2:57 ` Yuklin Soo
2023-12-21 15:49 ` Krzysztof Kozlowski
2024-02-07 2:42 ` Yuklin Soo
2024-02-20 8:09 ` Krzysztof Kozlowski
2024-03-05 12:00 ` Yuklin Soo
2024-03-05 14:07 ` Krzysztof Kozlowski
2024-03-27 11:25 ` Yuklin Soo
2023-12-21 8:36 ` [RFC PATCH 2/6] pinctrl: starfive: jh8100: add pinctrl driver for sys_east domain Alex Soo
2024-01-27 23:33 ` Linus Walleij
2024-02-20 5:55 ` Yuklin Soo
2023-12-21 8:36 ` [RFC PATCH 3/6] pinctrl: starfive: jh8100: add pinctrl driver for sys_west domain Alex Soo
2023-12-21 8:36 ` [RFC PATCH 4/6] pinctrl: starfive: jh8100: add pinctrl driver for sys_gmac domain Alex Soo
2023-12-21 8:36 ` [RFC PATCH 5/6] pinctrl: starfive: jh8100: add pinctrl driver for AON domain Alex Soo
2023-12-21 8:36 ` [RFC PATCH 6/6] riscv: dts: starfive: jh8100: add pinctrl device tree nodes Alex Soo
2023-12-21 15:53 ` Krzysztof Kozlowski [this message]
2024-02-07 3:09 ` Yuklin Soo
2023-12-21 16:19 ` [RFC PATCH 0/6] Add Pinctrl driver for Starfive JH8100 SoC Krzysztof Kozlowski
2024-01-04 8:28 ` Yuklin Soo
2023-12-22 17:58 ` Linus Walleij
2024-02-20 5:38 ` Yuklin Soo
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