Re: [PATCH v4 1/2] arm64: dts: qcom: talos: Add GPR node, audio services, and MI2S1 TLMM pins

[Le Qi <le.qi@oss.qualcomm.com>]

On 3/30/2026 9:57 PM, Bjorn Andersson wrote:
> On Tue, Mar 24, 2026 at 02:04:04PM +0800, Le Qi wrote:
>> This patch adds the Generic Pack Router (GPR) node together with
> 
> Please avoid phrases such as "This patch". Start your commit message
> with a description of the problem or purpose of the patch.
> 
>> Audio Process Manager (APM) and Proxy Resource Manager (PRM)
>> audio service nodes to the Talos device tree description.
>>
>> It also introduces MI2S1 pinctrl states for data0, data1, sck,
>> and ws lines, grouped into a single entry at the SoC-level DTSI
>> for better reuse and clarity.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>> Signed-off-by: Le Qi <le.qi@oss.qualcomm.com>
>> ---
>>   arch/arm64/boot/dts/qcom/talos.dtsi | 54 +++++++++++++++++++++++++++++
>>   1 file changed, 54 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
>> index f69a40fb8e28..cd451a112573 100644
>> --- a/arch/arm64/boot/dts/qcom/talos.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/talos.dtsi
>> @@ -19,6 +19,7 @@
>>   #include <dt-bindings/power/qcom-rpmpd.h>
>>   #include <dt-bindings/power/qcom,rpmhpd.h>
>>   #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>> +#include <dt-bindings/soc/qcom,gpr.h>
> 
> Keep includes sorted alphabetically.
> 
Will modify in next patch, thanks.

> Regards,
> Bjorn
> 
>>   
>>   / {
>>   	interrupt-parent = <&intc>;
>> @@ -1553,6 +1554,20 @@ tlmm: pinctrl@3100000 {
>>   			#interrupt-cells = <2>;
>>   			wakeup-parent = <&pdc>;
>>   
>> +			mi2s1_pins: mi2s1-state {
>> +				pins = "gpio108", "gpio109", "gpio110", "gpio111";
>> +				function = "mi2s_1";
>> +				drive-strength = <8>;
>> +				bias-disable;
>> +			};
>> +
>> +			mi2s_mclk: mi2s-mclk-state {
>> +					pins = "gpio122";
>> +					function = "mclk2";
>> +					drive-strength = <8>;
>> +					bias-disable;
>> +			};
>> +
>>   			qup_i2c1_data_clk: qup-i2c1-data-clk-state {
>>   				pins = "gpio4", "gpio5";
>>   				function = "qup0";
>> @@ -4696,6 +4711,45 @@ compute-cb@6 {
>>   						dma-coherent;
>>   					};
>>   				};
>> +
>> +				gpr: gpr {
>> +					compatible = "qcom,gpr";
>> +					qcom,glink-channels = "adsp_apps";
>> +					qcom,domain = <GPR_DOMAIN_ID_ADSP>;
>> +					qcom,intents = <512 20>;
>> +					#address-cells = <1>;
>> +					#size-cells = <0>;
>> +
>> +					q6apm: service@1 {
>> +						compatible = "qcom,q6apm";
>> +						reg = <GPR_APM_MODULE_IID>;
>> +						#sound-dai-cells = <0>;
>> +						qcom,protection-domain = "avs/audio",
>> +									 "msm/adsp/audio_pd";
>> +
>> +						q6apmbedai: bedais {
>> +							compatible = "qcom,q6apm-lpass-dais";
>> +							#sound-dai-cells = <1>;
>> +						};
>> +
>> +						q6apmdai: dais {
>> +							compatible = "qcom,q6apm-dais";
>> +							iommus = <&apps_smmu 0x1721 0x0>;
>> +						};
>> +					};
>> +
>> +					q6prm: service@2 {
>> +						compatible = "qcom,q6prm";
>> +						reg = <GPR_PRM_MODULE_IID>;
>> +						qcom,protection-domain = "avs/audio",
>> +									 "msm/adsp/audio_pd";
>> +
>> +						q6prmcc: clock-controller {
>> +							compatible = "qcom,q6prm-lpass-clocks";
>> +							#clock-cells = <2>;
>> +						};
>> +					};
>> +				};
>>   			};
>>   		};
>>   
>> -- 
>> 2.34.1
>>


-- 
Thx and BRs,
Le Qi