* [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display
@ 2025-04-02 7:07 Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 1/9] dt-bindings: arm: fsl: Add " Maud Spierings via B4 Relay
` (8 more replies)
0 siblings, 9 replies; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings,
Frank Li
Add inital support for 2 variants of the Moduline Display controller.
This system is powered by the Ka-Ro Electronics tx8p-ml81 COM, which
features an imx8mp SoC.
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
Changes in v4:
- Add imx mailing list to ka-ro tx8p maintainer entry
- Fix several small indentation and ordering issues in devicetrees
- Change the two display adapter boards to overlays
- Add the missing patch for the Makefile to actually be able to build
the new devicetrees
- Link to v3: https://lore.kernel.org/r/20250327-initial_display-v3-0-4e89ea1676ab@gocontroll.com
Changes in v3:
- Set regulator-boot-on and always-on on LDO5 of the pmic, after 20 ish
seconds it auto disabled this LDO causing weird behaviour like
ethernet droping out, wifi not working anymore. This LDO can control
the IO voltage level of certain pins, just let it keep the u-boot
value.
- Fix the comment style in imx8mp-pinfunc.h
- Rebase on newest next tag
- Link to v2: https://lore.kernel.org/r/20250226-initial_display-v2-0-23fafa130817@gocontroll.com
Changes in v2:
- Dropped the trivial-devices patch
- Added a patch with bindings for the gocontroll,moduline-module-slot
- Added a patch to spidev.c to enable the spidev driver for the module
slot
- Added a missing usb-c connector in the av101hdt-a10 variant dts
- Switched to the new bindings for the module slots in the base dts
- Fixed some commit typos
- Link to v1: https://lore.kernel.org/r/20250224-initial_display-v1-0-5ccbbf613543@gocontroll.com
---
Maud Spierings (9):
dt-bindings: arm: fsl: Add GOcontroll Moduline Display
arm64: dts: imx8mp: Add pinctrl config definitions
MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module
MAINTAINERS: add maintainer for the GOcontroll Moduline controllers
arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM
arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard
arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Display
arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display
arm64: dts: Add Moduline Display boards to Makefile
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
MAINTAINERS | 13 +
arch/arm64/boot/dts/freescale/Makefile | 6 +
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 33 ++
...x8p-ml81-moduline-display-106-av101hdt-a10.dtso | 102 ++++
...x8p-ml81-moduline-display-106-av123z7m-n17.dtso | 139 ++++++
.../imx8mp-tx8p-ml81-moduline-display-106.dts | 525 ++++++++++++++++++++
.../arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi | 548 +++++++++++++++++++++
8 files changed, 1367 insertions(+)
---
base-commit: 5a8989cc1b2d2b181d72ea291c82267ce51f517d
change-id: 20250224-initial_display-fa82218e06e5
Best regards,
--
Maud Spierings <maudspierings@gocontroll.com>
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v4 1/9] dt-bindings: arm: fsl: Add GOcontroll Moduline Display
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 2/9] arm64: dts: imx8mp: Add pinctrl config definitions Maud Spierings via B4 Relay
` (7 subsequent siblings)
8 siblings, 0 replies; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
Document the compatible strings for the Moduline Display controller.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 1b90870958a22e49355dd1f932bf3d84cd864b5f..ecde2123ea0fae38ef233929c7ad343812851a58 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -1095,6 +1095,7 @@ properties:
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw82xx-2x # i.MX8MP Gateworks Board
+ - gocontroll,moduline-display # GOcontroll Moduline Display controller
- skov,imx8mp-skov-basic # SKOV i.MX8MP baseboard without frontplate
- skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel
- skov,imx8mp-skov-revb-lt6 # SKOV i.MX8MP climate control with 7” panel
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 2/9] arm64: dts: imx8mp: Add pinctrl config definitions
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 1/9] dt-bindings: arm: fsl: Add " Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module Maud Spierings via B4 Relay
` (6 subsequent siblings)
8 siblings, 0 replies; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings,
Frank Li
From: Maud Spierings <maudspierings@gocontroll.com>
Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
This patch has already been sent in a different group of patches: [1]
It was requested there to submit it along with a user, this series also
includes some users for it.
[1]: https://lore.kernel.org/all/20250218-pinctrl_defines-v2-2-c554cad0e1d2@gocontroll.com/
---
arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 33 ++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
index 0fef066471ba607be02d0ab15da5a048a8a213a7..19a23d148246f4fb990050a9d06d20b6e769f254 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
+++ b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
@@ -6,6 +6,39 @@
#ifndef __DTS_IMX8MP_PINFUNC_H
#define __DTS_IMX8MP_PINFUNC_H
+/* Drive Strength */
+#define MX8MP_DSE_X1 0x0
+#define MX8MP_DSE_X2 0x4
+#define MX8MP_DSE_X4 0x2
+#define MX8MP_DSE_X6 0x6
+
+/* Slew Rate */
+#define MX8MP_FSEL_FAST 0x10
+#define MX8MP_FSEL_SLOW 0x0
+
+/* Open Drain */
+#define MX8MP_ODE_ENABLE 0x20
+#define MX8MP_ODE_DISABLE 0x0
+
+#define MX8MP_PULL_DOWN 0x0
+#define MX8MP_PULL_UP 0x40
+
+/* Hysteresis */
+#define MX8MP_HYS_CMOS 0x0
+#define MX8MP_HYS_SCHMITT 0x80
+
+#define MX8MP_PULL_ENABLE 0x100
+#define MX8MP_PULL_DISABLE 0x0
+
+/* SION force input mode */
+#define MX8MP_SION 0x40000000
+
+/* long defaults */
+#define MX8MP_USDHC_DATA_DEFAULT (MX8MP_FSEL_FAST | MX8MP_PULL_UP | \
+ MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+#define MX8MP_I2C_DEFAULT (MX8MP_DSE_X6 | MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | \
+ MX8MP_PULL_ENABLE | MX8MP_SION)
+
/*
* The pin function ID is a tuple of
* <mux_reg conf_reg input_reg mux_mode input_val>
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 1/9] dt-bindings: arm: fsl: Add " Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 2/9] arm64: dts: imx8mp: Add pinctrl config definitions Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-03 7:45 ` Krzysztof Kozlowski
2025-04-02 7:07 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllers Maud Spierings via B4 Relay
` (5 subsequent siblings)
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
Add GOcontroll as unofficial maintainers of the Ka-Ro tx8p-ml81 COM
module bindings.
This support is not officially done by Ka-Ro electronics, if they at
some point will supporting mainline, this should be changed to them.
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 322ee00547f6e494a96d2495092f72148da22bd0..4b3864a9852f9fca2be48987d383c0671e668336 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12752,6 +12752,13 @@ S: Maintained
F: Documentation/hwmon/k8temp.rst
F: drivers/hwmon/k8temp.c
+KA-RO TX8P COM MODULE
+M: Maud Spierings <maudspierings@gocontroll.com>
+L: devicetree@vger.kernel.org
+L: imx@lists.linux.dev
+S: Maintained
+F: arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
+
KASAN
M: Andrey Ryabinin <ryabinin.a.a@gmail.com>
R: Alexander Potapenko <glider@google.com>
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllers
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
` (2 preceding siblings ...)
2025-04-02 7:07 ` [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 19:17 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy Frank Li
2025-04-02 7:07 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM Maud Spierings via B4 Relay
` (4 subsequent siblings)
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
Add a maintainer for the GOcontroll Moduline series of controllers.
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
MAINTAINERS | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4b3864a9852f9fca2be48987d383c0671e668336..7d4fbfdaaac1776fc7c4a569f7ab667f0a485eab 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10043,6 +10043,12 @@ L: linux-media@vger.kernel.org
S: Maintained
F: drivers/media/usb/go7007/
+GOCONTROLL MODULINE CONTROLLERS
+M: Maud Spierings <maudspierings@gocontroll.com>
+L: devicetree@vger.kernel.org
+S: Maintained
+F: arch/arm64/boot/dts/freescale/*moduline*.dts*
+
GOCONTROLL MODULINE MODULE SLOT
M: Maud Spierings <maudspierings@gocontroll.com>
S: Maintained
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
` (3 preceding siblings ...)
2025-04-02 7:07 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllers Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 19:24 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COMy Frank Li
2025-04-02 7:07 ` [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard Maud Spierings via B4 Relay
` (3 subsequent siblings)
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
The Ka-Ro Electronics tx8p-ml81 is a COM based on the imx8mp SOC. It has
2 GB or ram and 8 GB of eMMC storage on board.
Add it to enable boards based on this Module
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
.../arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi | 548 +++++++++++++++++++++
1 file changed, 548 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
new file mode 100644
index 0000000000000000000000000000000000000000..9c69228a2cd28ce767fa4054d10b19a196668ea2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
@@ -0,0 +1,548 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2020 Lothar Waßmann <LW@KARO-electronics.de>
+ * 2025 Maud Spierings <maudspierings@gocontroll.com>
+ */
+
+#include "imx8mp.dtsi"
+
+/ {
+ /* PHY regulator */
+ regulator-3v3-etn {
+ compatible = "regulator-fixed";
+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_reg_3v3_etn>;
+ pinctrl-names = "default";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "3v3-etn";
+ vin-supply = <®_vdd_3v3>;
+ enable-active-high;
+ };
+};
+
+&A53_0 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&A53_1 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&A53_2 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&A53_3 {
+ cpu-supply = <®_vdd_arm>;
+};
+
+&eqos {
+ assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
+ <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
+ <&clk IMX8MP_CLK_ENET_QOS>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+ <&clk IMX8MP_SYS_PLL2_100M>,
+ <&clk IMX8MP_SYS_PLL2_50M>;
+ assigned-clock-rates = <0>, <100000000>, <50000000>;
+ phy-handle = <ðphy0>;
+ phy-mode = "rmii";
+ pinctrl-0 = <&pinctrl_eqos>;
+ pinctrl-1 = <&pinctrl_eqos_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pinctrl_ethphy_rst_b>;
+ pinctrl-names = "default";
+ reset-delay-us = <25000>;
+ reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
+ clocks = <&clk IMX8MP_CLK_ENET_QOS>;
+ pinctrl-0 = <&pinctrl_ethphy_int_b>;
+ pinctrl-names = "default";
+ smsc,disable-energy-detect;
+ };
+ };
+};
+
+&gpio1 {
+ gpio-line-names = "SODIMM_152",
+ "SODIMM_42",
+ "PMIC_WDOG_B SODIMM_153",
+ "PMIC_IRQ_B",
+ "SODIMM_154",
+ "SODIMM_155",
+ "SODIMM_156",
+ "SODIMM_157",
+ "SODIMM_158",
+ "SODIMM_159",
+ "SODIMM_161",
+ "SODIMM_162",
+ "SODIMM_34",
+ "SODIMM_36",
+ "SODIMM_27",
+ "SODIMM_28",
+ "ENET_MDC",
+ "ENET_MDIO",
+ "",
+ "ENET_XTAL1/CLKIN",
+ "ENET_TXD1",
+ "ENET_TXD0",
+ "ENET_TXEN",
+ "ENET_POWER",
+ "ENET_COL/CRS_DV",
+ "ENET_RXER",
+ "ENET_RXD0",
+ "ENET_RXD1",
+ "",
+ "",
+ "",
+ "";
+};
+
+&gpio2 {
+ gpio-line-names = "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "SODIMM_51",
+ "SODIMM_57",
+ "SODIMM_56",
+ "SODIMM_52",
+ "SODIMM_53",
+ "SODIMM_54",
+ "SODIMM_55",
+ "SODIMM_15",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "",
+ "";
+};
+
+&gpio3 {
+ gpio-line-names = "",
+ "",
+ "EMMC_DS",
+ "EMMC_DAT5",
+ "EMMC_DAT6",
+ "EMMC_DAT7",
+ "",
+ "",
+ "",
+ "",
+ "EMMC_DAT0",
+ "EMMC_DAT1",
+ "EMMC_DAT2",
+ "EMMC_DAT3",
+ "",
+ "EMMC_DAT4",
+ "",
+ "EMMC_CLK",
+ "EMMC_CMD",
+ "SODIMM_75",
+ "SODIMM_145",
+ "SODIMM_163",
+ "SODIMM_164",
+ "SODIMM_165",
+ "SODIMM_143",
+ "SODIMM_144",
+ "SODIMM_72",
+ "SODIMM_73",
+ "SODIMM_74",
+ "SODIMM_93",
+ "",
+ "";
+};
+
+&gpio4 {
+ gpio-line-names = "SODIMM_98",
+ "SODIMM_99",
+ "SODIMM_100",
+ "SODIMM_101",
+ "SODIMM_45",
+ "SODIMM_43",
+ "SODIMM_105",
+ "SODIMM_106",
+ "SODIMM_107",
+ "SODIMM_108",
+ "SODIMM_104",
+ "SODIMM_103",
+ "SODIMM_115",
+ "SODIMM_114",
+ "SODIMM_113",
+ "SODIMM_112",
+ "SODIMM_109",
+ "SODIMM_110",
+ "SODIMM_95",
+ "SODIMM_96",
+ "SODIMM_97",
+ "ENET_nINT",
+ "ENET_nRST",
+ "SODIMM_84",
+ "SODIMM_87",
+ "SODIMM_86",
+ "SODIMM_85",
+ "SODIMM_83",
+ "",
+ "SODIMM_66",
+ "SODIMM_65",
+ "";
+};
+
+&gpio5 {
+ gpio-line-names = "",
+ "",
+ "",
+ "SODIMM_76",
+ "SODIMM_81",
+ "SODIMM_146",
+ "SODIMM_48",
+ "SODIMM_46",
+ "SODIMM_47",
+ "SODIMM_44",
+ "SODIMM_49",
+ "",
+ "SODIMM_70",
+ "SODIMM_69",
+ "PMIC_SCL",
+ "PMIC_SDA",
+ "SODIMM_41",
+ "SODIMM_40",
+ "SODIMM_148",
+ "SODIMM_149",
+ "SODIMM_150",
+ "SODIMM_151",
+ "SODIMM_60",
+ "SODIMM_59",
+ "SODIMM_64",
+ "SODIMM_63",
+ "SODIMM_62",
+ "SODIMM_61",
+ "SODIMM_68",
+ "SODIMM_67",
+ "",
+ "";
+};
+
+&i2c1 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_i2c1>;
+ pinctrl-1 = <&pinctrl_i2c1_gpio>;
+ pinctrl-names = "default", "gpio";
+ scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+
+ pmic@25 {
+ compatible = "nxp,pca9450c";
+ reg = <0x25>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-0 = <&pinctrl_pmic>;
+ pinctrl-names = "default";
+
+ regulators {
+ reg_vdd_soc: BUCK1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <900000>;
+ regulator-min-microvolt = <805000>;
+ regulator-name = "vdd-soc";
+ regulator-ramp-delay = <3125>;
+ };
+
+ reg_vdd_arm: BUCK2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <950000>;
+ regulator-min-microvolt = <805000>;
+ regulator-name = "vdd-core";
+ regulator-ramp-delay = <3125>;
+ nxp,dvs-run-voltage = <950000>;
+ nxp,dvs-standby-voltage = <850000>;
+ };
+
+ reg_vdd_3v3: BUCK4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "3v3";
+ };
+
+ reg_nvcc_nand: BUCK5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "nvcc-nand";
+ };
+
+ reg_nvcc_dram: BUCK6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1100000>;
+ regulator-min-microvolt = <1100000>;
+ regulator-name = "nvcc-dram";
+ };
+
+ reg_snvs_1v8: LDO1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "snvs-1v8";
+ };
+
+ ldo2_reg: LDO2 {
+ regulator-always-on;
+ regulator-max-microvolt = <1150000>;
+ regulator-min-microvolt = <800000>;
+ regulator-name = "LDO2";
+ };
+
+ reg_vdda_1v8: LDO3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "vdda-1v8";
+ };
+
+ ldo4_reg: LDO4 {
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <800000>;
+ regulator-name = "LDO4";
+ };
+
+ ldo5_reg: LDO5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "LDO5";
+ };
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_eqos: eqosgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK
+ (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_SION)
+ MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC
+ (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO
+ (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
+ MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
+ MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0
+ (MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1
+ (MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RXC__ENET_QOS_RX_ER
+ (MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
+ >;
+ };
+
+ pinctrl_eqos_sleep: eqos-sleep-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_TD2__GPIO1_IO19
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_MDC__GPIO1_IO16
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_MDIO__GPIO1_IO17
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_TD0__GPIO1_IO21
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_TD1__GPIO1_IO20
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RD0__GPIO1_IO26
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RD1__GPIO1_IO27
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RXC__GPIO1_IO25
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_RX_CTL__GPIO1_IO24
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_ENET_TX_CTL__GPIO1_IO22
+ (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_ethphy_int_b: ethphy-int-bgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21
+ (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
+ >;
+ };
+
+ pinctrl_ethphy_rst_b: ethphy-rst-bgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL
+ MX8MP_I2C_DEFAULT
+ MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA
+ MX8MP_I2C_DEFAULT
+ >;
+ };
+
+ pinctrl_i2c1_gpio: i2c1-gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14
+ MX8MP_I2C_DEFAULT
+ MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15
+ MX8MP_I2C_DEFAULT
+ >;
+ };
+
+ pinctrl_pmic: pmicgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03
+ (MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_reg_3v3_etn: reg-3v3-etngrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ENET_TXC__GPIO1_IO23
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
+ (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
+ MX8MP_USDHC_DATA_DEFAULT
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
+ (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
+ (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ >;
+ };
+};
+
+&usdhc3 {
+ assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <200000000>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ non-removable;
+ pinctrl-0 = <&pinctrl_usdhc3>;
+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ vmmc-supply = <®_vdd_3v3>;
+ voltage-ranges = <3300 3300>;
+ vqmmc-supply = <®_nvcc_nand>;
+ status = "okay";
+};
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
` (4 preceding siblings ...)
2025-04-02 7:07 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 19:31 ` [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboardy Frank Li
2025-04-02 7:07 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Display Maud Spierings via B4 Relay
` (2 subsequent siblings)
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
The Moduline Display platform is a part of the wider GOcontroll Moduline
ecosystem. These are embedded controllers that focus on modularity with
their swappable IO modules.
The base Moduline Display board includes a board-to-board connector with
various busses to enable adding new display types required by the
application. It includes 2 Moduline IO module slots, a simple mono
codec/amplifier, a four channel adc, 2 CAN busses, an RTC and optional
wifi/bluetooth.
busses to the display adapter include:
- 4 lane LVDS
- 4 lane MIPI-DSI
- 4 lane MIPI-CSI
- HDMI 2.0a
- USB 2.0
- I2S
- I2C
- SPI
Also a couple of GPIO and PWM pins for controlling various ICs on the
display adapter board.
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
.../imx8mp-tx8p-ml81-moduline-display-106.dts | 525 +++++++++++++++++++++
1 file changed, 525 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
new file mode 100644
index 0000000000000000000000000000000000000000..4649b5f1b64d733380a5eb027812da65d3df61ac
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
@@ -0,0 +1,525 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2025 GOcontroll B.V.
+ * Author: Maud Spierings <maudspierings@gocontroll.com>
+ */
+
+/dts-v1/;
+
+#include "imx8mp-tx8p-ml81.dtsi"
+
+/ {
+ compatible = "gocontroll,moduline-display", "fsl,imx8mp";
+ chassis-type = "embedded";
+ hardware = "Moduline Display V1.06";
+
+ aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
+ ethernet0 = &eqos;
+ mmc0 = &usdhc3;
+ mmc1 = &usdhc2;
+ rtc0 = &rtc_pcf; /* i2c rtc is the main rtc */
+ rtc1 = &snvs_rtc;
+ spi0 = &ecspi2; /* spidev number compatibility */
+ spi1 = &ecspi1; /* spidev number compatibility */
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ external-sensor-supply {
+ compatible = "regulator-output";
+ vout-supply = <®_5v0_sensor>;
+ };
+
+ reg_1v8_per: regulator-1v8-per {
+ compatible = "regulator-fixed";
+ pinctrl-0 = <&pinctrl_reg_1v8>;
+ pinctrl-names = "default";
+ power-supply = <®_3v3_per>;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "1v8-per";
+ gpio = <&gpio3 25 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_3v3_per: regulator-3v3-per {
+ compatible = "regulator-fixed";
+ power-supply = <®_6v4>;
+ regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "3v3-per";
+ };
+
+ reg_5v0: regulator-5v0 {
+ compatible = "regulator-fixed";
+ power-supply = <®_6v4>;
+ regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "5v0";
+ };
+
+ reg_5v0_sensor: regulator-5v0-sensor {
+ compatible = "regulator-fixed";
+ pinctrl-0 = <&pinctrl_reg_5v0_sensor>;
+ pinctrl-names = "default";
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "5v0-supply-external-sensor";
+ gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_6v4: regulator-6v4 {
+ compatible = "regulator-fixed";
+ regulator-always-on;
+ regulator-max-microvolt = <6400000>;
+ regulator-min-microvolt = <6400000>;
+ regulator-name = "6v4";
+ };
+
+ reg_can1_stby: regulator-can1-stby {
+ compatible = "regulator-fixed";
+ pinctrl-0 = <&pinctrl_flexcan1_reg>;
+ pinctrl-names = "default";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "can1-stby";
+ gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
+ };
+
+ reg_can2_stby: regulator-can2-stby {
+ compatible = "regulator-fixed";
+ pinctrl-0 = <&pinctrl_flexcan2_reg>;
+ pinctrl-names = "default";
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "can2-stby";
+ gpio = <&gpio5 9 GPIO_ACTIVE_LOW>;
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&cpudai>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&cpudai>;
+ simple-audio-card,name = "tas2505-audio";
+ simple-audio-card,routing = "Speaker", "DAC";
+ simple-audio-card,widgets = "Speaker", "Speaker External";
+
+ simple-audio-card,codec {
+ sound-dai = <&tas2505>;
+ };
+
+ cpudai: simple-audio-card,cpu {
+ sound-dai = <&sai6>;
+ };
+ };
+
+ wifi_powerseq: wifi-powerseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-0 = <&pinctrl_wl_reg>;
+ pinctrl-names = "default";
+ post-power-on-delay-ms = <100>;
+ power-off-delay-us = <500000>;
+ reset-gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&ecspi1 {
+ cs-gpios = <
+ &gpio2 12 GPIO_ACTIVE_LOW
+ &gpio1 11 GPIO_ACTIVE_LOW
+ &gpio1 10 GPIO_ACTIVE_LOW
+ >;
+ pinctrl-0 = <&pinctrl_ecspi1>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ connector@0 {
+ compatible = "gocontroll,moduline-module-slot";
+ reg = <0>;
+ interrupt-parent = <&gpio4>;
+ interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
+ i2c-bus = <&i2c2>;
+ reset-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
+ slot-number = <1>;
+ spi-max-frequency = <54000000>;
+ sync-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ vddhpp-supply = <®_6v4>;
+ vddp-supply = <®_5v0>;
+ vdd-supply = <®_3v3_per>;
+ };
+
+ connector@1 {
+ compatible = "gocontroll,moduline-module-slot";
+ reg = <1>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+ i2c-bus = <&i2c2>;
+ reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ slot-number = <2>;
+ spi-max-frequency = <54000000>;
+ sync-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+ vddhpp-supply = <®_6v4>;
+ vddp-supply = <®_5v0>;
+ vdd-supply = <®_3v3_per>;
+ };
+
+ adc@2 {
+ compatible = "microchip,mcp3004";
+ reg = <2>;
+ spi-max-frequency = <2300000>;
+ vref-supply = <®_vdd_3v3>;
+ };
+};
+
+&flexcan1 {
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ pinctrl-names = "default";
+ xceiver-supply = <®_can1_stby>;
+ status = "okay";
+};
+
+&flexcan2 {
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ pinctrl-names = "default";
+ xceiver-supply = <®_can2_stby>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_i2c2>;
+ pinctrl-1 = <&pinctrl_i2c2_gpio>;
+ pinctrl-names = "default", "gpio";
+ scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+};
+
+&i2c4 {
+ clock-frequency = <400000>;
+ pinctrl-0 = <&pinctrl_i2c4>;
+ pinctrl-1 = <&pinctrl_i2c4_gpio>;
+ pinctrl-names = "default", "gpio";
+ scl-gpios = <&gpio5 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ sda-gpios = <&gpio5 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ status = "okay";
+
+ tas2505: audio-codec@18 {
+ compatible = "ti,tas2505";
+ reg = <0x18>;
+ clocks = <&clk IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1>;
+ clock-names = "mclk";
+ #sound-dai-cells = <0>;
+ aic32x4-gpio-func = <
+ 0xff
+ 0xff
+ 0xff
+ 0xff
+ 0xff
+ >;
+ av-supply = <®_1v8_per>;
+ dv-supply = <®_1v8_per>;
+ iov-supply = <®_vdd_3v3>;
+ pinctrl-0 = <&pinctrl_tas_reset>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
+ };
+
+ rtc_pcf: rtc@51 {
+ compatible = "nxp,pcf85063a";
+ reg = <0x51>;
+ quartz-load-femtofarads = <7000>;
+
+ clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+ };
+};
+
+&iomuxc {
+ pinctrl_bt: btgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14
+ MX8MP_DSE_X1
+ MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_HYS_SCHMITT)
+ MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
+ MX8MP_DSE_X1
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI
+ MX8MP_DSE_X4
+ MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO
+ (MX8MP_DSE_X4 | MX8MP_HYS_SCHMITT)
+ MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK
+ MX8MP_DSE_X4
+ MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12
+ MX8MP_DSE_X1
+ MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11
+ MX8MP_DSE_X1
+ MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10
+ MX8MP_DSE_X1
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SPDIF_RX__CAN1_RX
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_SPDIF_TX__CAN1_TX
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_flexcan1_reg: flexcan1reggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART3_TXD__CAN2_RX
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_UART3_RXD__CAN2_TX
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_flexcan2_reg: flexcan2reggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL
+ MX8MP_I2C_DEFAULT
+ MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA
+ MX8MP_I2C_DEFAULT
+ >;
+ };
+
+ pinctrl_i2c2_gpio: i2c2-gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16
+ MX8MP_I2C_DEFAULT
+ MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17
+ MX8MP_I2C_DEFAULT
+ >;
+ };
+
+ pinctrl_i2c4: i2c4grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI2_MISO__I2C4_SCL
+ MX8MP_I2C_DEFAULT
+ MX8MP_IOMUXC_ECSPI2_SS0__I2C4_SDA
+ MX8MP_I2C_DEFAULT
+ >;
+ };
+
+ pinctrl_i2c4_gpio: i2c4-gpiogrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12
+ MX8MP_I2C_DEFAULT
+ MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13
+ MX8MP_I2C_DEFAULT
+ >;
+ };
+
+ pinctrl_usdhc2: pinctrlusdhc2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK
+ (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3
+ (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
+ >;
+ };
+
+ pinctrl_reg_1v8: reg-1v8-grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25
+ MX8MP_DSE_X1
+ >;
+ };
+
+ pinctrl_reg_5v0_sensor: reg-5v0-sensorgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09
+ MX8MP_DSE_X1
+ >;
+ };
+
+ pinctrl_sai6: sai6grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_TXD6__AUDIOMIX_SAI6_TX_SYNC
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
+ MX8MP_IOMUXC_SAI1_RXD4__AUDIOMIX_SAI6_TX_BCLK
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
+ MX8MP_IOMUXC_SAI1_TXD5__AUDIOMIX_SAI6_TX_DATA00
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
+ MX8MP_IOMUXC_SAI1_TXD7__AUDIOMIX_SAI6_MCLK
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
+ MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI6_RX_DATA00
+ (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
+ >;
+ };
+
+ pinctrl_tas_reset: tasresetgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24
+ MX8MP_DSE_X1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_SAI3_RXD__UART2_DCE_RTS
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ MX8MP_IOMUXC_SAI3_RXC__UART2_DCE_CTS
+ (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_wdog: wdoggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B
+ (MX8MP_DSE_X6 | MX8MP_HYS_SCHMITT)
+ >;
+ };
+
+ pinctrl_wl_int: wlintgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13
+ (MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
+ >;
+ };
+
+ pinctrl_wl_reg: wlreggrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19
+ MX8MP_DSE_X1
+ >;
+ };
+};
+
+&sai6 {
+ assigned-clocks = <&clk IMX8MP_CLK_SAI6>;
+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+ assigned-clock-rates = <12288000>;
+ pinctrl-0 = <&pinctrl_sai6>;
+ pinctrl-names = "default";
+ fsl,sai-mclk-direction-output;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-names = "default";
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
+ interrupt-parent = <&gpio1>;
+ interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-names = "host-wakeup";
+ device-wakeup-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
+ max-speed = <921600>;
+ pinctrl-0 = <&pinctrl_bt>;
+ pinctrl-names = "default";
+ shutdown-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+ vbat-supply = <®_3v3_per>;
+ vddio-supply = <®_3v3_per>;
+ };
+};
+
+&usb3_0 {
+ status = "okay";
+};
+
+&usb3_phy0 {
+ status = "okay";
+};
+
+&usb_dwc3_0 {
+ dr_mode = "peripheral";
+};
+
+&usdhc2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <50000000>;
+ cap-power-off-card;
+ keep-power-in-suspend;
+ max-frequency = <50000000>;
+ mmc-pwrseq = <&wifi_powerseq>;
+ non-removable;
+ pinctrl-0 = <&pinctrl_usdhc2>;
+ pinctrl-names = "default";
+ sd-uhs-sdr25;
+ vmmc-supply = <®_3v3_per>;
+ status = "okay";
+
+ wifi@1 {
+ compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";
+ reg = <1>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "host-wake";
+ pinctrl-0 = <&pinctrl_wl_int>;
+ pinctrl-names = "default";
+ brcm,board-type = "GOcontroll,moduline";
+ };
+};
+
+&wdog1 {
+ pinctrl-0 = <&pinctrl_wdog>;
+ pinctrl-names = "default";
+ fsl,ext-reset-output;
+ status = "okay";
+};
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Display
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
` (5 preceding siblings ...)
2025-04-02 7:07 ` [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 19:35 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Displayy Frank Li
2025-04-02 7:07 ` [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefile Maud Spierings via B4 Relay
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
Add the BOE av101hdt-a10 variant of the Moduline Display, this variant
comes with a 10.1 1280x720 display with a touchscreen (not working in
mainline).
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
Currently the backlight driver is not available, this will be upstreamed
in a future patch series. It is a Maxim max25014atg.
The touchscreen has a Cypress CYAT81658-64AS48 controller which as far as
I know is not supported upstream, the driver we currently use for this is
a mess and I doubt we will be able to get it in an upstreamable state.
---
...x8p-ml81-moduline-display-106-av101hdt-a10.dtso | 102 +++++++++++++++++++++
1 file changed, 102 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso
new file mode 100644
index 0000000000000000000000000000000000000000..2855d7090988380ca0d4df8459cd1a67049f1080
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso
@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2025 GOcontroll B.V.
+ * Author: Maud Spierings <maudspierings@gocontroll.com>
+ */
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "imx8mp-pinfunc.h"
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ model = "GOcontroll Moduline Display with BOE av101hdt-a10 display";
+
+ panel {
+ compatible = "boe,av101hdt-a10";
+ enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_panel>;
+ pinctrl-names = "default";
+ power-supply = <®_3v3_per>;
+ reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+
+ port {
+ panel_lvds_in: endpoint {
+ remote-endpoint = <&ldb_lvds_ch0>;
+ };
+ };
+ };
+
+ reg_vbus: regulator-vbus {
+ compatible = "regulator-fixed";
+ power-supply = <®_6v4>;
+ regulator-always-on;
+ regulator-max-microvolt = <5000000>;
+ regulator-min-microvolt = <5000000>;
+ regulator-name = "usb-c-vbus";
+ };
+};
+
+&iomuxc {
+ pinctrl_panel: panelgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07
+ MX8MP_DSE_X1
+ MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09
+ MX8MP_DSE_X1
+ >;
+ };
+};
+
+&lcdif2 {
+ status = "okay";
+};
+
+&lvds_bridge {
+ assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
+ /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */
+ assigned-clock-rates = <0>, <1054620000>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ ldb_lvds_ch0: endpoint {
+ remote-endpoint = <&panel_lvds_in>;
+ };
+ };
+ };
+};
+
+&usb3_1 {
+ status = "okay";
+};
+
+&usb3_phy1 {
+ status = "okay";
+};
+
+&usb_dwc3_1 {
+ dr_mode = "host";
+
+ connector {
+ compatible = "usb-c-connector";
+ data-role = "host";
+ pd-disable;
+ vbus-supply = <®_vbus>;
+
+ port {
+ high_speed_ep: endpoint {
+ remote-endpoint = <&usb1_hs_ep>;
+ };
+ };
+ };
+
+ port {
+ usb1_hs_ep: endpoint {
+ remote-endpoint = <&high_speed_ep>;
+ };
+ };
+};
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
` (6 preceding siblings ...)
2025-04-02 7:07 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Display Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 19:36 ` [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Displayy Frank Li
2025-04-02 7:07 ` [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefile Maud Spierings via B4 Relay
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
Add the BOE av123z7m-n17 variant of the Moduline Display, this variant
comes with a 12.3" 1920x720 display.
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
Currently the backlight driver is not available, this will be upstreamed
in a future patch series. It is a Maxim max25014atg.
---
...x8p-ml81-moduline-display-106-av123z7m-n17.dtso | 139 +++++++++++++++++++++
1 file changed, 139 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso
new file mode 100644
index 0000000000000000000000000000000000000000..dc0f86ca55fb6c21f10fbd333374a89002bb71c0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2025 GOcontroll B.V.
+ * Author: Maud Spierings <maudspierings@gocontroll.com>
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+
+#include "imx8mp-pinfunc.h"
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ model = "GOcontroll Moduline Display with BOE av123z7m-n17 display";
+
+ panel {
+ compatible = "boe,av123z7m-n17";
+ enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_panel>;
+ pinctrl-names = "default";
+ power-supply = <®_3v3_per>;
+ reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dual-lvds-odd-pixels;
+
+ panel_in0: endpoint {
+ remote-endpoint = <&lvds1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ dual-lvds-even-pixels;
+
+ panel_in1: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+ };
+ };
+};
+
+&i2c4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* sn65dsi85 */
+ bridge@2d {
+ compatible = "ti,sn65dsi84";
+ reg = <0x2d>;
+ enable-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
+ pinctrl-0 = <&pinctrl_lvds_bridge>;
+ pinctrl-names = "default";
+ vcc-supply = <®_1v8_per>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsi_lvds_bridge_in: endpoint {
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&mipi_dsi_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ lvds0_out: endpoint {
+ remote-endpoint = <&panel_in1>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ lvds1_out: endpoint {
+ remote-endpoint = <&panel_in0>;
+ };
+ };
+ };
+ };
+
+ /* max25014 @ 0x6f */
+};
+
+&iomuxc {
+ pinctrl_lvds_bridge: lvdsbridgegrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14
+ MX8MP_DSE_X1
+ >;
+ };
+
+ pinctrl_panel: panelgrp {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07
+ MX8MP_DSE_X1
+ MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09
+ MX8MP_DSE_X1
+ >;
+ };
+};
+
+&lcdif1 {
+ status = "okay";
+};
+
+&mipi_dsi {
+ /*
+ * burst has to be at least 2x dsi clock that the sn65dsi85 expects
+ * display pixelclock * bpp / lanes / 2 = dsi clock
+ * 88.000.000 * 24 / 4 / 2 = 264.000.000
+ * range gets rounded up to 265.000.000 - 270.000.000
+ * 267.500.000 * 2 = 535.000.000
+ */
+ samsung,burst-clock-frequency = <535000000>;
+ samsung,esc-clock-frequency = <12000000>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ mipi_dsi_out: endpoint {
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = < &dsi_lvds_bridge_in>;
+ };
+ };
+ };
+};
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefile
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
` (7 preceding siblings ...)
2025-04-02 7:07 ` [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display Maud Spierings via B4 Relay
@ 2025-04-02 7:07 ` Maud Spierings via B4 Relay
2025-04-02 19:38 ` [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefiley Frank Li
8 siblings, 1 reply; 23+ messages in thread
From: Maud Spierings via B4 Relay @ 2025-04-02 7:07 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel, Maud Spierings
From: Maud Spierings <maudspierings@gocontroll.com>
Add the new Moduline Display boards to the Makefile to allow building
them.
Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
---
arch/arm64/boot/dts/freescale/Makefile | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index b6d3fe26d621234ab84353165d20af9d2536f839..fea25c7f997cda9aef73cd643f0f0279ee0bfffe 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -214,6 +214,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-bd500.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-tian-g07017.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb
+imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \
+ imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtbo
+imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \
+ imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
--
2.49.0
^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy
2025-04-02 7:07 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllers Maud Spierings via B4 Relay
@ 2025-04-02 19:17 ` Frank Li
2025-04-03 6:17 ` Maud Spierings | GOcontroll
2025-04-03 7:44 ` Krzysztof Kozlowski
0 siblings, 2 replies; 23+ messages in thread
From: Frank Li @ 2025-04-02 19:17 UTC (permalink / raw)
To: maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On Wed, Apr 02, 2025 at 09:07:07AM +0200, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Add a maintainer for the GOcontroll Moduline series of controllers.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
> MAINTAINERS | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4b3864a9852f9fca2be48987d383c0671e668336..7d4fbfdaaac1776fc7c4a569f7ab667f0a485eab 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10043,6 +10043,12 @@ L: linux-media@vger.kernel.org
> S: Maintained
> F: drivers/media/usb/go7007/
>
> +GOCONTROLL MODULINE CONTROLLERS
> +M: Maud Spierings <maudspierings@gocontroll.com>
> +L: devicetree@vger.kernel.org
> +S: Maintained
this one sill need
L: imx@lists.linux.dev
Frank
> +F: arch/arm64/boot/dts/freescale/*moduline*.dts*
> +
> GOCONTROLL MODULINE MODULE SLOT
> M: Maud Spierings <maudspierings@gocontroll.com>
> S: Maintained
>
> --
> 2.49.0
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COMy
2025-04-02 7:07 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM Maud Spierings via B4 Relay
@ 2025-04-02 19:24 ` Frank Li
2025-04-03 7:36 ` Maud Spierings | GOcontroll
0 siblings, 1 reply; 23+ messages in thread
From: Frank Li @ 2025-04-02 19:24 UTC (permalink / raw)
To: maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On Wed, Apr 02, 2025 at 09:07:08AM +0200, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> The Ka-Ro Electronics tx8p-ml81 is a COM based on the imx8mp SOC. It has
> 2 GB or ram and 8 GB of eMMC storage on board.
>
> Add it to enable boards based on this Module
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
> .../arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi | 548 +++++++++++++++++++++
> 1 file changed, 548 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
> new file mode 100644
> index 0000000000000000000000000000000000000000..9c69228a2cd28ce767fa4054d10b19a196668ea2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
> @@ -0,0 +1,548 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright (C) 2020 Lothar Waßmann <LW@KARO-electronics.de>
> + * 2025 Maud Spierings <maudspierings@gocontroll.com>
> + */
> +
> +#include "imx8mp.dtsi"
> +
> +/ {
> + /* PHY regulator */
> + regulator-3v3-etn {
> + compatible = "regulator-fixed";
> + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_reg_3v3_etn>;
> + pinctrl-names = "default";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-name = "3v3-etn";
> + vin-supply = <®_vdd_3v3>;
> + enable-active-high;
> + };
> +};
> +
> +&A53_0 {
> + cpu-supply = <®_vdd_arm>;
> +};
> +
> +&A53_1 {
> + cpu-supply = <®_vdd_arm>;
> +};
> +
> +&A53_2 {
> + cpu-supply = <®_vdd_arm>;
> +};
> +
> +&A53_3 {
> + cpu-supply = <®_vdd_arm>;
> +};
> +
> +&eqos {
> + assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
> + <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
> + <&clk IMX8MP_CLK_ENET_QOS>;
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
> + <&clk IMX8MP_SYS_PLL2_100M>,
> + <&clk IMX8MP_SYS_PLL2_50M>;
> + assigned-clock-rates = <0>, <100000000>, <50000000>;
clock rate 0 is quite strange, do you means 266000000?
> + phy-handle = <ðphy0>;
> + phy-mode = "rmii";
> + pinctrl-0 = <&pinctrl_eqos>;
> + pinctrl-1 = <&pinctrl_eqos_sleep>;
> + pinctrl-names = "default", "sleep";
> + status = "okay";
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-0 = <&pinctrl_ethphy_rst_b>;
> + pinctrl-names = "default";
> + reset-delay-us = <25000>;
> + reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
> +
> + ethphy0: ethernet-phy@0 {
> + reg = <0>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
> + clocks = <&clk IMX8MP_CLK_ENET_QOS>;
> + pinctrl-0 = <&pinctrl_ethphy_int_b>;
> + pinctrl-names = "default";
> + smsc,disable-energy-detect;
> + };
> + };
> +};
> +
> +&gpio1 {
> + gpio-line-names = "SODIMM_152",
> + "SODIMM_42",
Please align to "SODIMM_152"
Frank
> + "PMIC_WDOG_B SODIMM_153",
> + "PMIC_IRQ_B",
> + "SODIMM_154",
> + "SODIMM_155",
> + "SODIMM_156",
> + "SODIMM_157",
> + "SODIMM_158",
> + "SODIMM_159",
> + "SODIMM_161",
> + "SODIMM_162",
> + "SODIMM_34",
> + "SODIMM_36",
> + "SODIMM_27",
> + "SODIMM_28",
> + "ENET_MDC",
> + "ENET_MDIO",
> + "",
> + "ENET_XTAL1/CLKIN",
> + "ENET_TXD1",
> + "ENET_TXD0",
> + "ENET_TXEN",
> + "ENET_POWER",
> + "ENET_COL/CRS_DV",
> + "ENET_RXER",
> + "ENET_RXD0",
> + "ENET_RXD1",
> + "",
> + "",
> + "",
> + "";
> +};
> +
> +&gpio2 {
> + gpio-line-names = "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "SODIMM_51",
> + "SODIMM_57",
> + "SODIMM_56",
> + "SODIMM_52",
> + "SODIMM_53",
> + "SODIMM_54",
> + "SODIMM_55",
> + "SODIMM_15",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "",
> + "";
> +};
> +
> +&gpio3 {
> + gpio-line-names = "",
> + "",
> + "EMMC_DS",
> + "EMMC_DAT5",
> + "EMMC_DAT6",
> + "EMMC_DAT7",
> + "",
> + "",
> + "",
> + "",
> + "EMMC_DAT0",
> + "EMMC_DAT1",
> + "EMMC_DAT2",
> + "EMMC_DAT3",
> + "",
> + "EMMC_DAT4",
> + "",
> + "EMMC_CLK",
> + "EMMC_CMD",
> + "SODIMM_75",
> + "SODIMM_145",
> + "SODIMM_163",
> + "SODIMM_164",
> + "SODIMM_165",
> + "SODIMM_143",
> + "SODIMM_144",
> + "SODIMM_72",
> + "SODIMM_73",
> + "SODIMM_74",
> + "SODIMM_93",
> + "",
> + "";
> +};
> +
> +&gpio4 {
> + gpio-line-names = "SODIMM_98",
> + "SODIMM_99",
> + "SODIMM_100",
> + "SODIMM_101",
> + "SODIMM_45",
> + "SODIMM_43",
> + "SODIMM_105",
> + "SODIMM_106",
> + "SODIMM_107",
> + "SODIMM_108",
> + "SODIMM_104",
> + "SODIMM_103",
> + "SODIMM_115",
> + "SODIMM_114",
> + "SODIMM_113",
> + "SODIMM_112",
> + "SODIMM_109",
> + "SODIMM_110",
> + "SODIMM_95",
> + "SODIMM_96",
> + "SODIMM_97",
> + "ENET_nINT",
> + "ENET_nRST",
> + "SODIMM_84",
> + "SODIMM_87",
> + "SODIMM_86",
> + "SODIMM_85",
> + "SODIMM_83",
> + "",
> + "SODIMM_66",
> + "SODIMM_65",
> + "";
> +};
> +
> +&gpio5 {
> + gpio-line-names = "",
> + "",
> + "",
> + "SODIMM_76",
> + "SODIMM_81",
> + "SODIMM_146",
> + "SODIMM_48",
> + "SODIMM_46",
> + "SODIMM_47",
> + "SODIMM_44",
> + "SODIMM_49",
> + "",
> + "SODIMM_70",
> + "SODIMM_69",
> + "PMIC_SCL",
> + "PMIC_SDA",
> + "SODIMM_41",
> + "SODIMM_40",
> + "SODIMM_148",
> + "SODIMM_149",
> + "SODIMM_150",
> + "SODIMM_151",
> + "SODIMM_60",
> + "SODIMM_59",
> + "SODIMM_64",
> + "SODIMM_63",
> + "SODIMM_62",
> + "SODIMM_61",
> + "SODIMM_68",
> + "SODIMM_67",
> + "",
> + "";
> +};
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> + pinctrl-0 = <&pinctrl_i2c1>;
> + pinctrl-1 = <&pinctrl_i2c1_gpio>;
> + pinctrl-names = "default", "gpio";
> + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + status = "okay";
> +
> + pmic@25 {
> + compatible = "nxp,pca9450c";
> + reg = <0x25>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
> + pinctrl-0 = <&pinctrl_pmic>;
> + pinctrl-names = "default";
> +
> + regulators {
> + reg_vdd_soc: BUCK1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <900000>;
> + regulator-min-microvolt = <805000>;
> + regulator-name = "vdd-soc";
> + regulator-ramp-delay = <3125>;
> + };
> +
> + reg_vdd_arm: BUCK2 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <950000>;
> + regulator-min-microvolt = <805000>;
> + regulator-name = "vdd-core";
> + regulator-ramp-delay = <3125>;
> + nxp,dvs-run-voltage = <950000>;
> + nxp,dvs-standby-voltage = <850000>;
> + };
> +
> + reg_vdd_3v3: BUCK4 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-name = "3v3";
> + };
> +
> + reg_nvcc_nand: BUCK5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <1800000>;
> + regulator-name = "nvcc-nand";
> + };
> +
> + reg_nvcc_dram: BUCK6 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1100000>;
> + regulator-min-microvolt = <1100000>;
> + regulator-name = "nvcc-dram";
> + };
> +
> + reg_snvs_1v8: LDO1 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <1800000>;
> + regulator-name = "snvs-1v8";
> + };
> +
> + ldo2_reg: LDO2 {
> + regulator-always-on;
> + regulator-max-microvolt = <1150000>;
> + regulator-min-microvolt = <800000>;
> + regulator-name = "LDO2";
> + };
> +
> + reg_vdda_1v8: LDO3 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <1800000>;
> + regulator-name = "vdda-1v8";
> + };
> +
> + ldo4_reg: LDO4 {
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <800000>;
> + regulator-name = "LDO4";
> + };
> +
> + ldo5_reg: LDO5 {
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <1800000>;
> + regulator-name = "LDO5";
> + };
> + };
> + };
> +};
> +
> +&iomuxc {
> + pinctrl_eqos: eqosgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ENET_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK
> + (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_SION)
> + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC
> + (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO
> + (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
> + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
> + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0
> + (MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1
> + (MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RXC__ENET_QOS_RX_ER
> + (MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
> + >;
> + };
> +
> + pinctrl_eqos_sleep: eqos-sleep-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ENET_TD2__GPIO1_IO19
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_MDC__GPIO1_IO16
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_MDIO__GPIO1_IO17
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_TD0__GPIO1_IO21
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_TD1__GPIO1_IO20
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RD0__GPIO1_IO26
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RD1__GPIO1_IO27
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RXC__GPIO1_IO25
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_RX_CTL__GPIO1_IO24
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_ENET_TX_CTL__GPIO1_IO22
> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_ethphy_int_b: ethphy-int-bgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21
> + (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
> + >;
> + };
> +
> + pinctrl_ethphy_rst_b: ethphy-rst-bgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL
> + MX8MP_I2C_DEFAULT
> + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA
> + MX8MP_I2C_DEFAULT
> + >;
> + };
> +
> + pinctrl_i2c1_gpio: i2c1-gpiogrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14
> + MX8MP_I2C_DEFAULT
> + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15
> + MX8MP_I2C_DEFAULT
> + >;
> + };
> +
> + pinctrl_pmic: pmicgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03
> + (MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_reg_3v3_etn: reg-3v3-etngrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ENET_TXC__GPIO1_IO23
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_usdhc3: usdhc3grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
> + (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
> + MX8MP_USDHC_DATA_DEFAULT
> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
> + (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + >;
> + };
> +};
> +
> +&usdhc3 {
> + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
> + assigned-clock-rates = <200000000>;
> + bus-width = <8>;
> + max-frequency = <200000000>;
> + non-removable;
> + pinctrl-0 = <&pinctrl_usdhc3>;
> + pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> + pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
> + vmmc-supply = <®_vdd_3v3>;
> + voltage-ranges = <3300 3300>;
> + vqmmc-supply = <®_nvcc_nand>;
> + status = "okay";
> +};
>
> --
> 2.49.0
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboardy
2025-04-02 7:07 ` [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard Maud Spierings via B4 Relay
@ 2025-04-02 19:31 ` Frank Li
0 siblings, 0 replies; 23+ messages in thread
From: Frank Li @ 2025-04-02 19:31 UTC (permalink / raw)
To: maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On Wed, Apr 02, 2025 at 09:07:09AM +0200, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> The Moduline Display platform is a part of the wider GOcontroll Moduline
> ecosystem. These are embedded controllers that focus on modularity with
> their swappable IO modules.
>
> The base Moduline Display board includes a board-to-board connector with
> various busses to enable adding new display types required by the
> application. It includes 2 Moduline IO module slots, a simple mono
> codec/amplifier, a four channel adc, 2 CAN busses, an RTC and optional
> wifi/bluetooth.
>
> busses to the display adapter include:
> - 4 lane LVDS
> - 4 lane MIPI-DSI
> - 4 lane MIPI-CSI
> - HDMI 2.0a
> - USB 2.0
> - I2S
> - I2C
> - SPI
>
> Also a couple of GPIO and PWM pins for controlling various ICs on the
> display adapter board.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
> .../imx8mp-tx8p-ml81-moduline-display-106.dts | 525 +++++++++++++++++++++
> 1 file changed, 525 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
> new file mode 100644
> index 0000000000000000000000000000000000000000..4649b5f1b64d733380a5eb027812da65d3df61ac
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106.dts
> @@ -0,0 +1,525 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2025 GOcontroll B.V.
> + * Author: Maud Spierings <maudspierings@gocontroll.com>
> + */
> +
> +/dts-v1/;
> +
> +#include "imx8mp-tx8p-ml81.dtsi"
> +
> +/ {
> + compatible = "gocontroll,moduline-display", "fsl,imx8mp";
> + chassis-type = "embedded";
> + hardware = "Moduline Display V1.06";
> +
> + aliases {
> + can0 = &flexcan1;
> + can1 = &flexcan2;
> + ethernet0 = &eqos;
> + mmc0 = &usdhc3;
> + mmc1 = &usdhc2;
> + rtc0 = &rtc_pcf; /* i2c rtc is the main rtc */
> + rtc1 = &snvs_rtc;
> + spi0 = &ecspi2; /* spidev number compatibility */
> + spi1 = &ecspi1; /* spidev number compatibility */
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + external-sensor-supply {
> + compatible = "regulator-output";
> + vout-supply = <®_5v0_sensor>;
> + };
> +
> + reg_1v8_per: regulator-1v8-per {
> + compatible = "regulator-fixed";
> + pinctrl-0 = <&pinctrl_reg_1v8>;
> + pinctrl-names = "default";
> + power-supply = <®_3v3_per>;
> + regulator-max-microvolt = <1800000>;
> + regulator-min-microvolt = <1800000>;
> + regulator-name = "1v8-per";
> + gpio = <&gpio3 25 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_3v3_per: regulator-3v3-per {
> + compatible = "regulator-fixed";
> + power-supply = <®_6v4>;
> + regulator-always-on;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-name = "3v3-per";
> + };
> +
> + reg_5v0: regulator-5v0 {
> + compatible = "regulator-fixed";
> + power-supply = <®_6v4>;
> + regulator-always-on;
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <5000000>;
> + regulator-name = "5v0";
> + };
> +
> + reg_5v0_sensor: regulator-5v0-sensor {
> + compatible = "regulator-fixed";
> + pinctrl-0 = <&pinctrl_reg_5v0_sensor>;
> + pinctrl-names = "default";
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <5000000>;
> + regulator-name = "5v0-supply-external-sensor";
> + gpio = <&gpio4 9 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +
> + reg_6v4: regulator-6v4 {
> + compatible = "regulator-fixed";
> + regulator-always-on;
> + regulator-max-microvolt = <6400000>;
> + regulator-min-microvolt = <6400000>;
> + regulator-name = "6v4";
> + };
> +
> + reg_can1_stby: regulator-can1-stby {
> + compatible = "regulator-fixed";
> + pinctrl-0 = <&pinctrl_flexcan1_reg>;
> + pinctrl-names = "default";
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-name = "can1-stby";
> + gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + reg_can2_stby: regulator-can2-stby {
> + compatible = "regulator-fixed";
> + pinctrl-0 = <&pinctrl_flexcan2_reg>;
> + pinctrl-names = "default";
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-name = "can2-stby";
> + gpio = <&gpio5 9 GPIO_ACTIVE_LOW>;
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> + simple-audio-card,bitclock-master = <&cpudai>;
> + simple-audio-card,format = "i2s";
> + simple-audio-card,frame-master = <&cpudai>;
> + simple-audio-card,name = "tas2505-audio";
> + simple-audio-card,routing = "Speaker", "DAC";
> + simple-audio-card,widgets = "Speaker", "Speaker External";
> +
> + simple-audio-card,codec {
> + sound-dai = <&tas2505>;
> + };
> +
> + cpudai: simple-audio-card,cpu {
> + sound-dai = <&sai6>;
> + };
> + };
> +
> + wifi_powerseq: wifi-powerseq {
> + compatible = "mmc-pwrseq-simple";
> + pinctrl-0 = <&pinctrl_wl_reg>;
> + pinctrl-names = "default";
> + post-power-on-delay-ms = <100>;
> + power-off-delay-us = <500000>;
> + reset-gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&ecspi1 {
> + cs-gpios = <
> + &gpio2 12 GPIO_ACTIVE_LOW
> + &gpio1 11 GPIO_ACTIVE_LOW
> + &gpio1 10 GPIO_ACTIVE_LOW
> + >;
generally,
cs-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>,
<&gpio1 11 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>;
> + pinctrl-0 = <&pinctrl_ecspi1>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + connector@0 {
> + compatible = "gocontroll,moduline-module-slot";
> + reg = <0>;
> + interrupt-parent = <&gpio4>;
> + interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
> + i2c-bus = <&i2c2>;
> + reset-gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
> + slot-number = <1>;
> + spi-max-frequency = <54000000>;
> + sync-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
> + vddhpp-supply = <®_6v4>;
> + vddp-supply = <®_5v0>;
> + vdd-supply = <®_3v3_per>;
> + };
> +
> + connector@1 {
> + compatible = "gocontroll,moduline-module-slot";
> + reg = <1>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
> + i2c-bus = <&i2c2>;
> + reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
> + slot-number = <2>;
> + spi-max-frequency = <54000000>;
> + sync-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
> + vddhpp-supply = <®_6v4>;
> + vddp-supply = <®_5v0>;
> + vdd-supply = <®_3v3_per>;
> + };
> +
> + adc@2 {
> + compatible = "microchip,mcp3004";
> + reg = <2>;
> + spi-max-frequency = <2300000>;
> + vref-supply = <®_vdd_3v3>;
> + };
> +};
> +
> +&flexcan1 {
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + pinctrl-names = "default";
> + xceiver-supply = <®_can1_stby>;
> + status = "okay";
> +};
> +
> +&flexcan2 {
> + pinctrl-0 = <&pinctrl_flexcan2>;
> + pinctrl-names = "default";
> + xceiver-supply = <®_can2_stby>;
> + status = "okay";
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-0 = <&pinctrl_i2c2>;
> + pinctrl-1 = <&pinctrl_i2c2_gpio>;
> + pinctrl-names = "default", "gpio";
> + scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + status = "okay";
> +};
> +
> +&i2c4 {
> + clock-frequency = <400000>;
> + pinctrl-0 = <&pinctrl_i2c4>;
> + pinctrl-1 = <&pinctrl_i2c4_gpio>;
> + pinctrl-names = "default", "gpio";
> + scl-gpios = <&gpio5 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + sda-gpios = <&gpio5 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + status = "okay";
> +
> + tas2505: audio-codec@18 {
> + compatible = "ti,tas2505";
> + reg = <0x18>;
> + clocks = <&clk IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1>;
> + clock-names = "mclk";
> + #sound-dai-cells = <0>;
> + aic32x4-gpio-func = <
> + 0xff
> + 0xff
> + 0xff
> + 0xff
> + 0xff
> + >;
is it possible put it into oneline?
> + av-supply = <®_1v8_per>;
> + dv-supply = <®_1v8_per>;
> + iov-supply = <®_vdd_3v3>;
> + pinctrl-0 = <&pinctrl_tas_reset>;
> + pinctrl-names = "default";
> + reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
> + };
> +
> + rtc_pcf: rtc@51 {
> + compatible = "nxp,pcf85063a";
> + reg = <0x51>;
> + quartz-load-femtofarads = <7000>;
> +
> + clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <32768>;
> + };
> + };
> +};
> +
> +&iomuxc {
> + pinctrl_bt: btgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14
> + MX8MP_DSE_X1
> + MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_HYS_SCHMITT)
> + MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
> + MX8MP_DSE_X1
> + >;
> + };
> +
> + pinctrl_ecspi1: ecspi1grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI
> + MX8MP_DSE_X4
> + MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO
> + (MX8MP_DSE_X4 | MX8MP_HYS_SCHMITT)
> + MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK
> + MX8MP_DSE_X4
> + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12
> + MX8MP_DSE_X1
> + MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11
> + MX8MP_DSE_X1
> + MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10
> + MX8MP_DSE_X1
keep use same indentation.
Frank
> + >;
> + };
> +
> + pinctrl_flexcan1: flexcan1grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SPDIF_RX__CAN1_RX
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_SPDIF_TX__CAN1_TX
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_flexcan1_reg: flexcan1reggrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_flexcan2: flexcan2grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_UART3_TXD__CAN2_RX
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_UART3_RXD__CAN2_TX
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_flexcan2_reg: flexcan2reggrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL
> + MX8MP_I2C_DEFAULT
> + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA
> + MX8MP_I2C_DEFAULT
> + >;
> + };
> +
> + pinctrl_i2c2_gpio: i2c2-gpiogrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16
> + MX8MP_I2C_DEFAULT
> + MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17
> + MX8MP_I2C_DEFAULT
> + >;
> + };
> +
> + pinctrl_i2c4: i2c4grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI2_MISO__I2C4_SCL
> + MX8MP_I2C_DEFAULT
> + MX8MP_IOMUXC_ECSPI2_SS0__I2C4_SDA
> + MX8MP_I2C_DEFAULT
> + >;
> + };
> +
> + pinctrl_i2c4_gpio: i2c4-gpiogrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_ECSPI2_MISO__GPIO5_IO12
> + MX8MP_I2C_DEFAULT
> + MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13
> + MX8MP_I2C_DEFAULT
> + >;
> + };
> +
> + pinctrl_usdhc2: pinctrlusdhc2grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK
> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3
> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
> + >;
> + };
> +
> + pinctrl_reg_1v8: reg-1v8-grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25
> + MX8MP_DSE_X1
> + >;
> + };
> +
> + pinctrl_reg_5v0_sensor: reg-5v0-sensorgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09
> + MX8MP_DSE_X1
> + >;
> + };
> +
> + pinctrl_sai6: sai6grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI1_TXD6__AUDIOMIX_SAI6_TX_SYNC
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
> + MX8MP_IOMUXC_SAI1_RXD4__AUDIOMIX_SAI6_TX_BCLK
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
> + MX8MP_IOMUXC_SAI1_TXD5__AUDIOMIX_SAI6_TX_DATA00
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
> + MX8MP_IOMUXC_SAI1_TXD7__AUDIOMIX_SAI6_MCLK
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
> + MX8MP_IOMUXC_SAI1_RXD5__AUDIOMIX_SAI6_RX_DATA00
> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
> + >;
> + };
> +
> + pinctrl_tas_reset: tasresetgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI5_RXD3__GPIO3_IO24
> + MX8MP_DSE_X1
> + >;
> + };
> +
> + pinctrl_uart1: uart1grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_uart2: uart2grp {
> + fsl,pins = <
> + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_SAI3_RXD__UART2_DCE_RTS
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + MX8MP_IOMUXC_SAI3_RXC__UART2_DCE_CTS
> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_wdog: wdoggrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B
> + (MX8MP_DSE_X6 | MX8MP_HYS_SCHMITT)
> + >;
> + };
> +
> + pinctrl_wl_int: wlintgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13
> + (MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
> + >;
> + };
> +
> + pinctrl_wl_reg: wlreggrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19
> + MX8MP_DSE_X1
> + >;
> + };
> +};
> +
> +&sai6 {
> + assigned-clocks = <&clk IMX8MP_CLK_SAI6>;
> + assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> + assigned-clock-rates = <12288000>;
> + pinctrl-0 = <&pinctrl_sai6>;
> + pinctrl-names = "default";
> + fsl,sai-mclk-direction-output;
> + status = "okay";
> +};
> +
> +&uart1 {
> + pinctrl-0 = <&pinctrl_uart1>;
> + pinctrl-names = "default";
> + status = "okay";
> +};
> +
> +&uart2 {
> + pinctrl-0 = <&pinctrl_uart2>;
> + pinctrl-names = "default";
> + uart-has-rtscts;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt";
> + interrupt-parent = <&gpio1>;
> + interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-names = "host-wakeup";
> + device-wakeup-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
> + max-speed = <921600>;
> + pinctrl-0 = <&pinctrl_bt>;
> + pinctrl-names = "default";
> + shutdown-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
> + vbat-supply = <®_3v3_per>;
> + vddio-supply = <®_3v3_per>;
> + };
> +};
> +
> +&usb3_0 {
> + status = "okay";
> +};
> +
> +&usb3_phy0 {
> + status = "okay";
> +};
> +
> +&usb_dwc3_0 {
> + dr_mode = "peripheral";
> +};
> +
> +&usdhc2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> + assigned-clock-rates = <50000000>;
> + cap-power-off-card;
> + keep-power-in-suspend;
> + max-frequency = <50000000>;
> + mmc-pwrseq = <&wifi_powerseq>;
> + non-removable;
> + pinctrl-0 = <&pinctrl_usdhc2>;
> + pinctrl-names = "default";
> + sd-uhs-sdr25;
> + vmmc-supply = <®_3v3_per>;
> + status = "okay";
> +
> + wifi@1 {
> + compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac";
> + reg = <1>;
> + interrupt-parent = <&gpio1>;
> + interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "host-wake";
> + pinctrl-0 = <&pinctrl_wl_int>;
> + pinctrl-names = "default";
> + brcm,board-type = "GOcontroll,moduline";
> + };
> +};
> +
> +&wdog1 {
> + pinctrl-0 = <&pinctrl_wdog>;
> + pinctrl-names = "default";
> + fsl,ext-reset-output;
> + status = "okay";
> +};
>
> --
> 2.49.0
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Displayy
2025-04-02 7:07 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Display Maud Spierings via B4 Relay
@ 2025-04-02 19:35 ` Frank Li
2025-04-03 7:44 ` Maud Spierings | GOcontroll
0 siblings, 1 reply; 23+ messages in thread
From: Frank Li @ 2025-04-02 19:35 UTC (permalink / raw)
To: maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On Wed, Apr 02, 2025 at 09:07:10AM +0200, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Add the BOE av101hdt-a10 variant of the Moduline Display, this variant
> comes with a 10.1 1280x720 display with a touchscreen (not working in
> mainline).
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>
> ---
> Currently the backlight driver is not available, this will be upstreamed
> in a future patch series. It is a Maxim max25014atg.
>
> The touchscreen has a Cypress CYAT81658-64AS48 controller which as far as
> I know is not supported upstream, the driver we currently use for this is
> a mess and I doubt we will be able to get it in an upstreamable state.
> ---
> ...x8p-ml81-moduline-display-106-av101hdt-a10.dtso | 102 +++++++++++++++++++++
> 1 file changed, 102 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso
> new file mode 100644
> index 0000000000000000000000000000000000000000..2855d7090988380ca0d4df8459cd1a67049f1080
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso
> @@ -0,0 +1,102 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2025 GOcontroll B.V.
> + * Author: Maud Spierings <maudspierings@gocontroll.com>
> + */
> +
> +#include <dt-bindings/clock/imx8mp-clock.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#include "imx8mp-pinfunc.h"
> +
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + model = "GOcontroll Moduline Display with BOE av101hdt-a10 display";
> +
> + panel {
> + compatible = "boe,av101hdt-a10";
> + enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_panel>;
> + pinctrl-names = "default";
> + power-supply = <®_3v3_per>;
> + reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
> +
> + port {
> + panel_lvds_in: endpoint {
> + remote-endpoint = <&ldb_lvds_ch0>;
> + };
> + };
> + };
> +
> + reg_vbus: regulator-vbus {
> + compatible = "regulator-fixed";
> + power-supply = <®_6v4>;
> + regulator-always-on;
> + regulator-max-microvolt = <5000000>;
> + regulator-min-microvolt = <5000000>;
> + regulator-name = "usb-c-vbus";
> + };
> +};
> +
> +&iomuxc {
> + pinctrl_panel: panelgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07
> + MX8MP_DSE_X1
> + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09
> + MX8MP_DSE_X1
> + >;
> + };
> +};
> +
> +&lcdif2 {
> + status = "okay";
> +};
> +
> +&lvds_bridge {
> + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
> + /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */
> + assigned-clock-rates = <0>, <1054620000>;
> + status = "okay";
> +
> + ports {
> + port@1 {
> + ldb_lvds_ch0: endpoint {
> + remote-endpoint = <&panel_lvds_in>;
> + };
> + };
> + };
> +};
> +
> +&usb3_1 {
> + status = "okay";
> +};
> +
> +&usb3_phy1 {
> + status = "okay";
> +};
> +
> +&usb_dwc3_1 {
> + dr_mode = "host";
> +
> + connector {
> + compatible = "usb-c-connector";
> + data-role = "host";
> + pd-disable;
> + vbus-supply = <®_vbus>;
> +
> + port {
> + high_speed_ep: endpoint {
> + remote-endpoint = <&usb1_hs_ep>;
> + };
> + };
> + };
> +
> + port {
> + usb1_hs_ep: endpoint {
> + remote-endpoint = <&high_speed_ep>;
> + };
> + };
> +};
why need enable usb3 in overlay file, I suppose it should be already enabled
at base dtb file.
Frank
>
> --
> 2.49.0
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Displayy
2025-04-02 7:07 ` [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display Maud Spierings via B4 Relay
@ 2025-04-02 19:36 ` Frank Li
0 siblings, 0 replies; 23+ messages in thread
From: Frank Li @ 2025-04-02 19:36 UTC (permalink / raw)
To: maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On Wed, Apr 02, 2025 at 09:07:11AM +0200, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Add the BOE av123z7m-n17 variant of the Moduline Display, this variant
> comes with a 12.3" 1920x720 display.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>
> ---
> Currently the backlight driver is not available, this will be upstreamed
> in a future patch series. It is a Maxim max25014atg.
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ...x8p-ml81-moduline-display-106-av123z7m-n17.dtso | 139 +++++++++++++++++++++
> 1 file changed, 139 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso
> new file mode 100644
> index 0000000000000000000000000000000000000000..dc0f86ca55fb6c21f10fbd333374a89002bb71c0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtso
> @@ -0,0 +1,139 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/*
> + * Copyright 2025 GOcontroll B.V.
> + * Author: Maud Spierings <maudspierings@gocontroll.com>
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
> +#include "imx8mp-pinfunc.h"
> +
> +/dts-v1/;
> +/plugin/;
> +
> +/ {
> + model = "GOcontroll Moduline Display with BOE av123z7m-n17 display";
> +
> + panel {
> + compatible = "boe,av123z7m-n17";
> + enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_panel>;
> + pinctrl-names = "default";
> + power-supply = <®_3v3_per>;
> + reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dual-lvds-odd-pixels;
> +
> + panel_in0: endpoint {
> + remote-endpoint = <&lvds1_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + dual-lvds-even-pixels;
> +
> + panel_in1: endpoint {
> + remote-endpoint = <&lvds0_out>;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2c4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* sn65dsi85 */
> + bridge@2d {
> + compatible = "ti,sn65dsi84";
> + reg = <0x2d>;
> + enable-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_lvds_bridge>;
> + pinctrl-names = "default";
> + vcc-supply = <®_1v8_per>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dsi_lvds_bridge_in: endpoint {
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = <&mipi_dsi_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + lvds0_out: endpoint {
> + remote-endpoint = <&panel_in1>;
> + };
> + };
> +
> + port@3 {
> + reg = <3>;
> +
> + lvds1_out: endpoint {
> + remote-endpoint = <&panel_in0>;
> + };
> + };
> + };
> + };
> +
> + /* max25014 @ 0x6f */
> +};
> +
> +&iomuxc {
> + pinctrl_lvds_bridge: lvdsbridgegrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14
> + MX8MP_DSE_X1
> + >;
> + };
> +
> + pinctrl_panel: panelgrp {
> + fsl,pins = <
> + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07
> + MX8MP_DSE_X1
> + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09
> + MX8MP_DSE_X1
> + >;
> + };
> +};
> +
> +&lcdif1 {
> + status = "okay";
> +};
> +
> +&mipi_dsi {
> + /*
> + * burst has to be at least 2x dsi clock that the sn65dsi85 expects
> + * display pixelclock * bpp / lanes / 2 = dsi clock
> + * 88.000.000 * 24 / 4 / 2 = 264.000.000
> + * range gets rounded up to 265.000.000 - 270.000.000
> + * 267.500.000 * 2 = 535.000.000
> + */
> + samsung,burst-clock-frequency = <535000000>;
> + samsung,esc-clock-frequency = <12000000>;
> + status = "okay";
> +
> + ports {
> + port@1 {
> + mipi_dsi_out: endpoint {
> + data-lanes = <1 2 3 4>;
> + remote-endpoint = < &dsi_lvds_bridge_in>;
> + };
> + };
> + };
> +};
>
> --
> 2.49.0
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefiley
2025-04-02 7:07 ` [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefile Maud Spierings via B4 Relay
@ 2025-04-02 19:38 ` Frank Li
0 siblings, 0 replies; 23+ messages in thread
From: Frank Li @ 2025-04-02 19:38 UTC (permalink / raw)
To: maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On Wed, Apr 02, 2025 at 09:07:12AM +0200, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Add the new Moduline Display boards to the Makefile to allow building
> them.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
This patch should belong into pervious patch, which add dtso file.
Frank
> arch/arm64/boot/dts/freescale/Makefile | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> index b6d3fe26d621234ab84353165d20af9d2536f839..fea25c7f997cda9aef73cd643f0f0279ee0bfffe 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -214,6 +214,12 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-bd500.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mp-skov-revc-tian-g07017.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb
> +imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \
> + imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtbo
> +imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17-dtbs += imx8mp-tx8p-ml81-moduline-display-106.dtb \
> + imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtbo
> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtb
> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
> dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
>
> --
> 2.49.0
>
>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy
2025-04-02 19:17 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy Frank Li
@ 2025-04-03 6:17 ` Maud Spierings | GOcontroll
2025-04-03 7:44 ` Krzysztof Kozlowski
1 sibling, 0 replies; 23+ messages in thread
From: Maud Spierings | GOcontroll @ 2025-04-03 6:17 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org
On 4/2/25 21:17, Frank Li wrote:
> On Wed, Apr 02, 2025 at 09:07:07AM +0200, Maud Spierings via B4 Relay wrote:
>> From: Maud Spierings <maudspierings@gocontroll.com>
>>
>> Add a maintainer for the GOcontroll Moduline series of controllers.
>>
>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>> ---
>> MAINTAINERS | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 4b3864a9852f9fca2be48987d383c0671e668336..7d4fbfdaaac1776fc7c4a569f7ab667f0a485eab 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -10043,6 +10043,12 @@ L: linux-media@vger.kernel.org
>> S: Maintained
>> F: drivers/media/usb/go7007/
>>
>> +GOCONTROLL MODULINE CONTROLLERS
>> +M: Maud Spierings <maudspierings@gocontroll.com>
>> +L: devicetree@vger.kernel.org
>> +S: Maintained
>
> this one sill need
> L: imx@lists.linux.dev
>
> Frank
Ah I didn't realize that comment applied to both my bad.
>> +F: arch/arm64/boot/dts/freescale/*moduline*.dts*
>> +
>> GOCONTROLL MODULINE MODULE SLOT
>> M: Maud Spierings <maudspierings@gocontroll.com>
>> S: Maintained
>>
>> --
>> 2.49.0
>>
>>
--
Met vriendelijke groeten/with kind regards,
Maud Spierings
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COMy
2025-04-02 19:24 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COMy Frank Li
@ 2025-04-03 7:36 ` Maud Spierings | GOcontroll
0 siblings, 0 replies; 23+ messages in thread
From: Maud Spierings | GOcontroll @ 2025-04-03 7:36 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org
On 4/2/25 21:24, Frank Li wrote:
> On Wed, Apr 02, 2025 at 09:07:08AM +0200, Maud Spierings via B4 Relay wrote:
>> From: Maud Spierings <maudspierings@gocontroll.com>
>>
>> The Ka-Ro Electronics tx8p-ml81 is a COM based on the imx8mp SOC. It has
>> 2 GB or ram and 8 GB of eMMC storage on board.
>>
>> Add it to enable boards based on this Module
>>
>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>> ---
>> .../arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi | 548 +++++++++++++++++++++
>> 1 file changed, 548 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..9c69228a2cd28ce767fa4054d10b19a196668ea2
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi
>> @@ -0,0 +1,548 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/*
>> + * Copyright (C) 2020 Lothar Waßmann <LW@KARO-electronics.de>
>> + * 2025 Maud Spierings <maudspierings@gocontroll.com>
>> + */
>> +
>> +#include "imx8mp.dtsi"
>> +
>> +/ {
>> + /* PHY regulator */
>> + regulator-3v3-etn {
>> + compatible = "regulator-fixed";
>> + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
>> + pinctrl-0 = <&pinctrl_reg_3v3_etn>;
>> + pinctrl-names = "default";
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-name = "3v3-etn";
>> + vin-supply = <®_vdd_3v3>;
>> + enable-active-high;
>> + };
>> +};
>> +
>> +&A53_0 {
>> + cpu-supply = <®_vdd_arm>;
>> +};
>> +
>> +&A53_1 {
>> + cpu-supply = <®_vdd_arm>;
>> +};
>> +
>> +&A53_2 {
>> + cpu-supply = <®_vdd_arm>;
>> +};
>> +
>> +&A53_3 {
>> + cpu-supply = <®_vdd_arm>;
>> +};
>> +
>> +&eqos {
>> + assigned-clocks = <&clk IMX8MP_CLK_ENET_AXI>,
>> + <&clk IMX8MP_CLK_ENET_QOS_TIMER>,
>> + <&clk IMX8MP_CLK_ENET_QOS>;
>> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
>> + <&clk IMX8MP_SYS_PLL2_100M>,
>> + <&clk IMX8MP_SYS_PLL2_50M>;
>> + assigned-clock-rates = <0>, <100000000>, <50000000>;
>
> clock rate 0 is quite strange, do you means 266000000?
I must admit I blindly copied that from the source, it does make more
sense given the name of the parent clock. I changed it and it does seem
to work fine.
It seems that in imx8mp.dtsi it is also set to 0, so I think that is
where it comes from.
>> + phy-handle = <ðphy0>;
>> + phy-mode = "rmii";
>> + pinctrl-0 = <&pinctrl_eqos>;
>> + pinctrl-1 = <&pinctrl_eqos_sleep>;
>> + pinctrl-names = "default", "sleep";
>> + status = "okay";
>> +
>> + mdio {
>> + compatible = "snps,dwmac-mdio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-0 = <&pinctrl_ethphy_rst_b>;
>> + pinctrl-names = "default";
>> + reset-delay-us = <25000>;
>> + reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
>> +
>> + ethphy0: ethernet-phy@0 {
>> + reg = <0>;
>> + interrupt-parent = <&gpio4>;
>> + interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
>> + clocks = <&clk IMX8MP_CLK_ENET_QOS>;
>> + pinctrl-0 = <&pinctrl_ethphy_int_b>;
>> + pinctrl-names = "default";
>> + smsc,disable-energy-detect;
>> + };
>> + };
>> +};
>> +
>> +&gpio1 {
>> + gpio-line-names = "SODIMM_152",
>> + "SODIMM_42",
>
> Please align to "SODIMM_152"
will do
Met vriendelijke groeten/with kind regards,
Maud Spierings
> Frank
>> + "PMIC_WDOG_B SODIMM_153",
>> + "PMIC_IRQ_B",
>> + "SODIMM_154",
>> + "SODIMM_155",
>> + "SODIMM_156",
>> + "SODIMM_157",
>> + "SODIMM_158",
>> + "SODIMM_159",
>> + "SODIMM_161",
>> + "SODIMM_162",
>> + "SODIMM_34",
>> + "SODIMM_36",
>> + "SODIMM_27",
>> + "SODIMM_28",
>> + "ENET_MDC",
>> + "ENET_MDIO",
>> + "",
>> + "ENET_XTAL1/CLKIN",
>> + "ENET_TXD1",
>> + "ENET_TXD0",
>> + "ENET_TXEN",
>> + "ENET_POWER",
>> + "ENET_COL/CRS_DV",
>> + "ENET_RXER",
>> + "ENET_RXD0",
>> + "ENET_RXD1",
>> + "",
>> + "",
>> + "",
>> + "";
>> +};
>> +
>> +&gpio2 {
>> + gpio-line-names = "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "SODIMM_51",
>> + "SODIMM_57",
>> + "SODIMM_56",
>> + "SODIMM_52",
>> + "SODIMM_53",
>> + "SODIMM_54",
>> + "SODIMM_55",
>> + "SODIMM_15",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "";
>> +};
>> +
>> +&gpio3 {
>> + gpio-line-names = "",
>> + "",
>> + "EMMC_DS",
>> + "EMMC_DAT5",
>> + "EMMC_DAT6",
>> + "EMMC_DAT7",
>> + "",
>> + "",
>> + "",
>> + "",
>> + "EMMC_DAT0",
>> + "EMMC_DAT1",
>> + "EMMC_DAT2",
>> + "EMMC_DAT3",
>> + "",
>> + "EMMC_DAT4",
>> + "",
>> + "EMMC_CLK",
>> + "EMMC_CMD",
>> + "SODIMM_75",
>> + "SODIMM_145",
>> + "SODIMM_163",
>> + "SODIMM_164",
>> + "SODIMM_165",
>> + "SODIMM_143",
>> + "SODIMM_144",
>> + "SODIMM_72",
>> + "SODIMM_73",
>> + "SODIMM_74",
>> + "SODIMM_93",
>> + "",
>> + "";
>> +};
>> +
>> +&gpio4 {
>> + gpio-line-names = "SODIMM_98",
>> + "SODIMM_99",
>> + "SODIMM_100",
>> + "SODIMM_101",
>> + "SODIMM_45",
>> + "SODIMM_43",
>> + "SODIMM_105",
>> + "SODIMM_106",
>> + "SODIMM_107",
>> + "SODIMM_108",
>> + "SODIMM_104",
>> + "SODIMM_103",
>> + "SODIMM_115",
>> + "SODIMM_114",
>> + "SODIMM_113",
>> + "SODIMM_112",
>> + "SODIMM_109",
>> + "SODIMM_110",
>> + "SODIMM_95",
>> + "SODIMM_96",
>> + "SODIMM_97",
>> + "ENET_nINT",
>> + "ENET_nRST",
>> + "SODIMM_84",
>> + "SODIMM_87",
>> + "SODIMM_86",
>> + "SODIMM_85",
>> + "SODIMM_83",
>> + "",
>> + "SODIMM_66",
>> + "SODIMM_65",
>> + "";
>> +};
>> +
>> +&gpio5 {
>> + gpio-line-names = "",
>> + "",
>> + "",
>> + "SODIMM_76",
>> + "SODIMM_81",
>> + "SODIMM_146",
>> + "SODIMM_48",
>> + "SODIMM_46",
>> + "SODIMM_47",
>> + "SODIMM_44",
>> + "SODIMM_49",
>> + "",
>> + "SODIMM_70",
>> + "SODIMM_69",
>> + "PMIC_SCL",
>> + "PMIC_SDA",
>> + "SODIMM_41",
>> + "SODIMM_40",
>> + "SODIMM_148",
>> + "SODIMM_149",
>> + "SODIMM_150",
>> + "SODIMM_151",
>> + "SODIMM_60",
>> + "SODIMM_59",
>> + "SODIMM_64",
>> + "SODIMM_63",
>> + "SODIMM_62",
>> + "SODIMM_61",
>> + "SODIMM_68",
>> + "SODIMM_67",
>> + "",
>> + "";
>> +};
>> +
>> +&i2c1 {
>> + clock-frequency = <400000>;
>> + pinctrl-0 = <&pinctrl_i2c1>;
>> + pinctrl-1 = <&pinctrl_i2c1_gpio>;
>> + pinctrl-names = "default", "gpio";
>> + scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>> + sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
>> + status = "okay";
>> +
>> + pmic@25 {
>> + compatible = "nxp,pca9450c";
>> + reg = <0x25>;
>> + interrupt-parent = <&gpio1>;
>> + interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
>> + pinctrl-0 = <&pinctrl_pmic>;
>> + pinctrl-names = "default";
>> +
>> + regulators {
>> + reg_vdd_soc: BUCK1 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <900000>;
>> + regulator-min-microvolt = <805000>;
>> + regulator-name = "vdd-soc";
>> + regulator-ramp-delay = <3125>;
>> + };
>> +
>> + reg_vdd_arm: BUCK2 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <950000>;
>> + regulator-min-microvolt = <805000>;
>> + regulator-name = "vdd-core";
>> + regulator-ramp-delay = <3125>;
>> + nxp,dvs-run-voltage = <950000>;
>> + nxp,dvs-standby-voltage = <850000>;
>> + };
>> +
>> + reg_vdd_3v3: BUCK4 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-min-microvolt = <3300000>;
>> + regulator-name = "3v3";
>> + };
>> +
>> + reg_nvcc_nand: BUCK5 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-name = "nvcc-nand";
>> + };
>> +
>> + reg_nvcc_dram: BUCK6 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <1100000>;
>> + regulator-min-microvolt = <1100000>;
>> + regulator-name = "nvcc-dram";
>> + };
>> +
>> + reg_snvs_1v8: LDO1 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-name = "snvs-1v8";
>> + };
>> +
>> + ldo2_reg: LDO2 {
>> + regulator-always-on;
>> + regulator-max-microvolt = <1150000>;
>> + regulator-min-microvolt = <800000>;
>> + regulator-name = "LDO2";
>> + };
>> +
>> + reg_vdda_1v8: LDO3 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-name = "vdda-1v8";
>> + };
>> +
>> + ldo4_reg: LDO4 {
>> + regulator-max-microvolt = <3300000>;
>> + regulator-min-microvolt = <800000>;
>> + regulator-name = "LDO4";
>> + };
>> +
>> + ldo5_reg: LDO5 {
>> + regulator-always-on;
>> + regulator-boot-on;
>> + regulator-max-microvolt = <3300000>;
>> + regulator-min-microvolt = <1800000>;
>> + regulator-name = "LDO5";
>> + };
>> + };
>> + };
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_eqos: eqosgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_ENET_TD2__CCM_ENET_QOS_CLOCK_GENERATE_REF_CLK
>> + (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE | MX8MP_SION)
>> + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC
>> + (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO
>> + (MX8MP_DSE_X4 | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0
>> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
>> + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1
>> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
>> + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0
>> + (MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1
>> + (MX8MP_FSEL_FAST | MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RXC__ENET_QOS_RX_ER
>> + (MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL
>> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL
>> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST)
>> + >;
>> + };
>> +
>> + pinctrl_eqos_sleep: eqos-sleep-grp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_ENET_TD2__GPIO1_IO19
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_MDC__GPIO1_IO16
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_MDIO__GPIO1_IO17
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_TD0__GPIO1_IO21
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_TD1__GPIO1_IO20
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RD0__GPIO1_IO26
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RD1__GPIO1_IO27
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RXC__GPIO1_IO25
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_RX_CTL__GPIO1_IO24
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_ENET_TX_CTL__GPIO1_IO22
>> + (MX8MP_ODE_ENABLE | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +
>> + pinctrl_ethphy_int_b: ethphy-int-bgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21
>> + (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT)
>> + >;
>> + };
>> +
>> + pinctrl_ethphy_rst_b: ethphy-rst-bgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22
>> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +
>> + pinctrl_i2c1: i2c1grp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL
>> + MX8MP_I2C_DEFAULT
>> + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA
>> + MX8MP_I2C_DEFAULT
>> + >;
>> + };
>> +
>> + pinctrl_i2c1_gpio: i2c1-gpiogrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14
>> + MX8MP_I2C_DEFAULT
>> + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15
>> + MX8MP_I2C_DEFAULT
>> + >;
>> + };
>> +
>> + pinctrl_pmic: pmicgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03
>> + (MX8MP_PULL_UP | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +
>> + pinctrl_reg_3v3_etn: reg-3v3-etngrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_ENET_TXC__GPIO1_IO23
>> + (MX8MP_PULL_UP | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3: usdhc3grp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
>> + (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
>> + MX8MP_USDHC_DATA_DEFAULT
>> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
>> + (MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
>> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
>> + (MX8MP_DSE_X2 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
>> + (MX8MP_DSE_X2 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +
>> + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK
>> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7
>> + (MX8MP_DSE_X6 | MX8MP_USDHC_DATA_DEFAULT)
>> + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE
>> + (MX8MP_DSE_X6 | MX8MP_FSEL_FAST | MX8MP_HYS_SCHMITT | MX8MP_PULL_ENABLE)
>> + >;
>> + };
>> +};
>> +
>> +&usdhc3 {
>> + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
>> + assigned-clock-rates = <200000000>;
>> + bus-width = <8>;
>> + max-frequency = <200000000>;
>> + non-removable;
>> + pinctrl-0 = <&pinctrl_usdhc3>;
>> + pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
>> + pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
>> + pinctrl-names = "default", "state_100mhz", "state_200mhz";
>> + vmmc-supply = <®_vdd_3v3>;
>> + voltage-ranges = <3300 3300>;
>> + vqmmc-supply = <®_nvcc_nand>;
>> + status = "okay";
>> +};
>>
>> --
>> 2.49.0
>>
>>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Displayy
2025-04-02 19:35 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Displayy Frank Li
@ 2025-04-03 7:44 ` Maud Spierings | GOcontroll
0 siblings, 0 replies; 23+ messages in thread
From: Maud Spierings | GOcontroll @ 2025-04-03 7:44 UTC (permalink / raw)
To: Frank Li
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org
On 4/2/25 21:35, Frank Li wrote:
> On Wed, Apr 02, 2025 at 09:07:10AM +0200, Maud Spierings via B4 Relay wrote:
>> From: Maud Spierings <maudspierings@gocontroll.com>
>>
>> Add the BOE av101hdt-a10 variant of the Moduline Display, this variant
>> comes with a 10.1 1280x720 display with a touchscreen (not working in
>> mainline).
>>
>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>>
>> ---
>> Currently the backlight driver is not available, this will be upstreamed
>> in a future patch series. It is a Maxim max25014atg.
>>
>> The touchscreen has a Cypress CYAT81658-64AS48 controller which as far as
>> I know is not supported upstream, the driver we currently use for this is
>> a mess and I doubt we will be able to get it in an upstreamable state.
>> ---
>> ...x8p-ml81-moduline-display-106-av101hdt-a10.dtso | 102 +++++++++++++++++++++
>> 1 file changed, 102 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..2855d7090988380ca0d4df8459cd1a67049f1080
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtso
>> @@ -0,0 +1,102 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/*
>> + * Copyright 2025 GOcontroll B.V.
>> + * Author: Maud Spierings <maudspierings@gocontroll.com>
>> + */
>> +
>> +#include <dt-bindings/clock/imx8mp-clock.h>
>> +#include <dt-bindings/gpio/gpio.h>
>> +
>> +#include "imx8mp-pinfunc.h"
>> +
>> +/dts-v1/;
>> +/plugin/;
>> +
>> +/ {
>> + model = "GOcontroll Moduline Display with BOE av101hdt-a10 display";
>> +
>> + panel {
>> + compatible = "boe,av101hdt-a10";
>> + enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
>> + pinctrl-0 = <&pinctrl_panel>;
>> + pinctrl-names = "default";
>> + power-supply = <®_3v3_per>;
>> + reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
>> +
>> + port {
>> + panel_lvds_in: endpoint {
>> + remote-endpoint = <&ldb_lvds_ch0>;
>> + };
>> + };
>> + };
>> +
>> + reg_vbus: regulator-vbus {
>> + compatible = "regulator-fixed";
>> + power-supply = <®_6v4>;
>> + regulator-always-on;
>> + regulator-max-microvolt = <5000000>;
>> + regulator-min-microvolt = <5000000>;
>> + regulator-name = "usb-c-vbus";
>> + };
>> +};
>> +
>> +&iomuxc {
>> + pinctrl_panel: panelgrp {
>> + fsl,pins = <
>> + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07
>> + MX8MP_DSE_X1
>> + MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09
>> + MX8MP_DSE_X1
>> + >;
>> + };
>> +};
>> +
>> +&lcdif2 {
>> + status = "okay";
>> +};
>> +
>> +&lvds_bridge {
>> + assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
>> + /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_DISP2_PIX * 2 * 7 */
>> + assigned-clock-rates = <0>, <1054620000>;
>> + status = "okay";
>> +
>> + ports {
>> + port@1 {
>> + ldb_lvds_ch0: endpoint {
>> + remote-endpoint = <&panel_lvds_in>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&usb3_1 {
>> + status = "okay";
>> +};
>> +
>> +&usb3_phy1 {
>> + status = "okay";
>> +};
>> +
>> +&usb_dwc3_1 {
>> + dr_mode = "host";
>> +
>> + connector {
>> + compatible = "usb-c-connector";
>> + data-role = "host";
>> + pd-disable;
>> + vbus-supply = <®_vbus>;
>> +
>> + port {
>> + high_speed_ep: endpoint {
>> + remote-endpoint = <&usb1_hs_ep>;
>> + };
>> + };
>> + };
>> +
>> + port {
>> + usb1_hs_ep: endpoint {
>> + remote-endpoint = <&high_speed_ep>;
>> + };
>> + };
>> +};
>
> why need enable usb3 in overlay file, I suppose it should be already enabled
> at base dtb file.
It seems useless to me to enable the usb when the av123z7m-n17 board is
attached as it doesn't use it, but I guess it would make sense to put
the usb/phy in the mainboard and keep only the connector/dwc in this
overlay.
> Frank
>>
>> --
>> 2.49.0
>>
>>
--
Met vriendelijke groeten/with kind regards,
Maud Spierings
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy
2025-04-02 19:17 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy Frank Li
2025-04-03 6:17 ` Maud Spierings | GOcontroll
@ 2025-04-03 7:44 ` Krzysztof Kozlowski
1 sibling, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2025-04-03 7:44 UTC (permalink / raw)
To: Frank Li, maudspierings
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, devicetree,
linux-kernel, imx, linux-arm-kernel
On 02/04/2025 21:17, Frank Li wrote:
> On Wed, Apr 02, 2025 at 09:07:07AM +0200, Maud Spierings via B4 Relay wrote:
>> From: Maud Spierings <maudspierings@gocontroll.com>
>>
>> Add a maintainer for the GOcontroll Moduline series of controllers.
>>
>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>> ---
>> MAINTAINERS | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 4b3864a9852f9fca2be48987d383c0671e668336..7d4fbfdaaac1776fc7c4a569f7ab667f0a485eab 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -10043,6 +10043,12 @@ L: linux-media@vger.kernel.org
>> S: Maintained
>> F: drivers/media/usb/go7007/
>>
>> +GOCONTROLL MODULINE CONTROLLERS
>> +M: Maud Spierings <maudspierings@gocontroll.com>
>> +L: devicetree@vger.kernel.org
And this is not needed. Drop irrelevant entries.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module
2025-04-02 7:07 ` [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module Maud Spierings via B4 Relay
@ 2025-04-03 7:45 ` Krzysztof Kozlowski
2025-04-03 12:50 ` Daniel Baluta
0 siblings, 1 reply; 23+ messages in thread
From: Krzysztof Kozlowski @ 2025-04-03 7:45 UTC (permalink / raw)
To: maudspierings, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam
Cc: devicetree, linux-kernel, imx, linux-arm-kernel
On 02/04/2025 09:07, Maud Spierings via B4 Relay wrote:
> From: Maud Spierings <maudspierings@gocontroll.com>
>
> Add GOcontroll as unofficial maintainers of the Ka-Ro tx8p-ml81 COM
> module bindings.
>
> This support is not officially done by Ka-Ro electronics, if they at
> some point will supporting mainline, this should be changed to them.
>
> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> ---
> MAINTAINERS | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 322ee00547f6e494a96d2495092f72148da22bd0..4b3864a9852f9fca2be48987d383c0671e668336 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -12752,6 +12752,13 @@ S: Maintained
> F: Documentation/hwmon/k8temp.rst
> F: drivers/hwmon/k8temp.c
>
> +KA-RO TX8P COM MODULE
> +M: Maud Spierings <maudspierings@gocontroll.com>
> +L: devicetree@vger.kernel.org
Drop
> +L: imx@lists.linux.dev
I would say this as well, but not my subsystem to worry.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module
2025-04-03 7:45 ` Krzysztof Kozlowski
@ 2025-04-03 12:50 ` Daniel Baluta
2025-04-03 14:07 ` Krzysztof Kozlowski
0 siblings, 1 reply; 23+ messages in thread
From: Daniel Baluta @ 2025-04-03 12:50 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: maudspierings, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
devicetree, linux-kernel, imx, linux-arm-kernel
On Thu, Apr 3, 2025 at 10:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On 02/04/2025 09:07, Maud Spierings via B4 Relay wrote:
> > From: Maud Spierings <maudspierings@gocontroll.com>
> >
> > Add GOcontroll as unofficial maintainers of the Ka-Ro tx8p-ml81 COM
> > module bindings.
> >
> > This support is not officially done by Ka-Ro electronics, if they at
> > some point will supporting mainline, this should be changed to them.
> >
> > Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
> > ---
> > MAINTAINERS | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 322ee00547f6e494a96d2495092f72148da22bd0..4b3864a9852f9fca2be48987d383c0671e668336 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -12752,6 +12752,13 @@ S: Maintained
> > F: Documentation/hwmon/k8temp.rst
> > F: drivers/hwmon/k8temp.c
> >
> > +KA-RO TX8P COM MODULE
> > +M: Maud Spierings <maudspierings@gocontroll.com>
> > +L: devicetree@vger.kernel.org
>
> Drop
>
> > +L: imx@lists.linux.dev
>
> I would say this as well, but not my subsystem to worry.
We don't actually mind to gather all i.MX based boards development on
this mailinglist.
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module
2025-04-03 12:50 ` Daniel Baluta
@ 2025-04-03 14:07 ` Krzysztof Kozlowski
0 siblings, 0 replies; 23+ messages in thread
From: Krzysztof Kozlowski @ 2025-04-03 14:07 UTC (permalink / raw)
To: Daniel Baluta
Cc: maudspierings, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
devicetree, linux-kernel, imx, linux-arm-kernel
On 03/04/2025 14:50, Daniel Baluta wrote:
> On Thu, Apr 3, 2025 at 10:45 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On 02/04/2025 09:07, Maud Spierings via B4 Relay wrote:
>>> From: Maud Spierings <maudspierings@gocontroll.com>
>>>
>>> Add GOcontroll as unofficial maintainers of the Ka-Ro tx8p-ml81 COM
>>> module bindings.
>>>
>>> This support is not officially done by Ka-Ro electronics, if they at
>>> some point will supporting mainline, this should be changed to them.
>>>
>>> Signed-off-by: Maud Spierings <maudspierings@gocontroll.com>
>>> ---
>>> MAINTAINERS | 7 +++++++
>>> 1 file changed, 7 insertions(+)
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 322ee00547f6e494a96d2495092f72148da22bd0..4b3864a9852f9fca2be48987d383c0671e668336 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -12752,6 +12752,13 @@ S: Maintained
>>> F: Documentation/hwmon/k8temp.rst
>>> F: drivers/hwmon/k8temp.c
>>>
>>> +KA-RO TX8P COM MODULE
>>> +M: Maud Spierings <maudspierings@gocontroll.com>
>>> +L: devicetree@vger.kernel.org
>>
>> Drop
>>
>>> +L: imx@lists.linux.dev
>>
>> I would say this as well, but not my subsystem to worry.
>
> We don't actually mind to gather all i.MX based boards development on
> this mailinglist.
No one discusses this. They are already gathered there.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2025-04-03 14:07 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-04-02 7:07 [PATCH v4 0/9] arm64: dts: freescale: Add support for the GOcontroll Moduline Display Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 1/9] dt-bindings: arm: fsl: Add " Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 2/9] arm64: dts: imx8mp: Add pinctrl config definitions Maud Spierings via B4 Relay
2025-04-02 7:07 ` [PATCH v4 3/9] MAINTAINERS: add maintainer for the Ka-Ro tx8p-ml81 COM module Maud Spierings via B4 Relay
2025-04-03 7:45 ` Krzysztof Kozlowski
2025-04-03 12:50 ` Daniel Baluta
2025-04-03 14:07 ` Krzysztof Kozlowski
2025-04-02 7:07 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllers Maud Spierings via B4 Relay
2025-04-02 19:17 ` [PATCH v4 4/9] MAINTAINERS: add maintainer for the GOcontroll Moduline controllersy Frank Li
2025-04-03 6:17 ` Maud Spierings | GOcontroll
2025-04-03 7:44 ` Krzysztof Kozlowski
2025-04-02 7:07 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COM Maud Spierings via B4 Relay
2025-04-02 19:24 ` [PATCH v4 5/9] arm64: dts: freescale: add Ka-Ro Electronics tx8p-ml81 COMy Frank Li
2025-04-03 7:36 ` Maud Spierings | GOcontroll
2025-04-02 7:07 ` [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboard Maud Spierings via B4 Relay
2025-04-02 19:31 ` [PATCH v4 6/9] arm64: dts: freescale: Add the GOcontroll Moduline Display baseboardy Frank Li
2025-04-02 7:07 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Display Maud Spierings via B4 Relay
2025-04-02 19:35 ` [PATCH v4 7/9] arm64: dts: freescale: Add the BOE av101hdt-a10 variant of the Moduline Displayy Frank Li
2025-04-03 7:44 ` Maud Spierings | GOcontroll
2025-04-02 7:07 ` [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Display Maud Spierings via B4 Relay
2025-04-02 19:36 ` [PATCH v4 8/9] arm64: dts: freescale: Add the BOE av123z7m-n17 variant of the Moduline Displayy Frank Li
2025-04-02 7:07 ` [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefile Maud Spierings via B4 Relay
2025-04-02 19:38 ` [PATCH v4 9/9] arm64: dts: Add Moduline Display boards to Makefiley Frank Li
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