From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexandre Torgue Subject: Re: [PATCH v6 2/4] drivers: irqchip: Add STM32 external interrupts support Date: Wed, 21 Sep 2016 09:45:09 +0200 Message-ID: References: <1474387259-18926-1-git-send-email-alexandre.torgue@st.com> <1474387259-18926-3-git-send-email-alexandre.torgue@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: Sender: linux-gpio-owner@vger.kernel.org To: Thomas Gleixner Cc: Maxime Coquelin , Jason Cooper , Marc Zyngier , Linus Walleij , Mark Rutland , Rob Herring , linux-gpio@vger.kernel.org, arnd@arndb.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Daniel Thompson , bruherrera@gmail.com, lee.jones@linaro.org List-Id: devicetree@vger.kernel.org Hi Thomas, On 09/20/2016 10:16 PM, Thomas Gleixner wrote: > Alexandre, > > On Tue, 20 Sep 2016, Alexandre TORGUE wrote: > >> The STM32 external interrupt controller consists of edge detectors that >> generate interrupts requests or wake-up events. >> >> Each line can be independently configured as interrupt or wake-up source, >> and triggers either on rising, falling or both edges. Each line can also >> be masked independently. >> >> Signed-off-by: Maxime Coquelin >> Signed-off-by: Alexandre TORGUE > > That all looks very reasonable now. The only remaining question is your SOB > chain. Who is the author of these patches? You or Maxime? If it's Maxime, > then the changelog misses a From: tag. If it's you then Maximes SOB is > bogus. Actually Maxime wrote the main part of this driver and sent version 1 and 2 of the series. After Linus W. reviews, rework was required to use hierarchical domain. According to Maxime, I coded the rework (adaptation to hierarchical domain) and sent other version of the series. Regards Alex > > Thanks, > > tglx > >