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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id jw9-20020a170906e94900b006fea3702e56sm4287753ejb.79.2022.05.30.11.56.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 30 May 2022 11:56:40 -0700 (PDT) Message-ID: Date: Mon, 30 May 2022 20:56:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 2/3] dts: socfpga: Add Google Chameleon v3 devicetree Content-Language: en-US To: =?UTF-8?Q?Pawe=c5=82_Anikiel?= , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: arnd@arndb.de, olof@lixom.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dinguyen@kernel.org, Alexandru M Stan References: <20220530130839.120710-1-pan@semihalf.com> <20220530130839.120710-3-pan@semihalf.com> From: Krzysztof Kozlowski In-Reply-To: <20220530130839.120710-3-pan@semihalf.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/05/2022 15:08, Paweł Anikiel wrote: > Add devicetree for the Google Chameleon v3 board. > > Signed-off-by: Paweł Anikiel > Signed-off-by: Alexandru M Stan Your SoB chain looks odd. Who did what here? > --- > arch/arm/boot/dts/Makefile | 1 + > .../boot/dts/socfpga_arria10_chameleonv3.dts | 90 +++++++++++++++++++ > 2 files changed, 91 insertions(+) > create mode 100644 arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 023c8b4ba45c..9417106d3289 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1146,6 +1146,7 @@ dtb-$(CONFIG_ARCH_S5PV210) += \ > s5pv210-torbreck.dtb > dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ > socfpga_arria5_socdk.dtb \ > + socfpga_arria10_chameleonv3.dtb \ > socfpga_arria10_socdk_nand.dtb \ > socfpga_arria10_socdk_qspi.dtb \ > socfpga_arria10_socdk_sdmmc.dtb \ > diff --git a/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts > new file mode 100644 > index 000000000000..988cc445438e > --- /dev/null > +++ b/arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts > @@ -0,0 +1,90 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright 2022 Google LLC > + */ > +/dts-v1/; > +#include "socfpga_arria10_mercury_aa1.dtsi" > + > +/ { > + model = "Google Chameleon V3"; > + compatible = "google,chameleon-v3", You miss here enclustra compatible. > + "altr,socfpga-arria10", "altr,socfpga"; > + > + aliases { > + serial0 = &uart0; > + i2c0 = &i2c0; > + i2c1 = &i2c1; > + }; > +}; > + > +&gmac0 { > + status = "okay"; > +}; > + > +&gpio0 { > + status = "okay"; > +}; > + > +&gpio1 { > + status = "okay"; > +}; > + > +&gpio2 { > + status = "okay"; > +}; > + > +&i2c0 { > + status = "okay"; > + > + ssm2603: ssm2603@1a { Generic node names. > + compatible = "adi,ssm2603"; > + reg = <0x1a>; > + }; > +}; > + > +&i2c1 { > + status = "okay"; > + > + u80: u80@21 { > + compatible = "nxp,pca9535"; Generic node names. Best regards, Krzysztof