From: Reinette Chatre <reinette.chatre@intel.com>
To: Drew Fustini <fustini@kernel.org>
Cc: "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
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Subject: Re: [PATCH RFC v2 08/17] RISC-V: QoS: add resctrl interface for CBQRI controllers
Date: Wed, 18 Feb 2026 15:18:57 -0800 [thread overview]
Message-ID: <f7ec04c1-0890-4f32-ab3d-4c8b042eb65a@intel.com> (raw)
In-Reply-To: <aZYz9IdnnnsGZJr9@gen8>
Hi Drew,
On 2/18/26 1:49 PM, Drew Fustini wrote:
> On Fri, Feb 13, 2026 at 03:30:44PM -0800, Reinette Chatre wrote:
>> On 1/28/26 12:27 PM, Drew Fustini wrote:
>>> +void resctrl_arch_rmid_idx_decode(u32 idx, u32 *closid, u32 *rmid)
>>> +{
>>> + *closid = ((u32)~0); /* refer to X86_RESCTRL_BAD_CLOSID */
>>
>> The name is actually X86_RESCTRL_EMPTY_CLOSID - and if RISC-V also needs it we could
>> make it generally available.A
>
> There is no dependency between closid (RCID for CBQRI) and rmid (MCID
> for CBQRI), so resctrl_arch_rmid_idx_decode() is essentially the same
> for RISC-V.
>
> What do you think would be the best way to share that between X86 and
> RISC-V?
>
> Or is it is simpler to just defiend RISCV_RESCTRL_EMPTY_CLOSID?
Thinking about this more, yes, I do think this will be simplest since
a central define would force this on MPAM that does not seem appropriate.
...
>
> CBQRI controllers are accessible by all harts (e.g. cpus) through mmio
> registers so access should not burden other harts. I think I will modify
> the implementation to just directly read/write the mmio registers when
> necessary rather than caching them in ctrl_val.
fyi ... resctrl is starting to show some signs of support for this. Please see
ab0308aee381 ("x86,fs/resctrl: Handle events that can be read from any CPU")
related to the monitoring code. Support for monitoring is not general yet
though since the default L3 events are still assumed to require reading from
CPU in the domain.
...
>>> + err = qos_init_domain_ctrlval(res, domain);
>>> + if (err)
>>> + goto err_free_domain;
>>> +
>>> + if (cbqri_res) {
>>> + list_add_tail(&domain->hdr.list, &cbqri_res->resctrl_res.ctrl_domains);
>>
>> There is an expectation that the domain list be sorted. For reference, resctrl_find_domain().
>
> Thank you for letting me know. I'll work on sorting the domains before
> adding to the list.
resctrl_find_domain() can help with this. If the domain is not found it returns
NULL and also returns the first domain with id bigger than the input id via a
parameter that can be used to insert a new domain in the right place.
Reinette
next prev parent reply other threads:[~2026-02-18 23:19 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 20:27 [PATCH RFC v2 00/17] RISC-V: QoS: add CBQRI resctrl interface Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 01/17] dt-bindings: riscv: Add Ssqosid extension description Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 02/17] RISC-V: Detect the Ssqosid extension Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 03/17] RISC-V: Add support for srmcfg CSR from Ssqosid ext Drew Fustini
2026-02-02 3:17 ` [External] " yunhui cui
2026-02-08 1:31 ` Drew Fustini
2026-02-09 3:36 ` yunhui cui
2026-02-02 4:27 ` yunhui cui
2026-02-03 19:43 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 04/17] RISC-V: QoS: define properties of CBQRI controllers Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 05/17] RISC-V: QoS: define CBQRI capacity and bandwidth capabilities Drew Fustini
2026-02-13 23:13 ` Reinette Chatre
2026-02-14 16:25 ` Drew Fustini
2026-02-17 16:32 ` Reinette Chatre
2026-02-17 18:28 ` Drew Fustini
2026-02-17 19:02 ` Reinette Chatre
2026-02-17 22:36 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 06/17] RISC-V: QoS: define CBQRI resctrl resources and domains Drew Fustini
2026-02-13 23:15 ` Reinette Chatre
2026-02-14 16:34 ` Drew Fustini
2026-03-25 2:31 ` [External] " yunhui cui
2026-03-25 6:49 ` Drew Fustini
2026-03-26 8:32 ` yunhui cui
2026-03-29 5:58 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 07/17] RISC-V: QoS: define prototypes for resctrl interface Drew Fustini
2026-02-13 23:21 ` Reinette Chatre
2026-01-28 20:27 ` [PATCH RFC v2 08/17] RISC-V: QoS: add resctrl interface for CBQRI controllers Drew Fustini
2026-02-02 4:12 ` [External] " yunhui cui
2026-02-20 19:54 ` Drew Fustini
2026-02-09 7:20 ` Gong Shuai
2026-02-09 10:07 ` Gong Shuai
2026-02-09 14:16 ` Gong Shuai
2026-02-11 0:57 ` Drew Fustini
2026-02-13 23:30 ` Reinette Chatre
2026-02-18 21:49 ` Drew Fustini
2026-02-18 23:18 ` Reinette Chatre [this message]
2026-03-25 2:09 ` [External] " yunhui cui
2026-03-25 6:37 ` Drew Fustini
2026-03-29 10:27 ` guo.wenjia23
2026-01-28 20:27 ` [PATCH RFC v2 09/17] RISC-V: QoS: expose implementation to resctrl Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 10/17] RISC-V: QoS: add late_initcall to setup resctrl interface Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 11/17] RISC-V: QoS: add to build when CONFIG_RISCV_ISA_SSQOSID set Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 12/17] RISC-V: QoS: make CONFIG_RISCV_ISA_SSQOSID select resctrl Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 13/17] acpi: pptt: Add helper to find a cache from id Drew Fustini
2026-03-25 1:34 ` [External] " yunhui cui
2026-01-28 20:27 ` [PATCH RFC v2 14/17] include: acpi: actbl2: Add structs for RQSC table Drew Fustini
2026-01-28 20:31 ` Rafael J. Wysocki
2026-01-28 20:44 ` Drew Fustini
2026-01-28 20:50 ` Rafael J. Wysocki
2026-03-25 1:43 ` [External] " yunhui cui
2026-03-25 7:09 ` Drew Fustini
2026-03-25 1:48 ` yunhui cui
2026-03-25 7:14 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 15/17] RISC-V: QoS: add Cache ID and Prox Dom to CBQRI controllers Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 16/17] acpi: riscv: Parse RISC-V Quality of Service Controller (RQSC) table Drew Fustini
2026-02-02 11:08 ` [External] " yunhui cui
2026-02-03 20:00 ` Drew Fustini
2026-02-14 4:48 ` Drew Fustini
2026-01-28 20:27 ` [PATCH RFC v2 17/17] acpi: riscv: Add support for RISC-V Quality of Service Controller (RQSC) Drew Fustini
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