* [PATCH v1 1/3] usb: phy: add usb phy notify port status API @ 2023-05-19 4:58 Stanley Chang 2023-05-19 4:58 ` [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY Stanley Chang 2023-05-19 4:58 ` [PATCH v1 3/3] dt-bindings: phy: realtek: Add the doc about " Stanley Chang 0 siblings, 2 replies; 12+ messages in thread From: Stanley Chang @ 2023-05-19 4:58 UTC (permalink / raw) To: Greg Kroah-Hartman Cc: Stanley Chang, Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Douglas Anderson, Matthias Kaehlcke, Flavio Suligoi, Ray Chi, Michael Grzeschik, Bhuvanesh Surachari, Mathias Nyman, Arnd Bergmann, Paul Cercueil, Linus Walleij, linux-phy, devicetree, linux-kernel, linux-usb In Realtek SoC, the parameter of usb phy is designed to can dynamic tuning base on port status. Therefore, add a notify callback of phy driver when usb port status change. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> --- drivers/usb/core/hub.c | 13 +++++++++++++ include/linux/usb/phy.h | 14 ++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index 97a0f8faea6e..b4fbbeae1927 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c @@ -614,6 +614,19 @@ static int hub_ext_port_status(struct usb_hub *hub, int port1, int type, ret = 0; } mutex_unlock(&hub->status_mutex); + + if (!ret) { + struct usb_device *hdev = hub->hdev; + + if (hdev && !hdev->parent) { + struct usb_hcd *hcd = bus_to_hcd(hdev->bus); + + if (hcd->usb_phy) + usb_phy_notify_port_status(hcd->usb_phy, + port1 - 1, *status, *change); + } + } + return ret; } diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h index e4de6bc1f69b..53bf3540098f 100644 --- a/include/linux/usb/phy.h +++ b/include/linux/usb/phy.h @@ -144,6 +144,10 @@ struct usb_phy { */ int (*set_wakeup)(struct usb_phy *x, bool enabled); + /* notify phy port status change */ + int (*notify_port_status)(struct usb_phy *x, + int port, u16 portstatus, u16 portchange); + /* notify phy connect status change */ int (*notify_connect)(struct usb_phy *x, enum usb_device_speed speed); @@ -316,6 +320,16 @@ usb_phy_set_wakeup(struct usb_phy *x, bool enabled) return 0; } +static inline int +usb_phy_notify_port_status(struct usb_phy *x, int port, u16 portstatus, + u16 portchange) +{ + if (x && x->notify_port_status) + return x->notify_port_status(x, port, portstatus, portchange); + else + return 0; +} + static inline int usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed) { -- 2.34.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 4:58 [PATCH v1 1/3] usb: phy: add usb phy notify port status API Stanley Chang @ 2023-05-19 4:58 ` Stanley Chang 2023-05-19 6:28 ` Arnd Bergmann ` (2 more replies) 2023-05-19 4:58 ` [PATCH v1 3/3] dt-bindings: phy: realtek: Add the doc about " Stanley Chang 1 sibling, 3 replies; 12+ messages in thread From: Stanley Chang @ 2023-05-19 4:58 UTC (permalink / raw) To: Greg Kroah-Hartman Cc: Stanley Chang, Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Arnd Bergmann, Paul Cercueil, Linus Walleij, linux-phy, devicetree, linux-kernel, linux-usb Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB 2.0/3.0 controller. Added two drivers to drive the USB 2.0/3.0 PHY transceivers. For USB 3.0 transceivers, a driver phy-rtk-usb3 is provided. The driver phy-rtk-usb2 is used to support USB 2.0 transceivers. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> --- drivers/usb/phy/Kconfig | 14 + drivers/usb/phy/Makefile | 2 + drivers/usb/phy/phy-rtk-usb.h | 88 ++ drivers/usb/phy/phy-rtk-usb2.c | 2196 ++++++++++++++++++++++++++++++++ drivers/usb/phy/phy-rtk-usb3.c | 1165 +++++++++++++++++ 5 files changed, 3465 insertions(+) create mode 100644 drivers/usb/phy/phy-rtk-usb.h create mode 100644 drivers/usb/phy/phy-rtk-usb2.c create mode 100644 drivers/usb/phy/phy-rtk-usb3.c diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 5f629d7cad64..b2e5feb9f37a 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -172,4 +172,18 @@ config USB_ULPI_VIEWPORT Provides read/write operations to the ULPI phy register set for controllers with a viewport register (e.g. Chipidea/ARC controllers). +config RTK_USB2PHY + tristate "Realtek RTD USB2 PHY Transceiver Driver" + select USB_PHY + help + Enable this to support Realtek SoC USB2 phy transceiver. + Support the DHC (digital home center) RTD series SoCs. + +config RTK_USB3PHY + tristate "Realtek RTD USB3 PHY Transceiver Driver" + select USB_PHY + help + Enable this to support Realtek SoC USB3 phy transceiver. + Support the DHC (digital home center) RTD series SoCs. + endmenu diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index e5d619b4d8f6..1e64255fcd1f 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile @@ -23,3 +23,5 @@ obj-$(CONFIG_USB_MXS_PHY) += phy-mxs-usb.o obj-$(CONFIG_USB_ULPI) += phy-ulpi.o obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi-viewport.o obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o +obj-$(CONFIG_RTK_USB2PHY) += phy-rtk-usb2.o +obj-$(CONFIG_RTK_USB3PHY) += phy-rtk-usb3.o diff --git a/drivers/usb/phy/phy-rtk-usb.h b/drivers/usb/phy/phy-rtk-usb.h new file mode 100644 index 000000000000..5652866d0b02 --- /dev/null +++ b/drivers/usb/phy/phy-rtk-usb.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * phy-rtk-usb.h Realtek usb phy header file + * + * copyright (c) 2023 realtek semiconductor corporation + * + */ + +#ifndef __PHY_RTK_USB_H__ +#define __PHY_RTK_USB_H__ + +struct rtk_usb_phy { + struct usb_phy phy; + struct device *dev; + struct regmap *usb_regs; + struct regmap *mac_regs; + struct regmap *usb_ctrl_regs; + + int port_index; + int phyN; + void *reg_addr; + void *phy_data; + +#ifdef CONFIG_DEBUG_FS + struct dentry *debug_dir; +#endif +}; + +#define phy_read(addr) __raw_readl(addr) +#define phy_write(addr, val) do { \ + /* Do smp_wmb */ \ + smp_wmb(); __raw_writel(val, addr); \ +} while (0) +#define PHY_IO_TIMEOUT_MSEC (50) + +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 result) +{ + unsigned long timeout = jiffies + msecs_to_jiffies(PHY_IO_TIMEOUT_MSEC); + + while (time_before(jiffies, timeout)) { + /* Do smp_rmb */ + smp_rmb(); + if ((phy_read(reg) & mask) == result) + return 0; + udelay(100); + } + pr_err("\033[0;32;31m can't program USB phy \033[m\n"); + + return -ETIMEDOUT; +} + +#define DEFAULT_CHIP_REVISION 0xA00 +#define MAX_CHIP_REVISION 0xC00 + +static inline int __get_chip_revision(void) +{ + int chip_revision = 0xFFF; + char revision[] = "FFF"; + struct soc_device_attribute soc_att[] = {{.revision = revision}, {}}; + struct soc_device_attribute *soc_att_match = NULL; + + while (soc_att_match == NULL) { + chip_revision--; + + if (chip_revision <= DEFAULT_CHIP_REVISION) + break; + if (chip_revision > MAX_CHIP_REVISION) + chip_revision = MAX_CHIP_REVISION; + else if ((chip_revision & 0xFF) > 0xF) + chip_revision = (chip_revision & 0xF00) + 0xF; + + snprintf(revision, 4, "%X", chip_revision); + + soc_att_match = (struct soc_device_attribute *) + soc_device_match(soc_att); + } + + if (soc_att_match) { + pr_debug("%s get chip_revision %x\n", __func__, chip_revision); + return chip_revision; + } + + pr_debug("%s: Use default chip_revision %x\n", __func__, + DEFAULT_CHIP_REVISION); + return DEFAULT_CHIP_REVISION; +} + +#endif /* __PHY_RTK_USB_H__ */ diff --git a/drivers/usb/phy/phy-rtk-usb2.c b/drivers/usb/phy/phy-rtk-usb2.c new file mode 100644 index 000000000000..ce9305ccb6fb --- /dev/null +++ b/drivers/usb/phy/phy-rtk-usb2.c @@ -0,0 +1,2196 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * phy-rtk-usb2.c RTK usb2.0 PHY driver + * + * Copyright (C) 2023 Realtek Semiconductor Corporation + * + */ + +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_address.h> +#include <linux/uaccess.h> +#include <linux/debugfs.h> +#include <linux/nvmem-consumer.h> +#include <linux/regmap.h> +#include <linux/sys_soc.h> +#include <linux/mfd/syscon.h> +#include <linux/usb.h> +#include <linux/usb/phy.h> +#include <linux/usb/hcd.h> + +#include "phy-rtk-usb.h" + +#define RTK_USB2PHY_NAME "rtk-usb2phy" + +/* GUSB2PHYACCn register */ +#define PHY_NEW_REG_REQ BIT(25) +#define PHY_VSTS_BUSY BIT(23) +#define PHY_VCTRL_SHIFT 8 +#define PHY_REG_DATA_MASK 0xff + +#define GET_LOW_NIBBLE(addr) (addr & 0x0f) +#define GET_HIGH_NIBBLE(addr) ((addr & 0xf0)>>4) + +#define EFUS_USB_DC_CAL_RATE 2 +#define EFUS_USB_DC_CAL_MAX 7 + +#define EFUS_USB_DC_DIS_RATE 1 +#define EFUS_USB_DC_DIS_MAX 7 + +#define MAX_PHY_DATA_SIZE 20 +#define OFFEST_PHY_READ 0x20 + +#define SET_PAGE_OFFSET 0xf4 +#define SET_PAGE_0 0x9b +#define SET_PAGE_1 0xbb +#define SET_PAGE_2 0xdb + +#define PAGE_START 0xe0 +#define PAGE0_0xE4 0xe4 +#define PAGE0_0xE7 0xe7 +#define PAGE1_0xE0 0xe0 +#define PAGE1_0xE2 0xe2 + +/* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */ +#define PAGE_ADDR_MAP_ARRAY_INDEX(addr) \ + (((addr - PAGE_START)&0x7) + \ + (((addr - PAGE_START)&0x10)>>1)) +#define ARRAY_INDEX_MAP_PAGE_ADDR(index) \ + (((index + PAGE_START)&0x7) + \ + (((index&0x8)<<1) + PAGE_START)) + +struct reg_addr { + void __iomem *reg_wrap_vstatus; + void __iomem *reg_gusb2phyacc0; + int vstatus_index; +}; + +struct phy_parameter { + u8 addr; + u8 data; +}; + +struct phy_data { + int page0_size; + struct phy_parameter *page0; + int page1_size; + struct phy_parameter *page1; + int page2_size; + struct phy_parameter *page2; + + bool check_efuse; + int check_efuse_version; +#define CHECK_EFUSE_V1 1 +#define CHECK_EFUSE_V2 2 + int8_t efuse_usb_dc_cal; + int efuse_usb_dc_cal_rate; + int usb_dc_cal_mask; + int8_t efuse_usb_dc_dis; + int efuse_usb_dc_dis_rate; + int usb_dc_dis_mask; + bool usb_dc_dis_at_page0; + bool do_toggle; + bool do_toggle_driving; + int disconnect_driving_updated; + bool use_default_parameter; + bool is_double_sensitivity_mode; + bool ldo_force_enable; + bool ldo_enable; + s32 ldo_page0_e4_compensate; + s32 page0_e4_compensate; +}; + +static char rtk_usb_phy_read(struct reg_addr *regAddr, char addr) +{ + void __iomem *reg_gusb2phyacc0 = regAddr->reg_gusb2phyacc0; + unsigned int regVal; + int ret = 0; + + addr -= OFFEST_PHY_READ; + + /* polling until VBusy == 0 */ + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* VCtrl = low nibble of addr, and set PHY_NEW_REG_REQ */ + regVal = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + phy_write(reg_gusb2phyacc0, regVal); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* VCtrl = high nibble of addr, and set PHY_NEW_REG_REQ */ + regVal = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + phy_write(reg_gusb2phyacc0, regVal); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return (char)ret; + + /* rmb for reg read */ + smp_rmb(); + regVal = phy_read(reg_gusb2phyacc0); + + return (char) (regVal & PHY_REG_DATA_MASK); +} + +static int rtk_usb_phy_write(struct reg_addr *regAddr, char addr, char data) +{ + unsigned int regVal; + void __iomem *reg_wrap_vstatus = regAddr->reg_wrap_vstatus; + void __iomem *reg_gusb2phyacc0 = regAddr->reg_gusb2phyacc0; + int shift_bits = regAddr->vstatus_index * 8; + int ret = 0; + + /* write data to VStatusOut2 (data output to phy) */ + phy_write(reg_wrap_vstatus, (u32)data<<shift_bits); + + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return ret; + + /* VCtrl = low nibble of addr, set PHY_NEW_REG_REQ */ + regVal = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << PHY_VCTRL_SHIFT); + + phy_write(reg_gusb2phyacc0, regVal); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return ret; + + /* VCtrl = high nibble of addr, set PHY_NEW_REG_REQ */ + regVal = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << PHY_VCTRL_SHIFT); + + phy_write(reg_gusb2phyacc0, regVal); + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); + if (ret) + return ret; + + return 0; +} + +static int rtk_usb_phy_set_page(struct reg_addr *regAddr, int page) +{ + switch (page) { + case 0: + return rtk_usb_phy_write(regAddr, SET_PAGE_OFFSET, SET_PAGE_0); + case 1: + return rtk_usb_phy_write(regAddr, SET_PAGE_OFFSET, SET_PAGE_1); + case 2: + return rtk_usb_phy_write(regAddr, SET_PAGE_OFFSET, SET_PAGE_2); + default: + pr_err("%s error page=%d\n", __func__, page); + } + + return -1; +} + +#define USB_CTRL 0x0 /* usb ctrl at 0x98007FB0 */ +#define ISO_USB_U2PHY_REG_LDO_PW (BIT(20) | BIT(21) | BIT(22) | BIT(23)) + +static int control_phy_power(struct rtk_usb_phy *rtk_phy, + struct phy_data *phy_data, struct reg_addr *regAddr) +{ + int use_ldo = 0; + unsigned int val; + + if (!rtk_phy->usb_ctrl_regs) { + dev_info(rtk_phy->dev, "%s No usb_ctrl_regs can't set USB_CTRL\n", + __func__); + return use_ldo; + } + + if (regmap_read(rtk_phy->usb_ctrl_regs, USB_CTRL, &val)) { + dev_err(rtk_phy->dev, "%s Get USB_CTRL fail\n", __func__); + return use_ldo; + } + + if ((val & ISO_USB_U2PHY_REG_LDO_PW) == ISO_USB_U2PHY_REG_LDO_PW) { + dev_info(rtk_phy->dev, "%s phy use ldo power! (USB_CTRL val=0x%x)\n", + __func__, val); + use_ldo = 1; + goto out; + } + + if (phy_data->ldo_force_enable) { + regmap_update_bits(rtk_phy->usb_ctrl_regs, USB_CTRL, + (unsigned int)ISO_USB_U2PHY_REG_LDO_PW, + (unsigned int)ISO_USB_U2PHY_REG_LDO_PW); + use_ldo = 1; + + dev_info(rtk_phy->dev, "%s phy %s then turn on ldo! USB_CTRL val=0x%x\n", + __func__, + phy_data->ldo_force_enable ? + "ldo_force_enable":"no power", + val); + } + +out: + return use_ldo; +} + +static u8 __updated_page0_0xe4_parameter(struct phy_data *phy_data, u8 data) +{ + u8 val; + s32 __val; + s32 page0_e4_compensate = 0; + s32 usb_dc_cal_mask = phy_data->usb_dc_cal_mask; + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + if (phy_data->ldo_enable) + page0_e4_compensate = phy_data->ldo_page0_e4_compensate; + + __val = (s32)(data & usb_dc_cal_mask) + page0_e4_compensate + + phy_data->efuse_usb_dc_cal; + } else { /* for CHECK_EFUSE_V2 or no efuse */ + page0_e4_compensate = phy_data->page0_e4_compensate; + + if (phy_data->efuse_usb_dc_cal) + __val = (s32)((phy_data->efuse_usb_dc_cal & usb_dc_cal_mask) + + page0_e4_compensate); + else + __val = (s32)(data & usb_dc_cal_mask); + } + + if (__val > usb_dc_cal_mask) + __val = usb_dc_cal_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~usb_dc_cal_mask)) | (__val & usb_dc_cal_mask); + + return val; +} + +static u8 __updated_dc_disconnect_level_page0_0xe4(struct phy_data *phy_data, + u8 data) +{ + u8 val; + s32 __val; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + int offset = 4; + + __val = (s32)((data >> offset) & usb_dc_dis_mask) + + phy_data->efuse_usb_dc_dis; + + if (__val > usb_dc_dis_mask) + __val = usb_dc_dis_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~(usb_dc_dis_mask << offset))) | + (__val & usb_dc_dis_mask) << offset; + + return val; +} + +/* updated disconnect level at page0 0xe4 */ +static void update_dc_disconnect_level_at_page0(struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, + struct phy_data *phy_data, bool isUpdate) +{ + struct phy_parameter *phy_page_setting; + int i; + + /* Set page 0 */ + phy_page_setting = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); + + if (i < phy_data->page0_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + u8 __data; + int offset = 4; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + __data = rtk_usb_phy_read(regAddr, addr); + + /* keep default dc dis and real dc cal */ + data = (data & ((usb_dc_dis_mask << offset))) | + (__data & (~(usb_dc_dis_mask << offset))); + + if (isUpdate) + data = __updated_dc_disconnect_level_page0_0xe4(phy_data, data); + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, + addr, data); + return; + } + + dev_info(rtk_phy->dev, + "%s to set Page0 0xE4=%x for dc disconnect level (%s)\n", + __func__, + rtk_usb_phy_read(regAddr, addr), + isUpdate?"Update":"restore"); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE0_0xE4\n", + __func__, __LINE__, i); + } +} + +static u8 __updated_dc_disconnect_level_page1_0xe2(struct phy_data *phy_data, + u8 data) +{ + u8 val; + s32 __val; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + __val = (s32)(data & usb_dc_dis_mask) + + phy_data->efuse_usb_dc_dis; + } else { /* for CHECK_EFUSE_V2 or no efuse */ + if (phy_data->efuse_usb_dc_dis) + __val = (s32)(phy_data->efuse_usb_dc_dis & usb_dc_dis_mask); + else + __val = (s32)(data & usb_dc_dis_mask); + } + + if (__val > usb_dc_dis_mask) + __val = usb_dc_dis_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~usb_dc_dis_mask)) | (__val & usb_dc_dis_mask); + + return val; +} + +/* updated disconnect level at page1 0xe2 */ +static void update_dc_disconnect_level_at_page1(struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, + struct phy_data *phy_data, bool isUpdate) +{ + struct phy_parameter *phy_page_setting; + int i; + + /* Set page 1 */ + phy_page_setting = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE2); + + if (i < phy_data->page1_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + u8 __data; + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + __data = rtk_usb_phy_read(regAddr, addr); + + data = (data & usb_dc_dis_mask) | (__data & ~(usb_dc_dis_mask)); + + if (isUpdate) + data = __updated_dc_disconnect_level_page1_0xe2(phy_data, data); + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, + addr, data); + return; + } + + dev_info(rtk_phy->dev, + "%s to set Page1 0xE2=%x for dc disconnect level (%s)\n", + __func__, + rtk_usb_phy_read(regAddr, addr), + isUpdate?"Update":"restore"); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE1_0xE2\n", + __func__, __LINE__, i); + } +} + +static void update_dc_disconnect_level(struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, + struct phy_data *phy_data, bool isUpdate) +{ + if (phy_data->usb_dc_dis_at_page0) + update_dc_disconnect_level_at_page0( + rtk_phy, regAddr, phy_data, isUpdate); + else + update_dc_disconnect_level_at_page1( + rtk_phy, regAddr, phy_data, isUpdate); +} + +static void do_rtk_usb2_phy_toggle(struct rtk_usb_phy *rtk_phy, + int index, bool isConnect); + +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int index) +{ + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_page_setting; + int i; + + if (!rtk_phy) { + pr_err("%s, rtk_phy is NULL\n", __func__); + return -EINVAL; + } + + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, index); + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + if (!phy_data) { + pr_err("%s, phy_data is NULL\n", __func__); + return -EINVAL; + } + + if (control_phy_power(rtk_phy, phy_data, regAddr)) { + phy_data->ldo_enable = true; + dev_info(rtk_phy->dev, "%s USB phy use ldo power compensate phy parameter (%d)\n", + __func__, phy_data->ldo_page0_e4_compensate); + } + + if (phy_data->use_default_parameter) { + dev_info(rtk_phy->dev, "%s phy#%d use default parameter\n", + __func__, index); + goto do_toggle; + } + + /* Set page 0 */ + phy_page_setting = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + for (i = 0; i < phy_data->page0_size; i++) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) + continue; + + if (addr == PAGE0_0xE4) + data = __updated_page0_0xe4_parameter(phy_data, data); + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page0 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, data); + return -1; + } + dev_dbg(rtk_phy->dev, "[%s:%d] Good page0 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, + rtk_usb_phy_read(regAddr, addr)); + } + + /* Set page 1 */ + phy_page_setting = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + for (i = 0; i < phy_data->page1_size; i++) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) + continue; + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, + addr, data); + return -1; + } + dev_dbg(rtk_phy->dev, "[%s:%d] Good page1 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, + rtk_usb_phy_read(regAddr, addr)); + } + + if (phy_data->page2_size == 0) + goto do_toggle; + + /* Set page 2 */ + phy_page_setting = phy_data->page2; + rtk_usb_phy_set_page(regAddr, 2); + + for (i = 0; i < phy_data->page2_size; i++) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) + continue; + + if (rtk_usb_phy_write(regAddr, addr, data)) { + dev_err(rtk_phy->dev, + "[%s:%d] Error page2 addr=0x%x value=0x%x\n", + __func__, __LINE__, addr, data); + return -1; + } + dev_dbg(rtk_phy->dev, "[%s:%d] Good page2 addr=0x%x value=0x%x\n", + __func__, __LINE__, + (phy_page_setting + i)->addr, + rtk_usb_phy_read(regAddr, + (phy_page_setting + i)->addr)); + } + +do_toggle: + do_rtk_usb2_phy_toggle(rtk_phy, index, false); + + return 0; +} + +static int rtk_usb_phy_init(struct usb_phy *phy) +{ + struct rtk_usb_phy *rtk_phy = container_of(phy, struct rtk_usb_phy, phy); + unsigned long phy_init_time = jiffies; + int i, ret = 0; + + dev_dbg(phy->dev, "Init RTK USB 2.0 PHY\n"); + for (i = 0; i < rtk_phy->phyN; i++) + ret = do_rtk_usb_phy_init(rtk_phy, i); + + dev_info(phy->dev, "Initialized RTK USB 2.0 PHY (take %dms)\n", + jiffies_to_msecs(jiffies - phy_init_time)); + return ret; +} + +static void rtk_usb_phy_shutdown(struct usb_phy *phy) +{ + dev_info(phy->dev, "Shutdown RTK USB 2.0 PHY\n"); +} + +static void do_rtk_usb2_phy_toggle(struct rtk_usb_phy *rtk_phy, + int index, bool isConnect) +{ + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_page_setting; + int i; + + if (!rtk_phy) { + pr_err("%s phy_data is NULL\n", __func__); + return; + } + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + if (!phy_data) { + dev_err(rtk_phy->dev, "%s phy_data is NULL\n", __func__); + return; + } + + if (!phy_data->do_toggle) + goto out; + + if (phy_data->is_double_sensitivity_mode) + goto do_toggle_driving; + + /* Set page 0 */ + phy_page_setting = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE7); + + if (i < phy_data->page0_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + + if (isConnect) { + rtk_usb_phy_write(regAddr, addr, data & + (~(BIT(4) | BIT(5) | BIT(6)))); + } else { + rtk_usb_phy_write(regAddr, addr, data | + (BIT(4) | BIT(5) | BIT(6))); + } + dev_info(rtk_phy->dev, + "%s %sconnect to set Page0 0xE7=%x\n", + __func__, + isConnect?"":"dis", + rtk_usb_phy_read(regAddr, addr)); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE0_0xE7\n", + __func__, __LINE__, i); + } + +do_toggle_driving: + + if (!phy_data->do_toggle_driving) + goto do_toggle; + + /* Page 0 addr 0xE4 driving capability */ + + /* Set page 0 */ + phy_page_setting = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); + + if (i < phy_data->page0_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + + if (addr == PAGE0_0xE4) + data = __updated_page0_0xe4_parameter(phy_data, data); + + if (isConnect) { + rtk_usb_phy_write(regAddr, addr, data); + } else { + u8 val; + s32 __val; + s32 driving_updated = + phy_data->disconnect_driving_updated; + s32 usb_dc_cal_mask = phy_data->usb_dc_cal_mask; + + __val = (s32)(data & usb_dc_cal_mask) + driving_updated; + + if (__val > usb_dc_cal_mask) + __val = usb_dc_cal_mask; + else if (__val < 0) + __val = 0; + + val = (data & (~usb_dc_cal_mask)) | (__val & usb_dc_cal_mask); + + rtk_usb_phy_write(regAddr, addr, val); + } + dev_info(rtk_phy->dev, + "%s %sconnect to set Page0 0xE4=%x for driving\n", + __func__, + isConnect?"":"dis", + rtk_usb_phy_read(regAddr, addr)); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE0_0xE4\n", + __func__, __LINE__, i); + } + +do_toggle: + /* restore dc disconnect level before toggle */ + update_dc_disconnect_level(rtk_phy, regAddr, phy_data, false); + + /* Set page 1 */ + phy_page_setting = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE0); + + if (i < phy_data->page1_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + + dev_info(rtk_phy->dev, + "%s ########## to toggle PAGE1_0xE0 BIT(2)\n", + __func__); + rtk_usb_phy_write(regAddr, addr, data & (~BIT(2))); + mdelay(1); + rtk_usb_phy_write(regAddr, addr, data | (BIT(2))); + } else { + dev_err(rtk_phy->dev, + "ERROR: %s %d index=%d addr Not PAGE1_0xE0\n", + __func__, __LINE__, i); + } + + /* update dc disconnect level after toggle */ + update_dc_disconnect_level(rtk_phy, regAddr, phy_data, true); + +out: + return; +} + +static void rtk_usb2_phy_toggle(struct usb_phy *usb2_phy, bool isConnect, int port) +{ + int index = port; + struct rtk_usb_phy *rtk_phy = NULL; + + if (usb2_phy != NULL && usb2_phy->dev != NULL) + rtk_phy = dev_get_drvdata(usb2_phy->dev); + + if (rtk_phy == NULL) { + pr_err("%s %d ERROR! NO this device\n", __func__, __LINE__); + return; + } + if (index > rtk_phy->phyN) { + pr_err("%s %d ERROR! port=%d > phyN=%d\n", + __func__, __LINE__, index, rtk_phy->phyN); + return; + } + + do_rtk_usb2_phy_toggle(rtk_phy, index, isConnect); +} + +static int rtk_usb_phy_notify_port_status(struct usb_phy *x, int port, + u16 portstatus, u16 portchange) +{ + bool isConnect = false; + + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", + __func__, port, (int)portstatus, (int)portchange); + if (portstatus & USB_PORT_STAT_CONNECTION) + isConnect = true; + + if (portchange & USB_PORT_STAT_C_CONNECTION) + rtk_usb2_phy_toggle(x, isConnect, port); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static struct dentry *create_phy_debug_root(void) +{ + struct dentry *phy_debug_root; + + phy_debug_root = debugfs_lookup("phy", usb_debug_root); + if (!phy_debug_root) { + phy_debug_root = debugfs_create_dir("phy", usb_debug_root); + if (!phy_debug_root) + pr_err("%s Error phy_debug_root is NULL\n", __func__); + else + pr_debug("%s Create phy_debug_root folder\n", __func__); + } + + return phy_debug_root; +} + +static int rtk_usb2_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + int i, index; + + for (index = 0; index < rtk_phy->phyN; index++) { + struct reg_addr *regAddr = + &((struct reg_addr *)rtk_phy->reg_addr)[index]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[index]; + struct phy_parameter *phy_page_setting; + + seq_printf(s, "PHY %d:\n", index); + + seq_puts(s, "Page 0:\n"); + /* Set page 0 */ + phy_page_setting = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + for (i = 0; i < phy_data->page0_size; i++) { + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + u8 data = (phy_page_setting + i)->data; + u8 value = rtk_usb_phy_read(regAddr, addr); + + if ((phy_page_setting + i)->addr) + seq_printf(s, "Page 0: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, "Page 0: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + seq_puts(s, "Page 1:\n"); + /* Set page 1 */ + phy_page_setting = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + for (i = 0; i < phy_data->page1_size; i++) { + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + u8 data = (phy_page_setting + i)->data; + u8 value = rtk_usb_phy_read(regAddr, addr); + + if ((phy_page_setting + i)->addr) + seq_printf(s, "Page 1: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, "Page 1: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + if (phy_data->page2_size == 0) + goto out; + + seq_puts(s, "Page 2:\n"); + /* Set page 2 */ + phy_page_setting = phy_data->page2; + rtk_usb_phy_set_page(regAddr, 2); + + for (i = 0; i < phy_data->page2_size; i++) { + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + u8 data = (phy_page_setting + i)->data; + u8 value = rtk_usb_phy_read(regAddr, addr); + + if ((phy_page_setting + i)->addr) + seq_printf(s, "Page 2: addr=0x%x data=0x%02x ==> read value=0x%02x\n", + addr, data, value); + else + seq_printf(s, "Page 2: addr=0x%x data=none ==> read value=0x%02x\n", + addr, value); + } + + seq_puts(s, "Property:\n"); + seq_printf(s, "check_efuse: %s\n", + phy_data->check_efuse?"Enable":"Disable"); + seq_printf(s, "check_efuse_version: %d\n", + phy_data->check_efuse_version); + seq_printf(s, "efuse_usb_dc_cal: %d\n", + (int)phy_data->efuse_usb_dc_cal); + seq_printf(s, "efuse_usb_dc_cal_rate: %d\n", + phy_data->efuse_usb_dc_cal_rate); + seq_printf(s, "usb_dc_cal_mask: 0x%x\n", + phy_data->usb_dc_cal_mask); + seq_printf(s, "efuse_usb_dc_dis: %d\n", + (int)phy_data->efuse_usb_dc_dis); + seq_printf(s, "efuse_usb_dc_dis_rate: %d\n", + phy_data->efuse_usb_dc_dis_rate); + seq_printf(s, "usb_dc_dis_mask: 0x%x\n", + phy_data->usb_dc_dis_mask); + seq_printf(s, "usb_dc_dis_at_page0: %s\n", + phy_data->usb_dc_dis_at_page0?"true":"false"); + seq_printf(s, "do_toggle: %s\n", + phy_data->do_toggle?"Enable":"Disable"); + seq_printf(s, "do_toggle_driving: %s\n", + phy_data->do_toggle_driving?"Enable":"Disable"); + seq_printf(s, "disconnect_driving_updated: 0x%x\n", + phy_data->disconnect_driving_updated); + seq_printf(s, "use_default_parameter: %s\n", + phy_data->use_default_parameter?"Enable":"Disable"); + seq_printf(s, "is_double_sensitivity_mode: %s\n", + phy_data->is_double_sensitivity_mode?"Enable":"Disable"); + seq_printf(s, "ldo_force_enable: %s\n", + phy_data->ldo_force_enable?"Enable":"Disable"); + seq_printf(s, "ldo_enable: %s\n", + phy_data->ldo_enable?"Enable":"Disable"); + seq_printf(s, "ldo_page0_e4_compensate: %d\n", + phy_data->ldo_page0_e4_compensate); + seq_printf(s, "page0_e4_compensate: %d\n", + phy_data->page0_e4_compensate); + } + +out: + return 0; +} + +static int rtk_usb2_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb2_parameter_show, inode->i_private); +} + +static const struct file_operations rtk_usb2_parameter_fops = { + .open = rtk_usb2_parameter_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __get_parameter_at_page(struct seq_file *s, + struct rtk_usb_phy *rtk_phy, + struct phy_parameter *phy_parameter_array, + const char *phy_page, const char *phy_addr) +{ + struct phy_parameter *phy_parameter; + uint32_t addr; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + i = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_array + i); + + if (phy_parameter->addr) + seq_printf(s, "Now Parameter %s addr 0x%02x = 0x%02x\n", + phy_page, phy_parameter->addr, phy_parameter->data); + else + seq_printf(s, "Now Parameter %s addr 0x%02x is default\n", + phy_page, addr); + + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%02x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + return 0; +} + +static int __set_parameter_at_page( + struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, struct phy_data *phy_data, + struct phy_parameter *phy_parameter_array, + const char *phy_page, const char *phy_addr, const char *phy_value) +{ + struct phy_parameter *phy_parameter; + uint32_t addr, value; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + ret = kstrtouint(phy_value, 16, &value); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + + i = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_array + i); + + if (phy_parameter->addr) { + phy_parameter->data = value; + } else { + phy_parameter->addr = addr; + phy_parameter->data = value; + } + + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%02x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + if (strcmp("page0", phy_page) == 0 && (addr == PAGE0_0xE4)) + value = __updated_page0_0xe4_parameter(phy_data, value); + + if (rtk_usb_phy_write(regAddr, addr, value)) + dev_err(rtk_phy->dev, + "[%s:%d] Error: addr=0x%02x value=0x%02x\n", + __func__, __LINE__, addr, value); + + return 0; +} + +static int rtk_usb2_set_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + const struct file *file = s->file; + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *dir_name = p_dentry->d_iname; + struct dentry *pp_dentry = p_dentry->d_parent; + const char *phy_dir_name = pp_dentry->d_iname; + int ret, index; + struct phy_data *phy_data; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s/%s\n", + __func__, phy_dir_name, dir_name, file_name); + return -EINVAL; + } + + if (strcmp("page0", dir_name) == 0) + ret = __get_parameter_at_page(s, rtk_phy, phy_data->page0, + dir_name, file_name); + else if (strcmp("page1", dir_name) == 0) + ret = __get_parameter_at_page(s, rtk_phy, phy_data->page1, + dir_name, file_name); + else if (strcmp("page2", dir_name) == 0) + ret = __get_parameter_at_page(s, rtk_phy, phy_data->page2, + dir_name, file_name); + + if (ret < 0) + return ret; + + seq_puts(s, "Set phy parameter by following command\n"); + seq_printf(s, "echo \"value\" > %s/%s/%s\n", + phy_dir_name, dir_name, file_name); + + return 0; +} + +static int rtk_usb2_set_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb2_set_parameter_show, inode->i_private); +} + +static ssize_t rtk_usb2_set_parameter_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *dir_name = p_dentry->d_iname; + struct dentry *pp_dentry = p_dentry->d_parent; + const char *phy_dir_name = pp_dentry->d_iname; + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + struct reg_addr *regAddr; + struct phy_data *phy_data; + int ret = 0; + char buffer[40] = {0}; + int index; + + if (copy_from_user(&buffer, ubuf, + min_t(size_t, sizeof(buffer) - 1, count))) + return -EFAULT; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!regAddr) { + dev_err(rtk_phy->dev, + "%s: No regAddr for %s/%s/%s\n", + __func__, phy_dir_name, dir_name, file_name); + return -EINVAL; + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s/%s\n", + __func__, phy_dir_name, dir_name, file_name); + return -EINVAL; + } + + if (strcmp("page0", dir_name) == 0) { + rtk_usb_phy_set_page(regAddr, 0); + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->page0, dir_name, file_name, buffer); + } else if (strcmp("page1", dir_name) == 0) { + rtk_usb_phy_set_page(regAddr, 1); + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->page1, dir_name, file_name, buffer); + } else if (strcmp("page2", dir_name) == 0) { + rtk_usb_phy_set_page(regAddr, 2); + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->page2, dir_name, file_name, buffer); + } + if (ret < 0) + return ret; + + return count; +} + +static const struct file_operations rtk_usb2_set_parameter_fops = { + .open = rtk_usb2_set_parameter_open, + .write = rtk_usb2_set_parameter_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int rtk_usb2_toggle_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + struct phy_data *phy_data; + int i; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + seq_printf(s, "Now phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + seq_puts(s, "ehco 1 to enable toggle phy parameter.\n"); + + return 0; +} + +static int rtk_usb2_toggle_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb2_toggle_show, inode->i_private); +} + +static ssize_t rtk_usb2_toggle_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + char buf[32]; + struct phy_data *phy_data; + bool enable = false; + int i; + + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) + return -EFAULT; + + if (!strncmp(buf, "1", 1)) + enable = true; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + phy_data->do_toggle = enable; + dev_info(rtk_phy->dev, "Set phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + + return count; +} + +static const struct file_operations rtk_usb2_toggle_fops = { + .open = rtk_usb2_toggle_open, + .write = rtk_usb2_toggle_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int create_debug_set_parameter_files(struct rtk_usb_phy *rtk_phy, + struct dentry *phy_dir, const char *page, size_t addr_size) +{ + struct dentry *page_dir; + int i; + + page_dir = debugfs_create_dir(page, phy_dir); + if (!page_dir) { + dev_err(rtk_phy->dev, + "%s Error create folder %s fail\n", + __func__, page); + return -EINVAL; + } + + for (i = 0; i < addr_size; i++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "%x", ARRAY_INDEX_MAP_PAGE_ADDR(i)); + + if (!debugfs_create_file(name, 0644, + page_dir, rtk_phy, + &rtk_usb2_set_parameter_fops)) + dev_err(rtk_phy->dev, + "%s Error create file %s/%s fail", + page, name, __func__); + } + + return 0; +} + +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) +{ + struct dentry *phy_debug_root = NULL; + struct dentry *set_parameter_dir = NULL; + + phy_debug_root = create_phy_debug_root(); + + if (!phy_debug_root) { + dev_err(rtk_phy->dev, "%s Error phy_debug_root is NULL", + __func__); + return; + } + + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), + phy_debug_root); + if (!rtk_phy->debug_dir) { + dev_err(rtk_phy->dev, "%s Error debug_dir is NULL", __func__); + return; + } + + if (!debugfs_create_file("parameter", 0444, rtk_phy->debug_dir, rtk_phy, + &rtk_usb2_parameter_fops)) + goto file_error; + + set_parameter_dir = debugfs_create_dir("set_parameter", + rtk_phy->debug_dir); + if (set_parameter_dir) { + int index, ret; + + for (index = 0; index < rtk_phy->phyN; index++) { + struct dentry *phy_dir; + struct phy_data *phy_data; + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + phy_dir = debugfs_create_dir(name, set_parameter_dir); + if (!phy_dir) { + dev_err(rtk_phy->dev, + "%s Error create folder %s fail\n", + name, __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + "page0", phy_data->page0_size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files for page0 fail\n", + __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + "page1", phy_data->page1_size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files for page1 fail\n", + __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + "page2", phy_data->page2_size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files for page2 fail\n", + __func__); + goto file_error; + } + } + } + + if (!debugfs_create_file("toggle", 0644, + rtk_phy->debug_dir, rtk_phy, &rtk_usb2_toggle_fops)) + goto file_error; + + return; + +file_error: + debugfs_remove_recursive(rtk_phy->debug_dir); +} + +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) +{ + debugfs_remove_recursive(rtk_phy->debug_dir); +} +#else +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) { } +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) { } +#endif /* CONFIG_DEBUG_FS */ + +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, + struct phy_data *phy_data, int index) +{ + u8 value = 0; + struct nvmem_cell *cell; + struct soc_device_attribute rtk_soc_groot[] = { + { .family = "Realtek Groot",}, + { /* empty */ } + }; + struct soc_device_attribute rtk_soc_hank[] = { + { .family = "Realtek Hank",}, + { /* empty */ } + }; + struct soc_device_attribute rtk_soc_efuse_v1[] = { + { .family = "Realtek Phoenix",}, + { .family = "Realtek Kylin",}, + { .family = "Realtek Hercules",}, + { .family = "Realtek Thor",}, + { .family = "Realtek Hank",}, + { .family = "Realtek Groot",}, + { .family = "Realtek Stark",}, + { .family = "Realtek Parker",}, + { /* empty */ } + }; + struct soc_device_attribute rtk_soc_dis_level_at_page0[] = { + { .family = "Realtek Phoenix",}, + { .family = "Realtek Kylin",}, + { .family = "Realtek Hercules",}, + { .family = "Realtek Thor",}, + { .family = "Realtek Hank",}, + { .family = "Realtek Groot",}, + { /* empty */ } + }; + + if (soc_device_match(rtk_soc_efuse_v1)) { + dev_dbg(rtk_phy->dev, "Use efuse v1 to updated phy parameter\n"); + phy_data->check_efuse_version = CHECK_EFUSE_V1; + } else { + dev_dbg(rtk_phy->dev, "Use efuse v2 to updated phy parameter\n"); + phy_data->check_efuse_version = CHECK_EFUSE_V2; + } + + if (soc_device_match(rtk_soc_dis_level_at_page0)) { + dev_dbg(rtk_phy->dev, "Use usb_dc_dis_at_page0\\n"); + phy_data->usb_dc_dis_at_page0 = true; + + phy_data->usb_dc_cal_mask = 0xf; + phy_data->usb_dc_dis_mask = 0xf; + + phy_data->disconnect_driving_updated = 0xf; + } else { + dev_dbg(rtk_phy->dev, "No use usb_dc_dis_at_page0\n"); + phy_data->usb_dc_dis_at_page0 = false; + + phy_data->usb_dc_cal_mask = 0x1f; + phy_data->usb_dc_dis_mask = 0xf; + + phy_data->disconnect_driving_updated = 0x8; + } + + phy_data->efuse_usb_dc_cal_rate = EFUS_USB_DC_CAL_RATE; + phy_data->efuse_usb_dc_dis_rate = EFUS_USB_DC_DIS_RATE; + + if (soc_device_match(rtk_soc_hank)) + phy_data->efuse_usb_dc_cal_rate = 1; + + if (!phy_data->check_efuse) + goto out; + + /* Read efuse for usb dc cal */ + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-cal"); + if (IS_ERR(cell)) { + dev_warn(rtk_phy->dev, "%s failed to get usb-dc-cal: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + + value = buf[0] & phy_data->usb_dc_cal_mask; + + dev_dbg(rtk_phy->dev, + "buf=0x%x buf_size=%d value=0x%x\n", + buf[0], (int)buf_size, value); + + kfree(buf); + nvmem_cell_put(cell); + } + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + int rate = phy_data->efuse_usb_dc_cal_rate; + + if (value <= EFUS_USB_DC_CAL_MAX) + phy_data->efuse_usb_dc_cal = (int8_t)(value * rate); + else + phy_data->efuse_usb_dc_cal = -(int8_t)( + (EFUS_USB_DC_CAL_MAX & value) * rate); + + if (soc_device_match(rtk_soc_groot)) { + dev_info(rtk_phy->dev, "For groot IC we need a workaround to adjust efuse_usb_dc_cal\n"); + + /* We don't multiple dc_cal_rate=2 for positive dc cal compensate */ + if (value <= EFUS_USB_DC_CAL_MAX) + phy_data->efuse_usb_dc_cal = (int8_t)(value); + + /* We set max dc cal compensate is 0x8 if otp is 0x7 */ + if (value == 0x7) + phy_data->efuse_usb_dc_cal = (int8_t)(value + 1); + } + } else { /* for CHECK_EFUSE_V2 */ + phy_data->efuse_usb_dc_cal = value & phy_data->usb_dc_cal_mask; + } + + dev_dbg(rtk_phy->dev, "Get Efuse usb_dc_cal=%d for index=%d value=%x\n", + phy_data->efuse_usb_dc_cal, index, value); + + /* Read efuse for usb dc disconnect level */ + value = 0; + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-dis"); + if (IS_ERR(cell)) { + dev_warn(rtk_phy->dev, "%s failed to get usb-dc-dis: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + + value = buf[0] & phy_data->usb_dc_dis_mask; + + dev_dbg(rtk_phy->dev, + "buf=0x%x buf_size=%d value=0x%x\n", + buf[0], (int)buf_size, value); + + kfree(buf); + nvmem_cell_put(cell); + } + + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { + int rate = phy_data->efuse_usb_dc_dis_rate; + + if (value <= EFUS_USB_DC_DIS_MAX) + phy_data->efuse_usb_dc_dis = (int8_t)(value * rate); + else + phy_data->efuse_usb_dc_dis = -(int8_t)( + (EFUS_USB_DC_DIS_MAX & value) * rate); + } else { /* for CHECK_EFUSE_V2 */ + phy_data->efuse_usb_dc_dis = value & phy_data->usb_dc_dis_mask; + } + + dev_dbg(rtk_phy->dev, "Get Efuse usb_dc_dis=%d for index=%d value=%x\n", + phy_data->efuse_usb_dc_dis, index, value); + +out: + return 0; +} + +/* Get default phy parameter for update by efuse or ldo_page0_e4_compensate */ +static int __get_default_phy_parameter_for_updated( + struct rtk_usb_phy *rtk_phy, int index) +{ + int i; + struct reg_addr *regAddr; + struct phy_data *phy_data; + struct phy_parameter *phy_page_setting; + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + /* Get PAGE0_0xE4 default value */ + if (phy_data->efuse_usb_dc_cal || phy_data->ldo_page0_e4_compensate || + (phy_data->efuse_usb_dc_dis && phy_data->usb_dc_dis_at_page0)) { + phy_page_setting = phy_data->page0; + rtk_usb_phy_set_page(regAddr, 0); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); + if (i < phy_data->page0_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + } + } + + /* Get PAGE1_0xE2 default value */ + if (phy_data->efuse_usb_dc_dis && !phy_data->usb_dc_dis_at_page0) { + phy_page_setting = phy_data->page1; + rtk_usb_phy_set_page(regAddr, 1); + + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE2); + if (i < phy_data->page1_size) { + u8 addr = (phy_page_setting + i)->addr; + u8 data = (phy_page_setting + i)->data; + + if (!addr) { + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); + data = rtk_usb_phy_read(regAddr, addr); + + (phy_page_setting + i)->addr = addr; + (phy_page_setting + i)->data = data; + dev_dbg(rtk_phy->dev, + "Get default page1 addr %x value %x\n", + (phy_page_setting + i)->addr, + (phy_page_setting + i)->data); + } + } + } + + return 0; +} + +static int __get_phy_parameter_v1(struct device *dev, struct phy_data *phy_data, + struct device_node *sub_node) +{ + int phy_data_page0_size, phy_data_page1_size; + int phy_data_page2_size; + char tmp_addr[MAX_PHY_DATA_SIZE]; + char tmp_data[MAX_PHY_DATA_SIZE]; + int i, chip_revision, revision, ret = 0; + + chip_revision = __get_chip_revision(); + + dev_dbg(dev, "%s: Chip revision is %x\n", __func__, chip_revision); + + ret = of_property_read_u32_index(sub_node, + "realtek,phy-data-page0-size", 0, &phy_data_page0_size); + if (ret) + goto err; + + ret = of_property_read_u32_index(sub_node, + "realtek,phy-data-page1-size", 0, &phy_data_page1_size); + if (ret) + goto err; + + dev_dbg(dev, "%s %d phy_data_page0_size=%d, phy_data_page1_size=%d\n", + __func__, __LINE__, + phy_data_page0_size, phy_data_page1_size); + + if (phy_data_page0_size > MAX_PHY_DATA_SIZE || + phy_data_page1_size > MAX_PHY_DATA_SIZE) { + dev_err(dev, "%s phy_data size > MAX_PHY_DATA_SIZE\n", + __func__); + goto err; + } + + ret = of_property_read_u32_index(sub_node, + "realtek,phy-data-page2-size", 0, &phy_data_page2_size); + if (ret) + phy_data_page2_size = 0; + dev_dbg(dev, "%s %d phy_data_page2_size=%d\n", + __func__, __LINE__, + phy_data_page2_size); + + if (phy_data_page2_size > MAX_PHY_DATA_SIZE) { + dev_err(dev, "%s page2 phy_data size=%d > MAX_PHY_DATA_SIZE\n", + __func__, phy_data_page2_size); + goto err; + } + + phy_data->page0_size = phy_data_page0_size; + phy_data->page0 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * + phy_data_page0_size, + GFP_KERNEL); + if (!phy_data->page0) { + ret = -ENOMEM; + goto err; + } + + phy_data->page1_size = phy_data_page1_size; + phy_data->page1 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * + phy_data_page1_size, + GFP_KERNEL); + if (!phy_data->page1) { + ret = -ENOMEM; + goto err; + } + + phy_data->page2_size = phy_data_page2_size; + if (phy_data->page2_size > 0) { + phy_data->page2 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * + phy_data->page2_size, + GFP_KERNEL); + if (!phy_data->page2) { + ret = -ENOMEM; + goto err; + } + } + + ret = of_property_read_u8_array(sub_node, "realtek,phy-data-page0-addr", + tmp_addr, phy_data_page0_size); + if (ret) + goto err; + + revision = chip_revision; + while (revision >= DEFAULT_CHIP_REVISION) { + char phy_data_revision[32] = {0}; + + snprintf(phy_data_revision, 27, "realtek,phy-data-page0-%X", revision); + + ret = of_property_read_u8_array(sub_node, phy_data_revision, + tmp_data, phy_data_page0_size); + if (!ret) { + dev_dbg(dev, "%s load %s parameter\n", + __func__, phy_data_revision); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + } + + /* For old device tree */ + if (ret) { + ret = of_property_read_u8_array(sub_node, "realtek,phy-data-page0-data", + tmp_data, phy_data_page0_size); + if (ret) + goto err; + else + dev_info(dev, "%s load page0 parameter\n", + __func__); + } + + for (i = 0; i < phy_data_page0_size; i++) { + struct phy_parameter *phy_data_page0 = + (phy_data->page0 + i); + + phy_data_page0->addr = tmp_addr[i]; + phy_data_page0->data = tmp_data[i]; + } + + ret = of_property_read_u8_array(sub_node, "realtek,phy-data-page1-addr", + tmp_addr, phy_data_page1_size); + if (ret) + goto err; + + revision = chip_revision; + while (revision >= DEFAULT_CHIP_REVISION) { + char phy_data_revision[32] = {0}; + + snprintf(phy_data_revision, 27, "realtek,phy-data-page1-%X", revision); + + ret = of_property_read_u8_array(sub_node, phy_data_revision, + tmp_data, phy_data_page1_size); + if (!ret) { + dev_dbg(dev, "%s load %s parameter\n", + __func__, phy_data_revision); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + } + + /* For old device tree */ + if (ret) { + ret = of_property_read_u8_array(sub_node, "realtek,phy-data-page1-data", + tmp_data, phy_data_page1_size); + if (ret) + goto err; + else + dev_info(dev, "%s load page1 parameter\n", + __func__); + } + + for (i = 0; i < phy_data_page1_size; i++) { + struct phy_parameter *phy_data_page1 = + (phy_data->page1 + i); + + phy_data_page1->addr = tmp_addr[i]; + phy_data_page1->data = tmp_data[i]; + } + + if (phy_data->page2_size > 0) { + ret = of_property_read_u8_array(sub_node, + "realtek,phy-data-page2-addr", + tmp_addr, phy_data->page2_size); + if (ret) + goto err; + + revision = chip_revision; + while (revision >= DEFAULT_CHIP_REVISION) { + char phy_data_revision[32] = {0}; + + snprintf(phy_data_revision, 27, "realtek,phy-data-page2-%X", + revision); + + ret = of_property_read_u8_array(sub_node, + phy_data_revision, + tmp_data, phy_data_page2_size); + if (!ret) { + dev_dbg(dev, "%s load %s parameter\n", + __func__, phy_data_revision); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + } + + /* For old device tree */ + if (ret) { + ret = of_property_read_u8_array(sub_node, + "realtek,phy-data-page2-data", + tmp_data, phy_data->page2_size); + if (ret) + goto err; + else + dev_info(dev, "%s load page2 parameter\n", + __func__); + } + for (i = 0; i < phy_data->page2_size; i++) { + struct phy_parameter *phy_data_page2 = + (phy_data->page2 + i); + phy_data_page2->addr = tmp_addr[i]; + phy_data_page2->data = tmp_data[i]; + } + } + +err: + return ret; +} + +static int __get_phy_parameter_v2(struct device *dev, struct phy_data *phy_data, + struct device_node *sub_node) +{ + u32 page_size = 0; + u32 num_cells = 2; /*< addr value > */ + u32 data_size; + int i, offset, chip_revision, revision, ret = 0; + char phy_data_revision[32] = {0}; + + chip_revision = __get_chip_revision(); + + /* Page 0 */ + ret = of_property_read_u32_index(sub_node, "realtek,page0-size", 0, &page_size); + if (ret) { + dev_err(dev, "%s No page0_size\n", __func__); + goto parse_page1; + } + + phy_data->page0_size = page_size; + phy_data->page0 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * page_size, GFP_KERNEL); + if (!phy_data->page0) { + ret = -ENOMEM; + goto out; + } + + revision = chip_revision; + while (revision >= DEFAULT_CHIP_REVISION) { + snprintf(phy_data_revision, 23, "realtek,page0-data-%X", revision); + + if (of_get_property(sub_node, phy_data_revision, &data_size)) { + dev_dbg(dev, "%s load %s parameter (data_size=%d)\n", + __func__, phy_data_revision, data_size); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + + data_size = 0; + ret = 0; + } + data_size = data_size / (sizeof(u32) * num_cells); + + for (i = 0; i < data_size; i++) { + struct phy_parameter *phy_data_page; + u32 addr, data; + int index; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, data); + break; + } + + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_data_page = (phy_data->page0 + index); + phy_data_page->addr = (char)addr; + phy_data_page->data = (char)data; + + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", + phy_data_revision, index, + phy_data_page->addr, phy_data_page->data); + } + +parse_page1: + /* Page 1 */ + ret = of_property_read_u32_index(sub_node, "realtek,page1-size", 0, &page_size); + if (ret) { + dev_err(dev, "%s No page0_size\n", __func__); + goto parse_page2; + } + + phy_data->page1_size = page_size; + phy_data->page1 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * page_size, GFP_KERNEL); + if (!phy_data->page1) { + ret = -ENOMEM; + goto out; + } + + revision = chip_revision; + while (revision >= DEFAULT_CHIP_REVISION) { + snprintf(phy_data_revision, 23, "realtek,page1-data_%X", revision); + + if (of_get_property(sub_node, phy_data_revision, &data_size)) { + dev_dbg(dev, "%s load %s parameter (data_size=%d)\n", + __func__, phy_data_revision, data_size); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + + data_size = 0; + ret = 0; + } + data_size = data_size / (sizeof(u32) * num_cells); + + for (i = 0; i < data_size; i++) { + struct phy_parameter *phy_data_page; + u32 addr, data; + int index; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, data); + break; + } + + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_data_page = phy_data->page1 + index; + phy_data_page->addr = (char)addr; + phy_data_page->data = (char)data; + + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", + phy_data_revision, index, + phy_data_page->addr, phy_data_page->data); + } + +parse_page2: + /* Page 2 */ + ret = of_property_read_u32_index(sub_node, "realtek,page2-size", 0, &page_size); + if (ret) { + dev_dbg(dev, "%s No page2_size\n", __func__); + goto out; + } + + phy_data->page2_size = page_size; + phy_data->page2 = devm_kzalloc(dev, + sizeof(struct phy_parameter) * page_size, GFP_KERNEL); + if (!phy_data->page2) { + ret = -ENOMEM; + goto out; + } + + revision = chip_revision; + while (revision >= DEFAULT_CHIP_REVISION) { + snprintf(phy_data_revision, 23, "realtek,page2-data-%X", revision); + + if (of_get_property(sub_node, phy_data_revision, &data_size)) { + dev_dbg(dev, "%s load %s parameter (data_size=%d)\n", + __func__, phy_data_revision, data_size); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + + data_size = 0; + ret = 0; + } + data_size = data_size / (sizeof(u32) * num_cells); + + for (i = 0; i < data_size; i++) { + struct phy_parameter *phy_data_page; + u32 addr, data; + int index; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, data); + break; + } + + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); + phy_data_page = phy_data->page2 + index; + phy_data_page->addr = (char)addr; + phy_data_page->data = (char)data; + + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", + phy_data_revision, index, + phy_data_page->addr, phy_data_page->data); + } + +out: + return ret; +} + +static int __get_phy_parameter(struct rtk_usb_phy *rtk_phy, int index) +{ + struct device *dev = rtk_phy->dev; + struct reg_addr *addr = + &((struct reg_addr *)rtk_phy->reg_addr)[index]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[index]; + char phy_name[5], phy_name_v2[10]; + struct device_node *sub_node; + int ret = 0; + + addr->reg_wrap_vstatus = of_iomap(dev->of_node, 0); + addr->reg_gusb2phyacc0 = of_iomap(dev->of_node, index + 1); + addr->vstatus_index = index; + dev_dbg(dev, "%s %d #%d reg_wrap_vstatus=%p\n", + __func__, __LINE__, + index, addr->reg_wrap_vstatus); + dev_dbg(dev, "%s %d #%d reg_gusb2phyacc0=%p\n", + __func__, __LINE__, + index, addr->reg_gusb2phyacc0); + + snprintf(phy_name, 5, "phy%d", index); + + sub_node = of_get_child_by_name(dev->of_node, phy_name); + if (sub_node) { + dev_dbg(dev, "%s %d: #%d Get phy data v1 sub_node for %s\n", + __func__, __LINE__, index, phy_name); + ret = __get_phy_parameter_v1(dev, phy_data, sub_node); + if (ret) + goto err; + } else { + snprintf(phy_name_v2, 10, "phy%d_data", index); + sub_node = of_get_child_by_name(dev->of_node, phy_name_v2); + if (sub_node) { + dev_dbg(dev, "%s %d: #%d Get phy data v2 sub_node for %s\n", + __func__, __LINE__, index, phy_name_v2); + ret = __get_phy_parameter_v2(dev, phy_data, sub_node); + if (ret) + goto err; + } + } + + if (!sub_node) + goto err; + + if (of_property_read_bool(sub_node, "realtek,do-toggle")) + phy_data->do_toggle = true; + else + phy_data->do_toggle = false; + + if (of_property_read_bool(sub_node, "realtek,do-toggle-driving")) + phy_data->do_toggle_driving = true; + else + phy_data->do_toggle_driving = false; + + if (of_property_read_bool(sub_node, "realtek,check-efuse")) + phy_data->check_efuse = true; + else + phy_data->check_efuse = false; + + if (of_property_read_bool(sub_node, "realtek,use-default-parameter")) + phy_data->use_default_parameter = true; + else + phy_data->use_default_parameter = false; + + if (of_property_read_bool(sub_node, + "realtek,is-double-sensitivity-mode")) + phy_data->is_double_sensitivity_mode = true; + else + phy_data->is_double_sensitivity_mode = false; + + if (of_property_read_bool(sub_node, + "realtek,ldo-force-enable")) + phy_data->ldo_force_enable = true; + else + phy_data->ldo_force_enable = false; + + if (of_property_read_s32(sub_node, + "realtek,ldo-page0-e4-compensate", &phy_data->ldo_page0_e4_compensate)) + phy_data->ldo_page0_e4_compensate = 0; + + if (of_property_read_s32(sub_node, + "realtek,page0-e4-compensate", &phy_data->page0_e4_compensate)) + phy_data->page0_e4_compensate = 0; + + __get_phy_parameter_by_efuse(rtk_phy, phy_data, index); + + __get_default_phy_parameter_for_updated(rtk_phy, index); +err: + return ret; +} + +static int rtk_usb2phy_probe(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy; + struct device *dev = &pdev->dev; + int index, ret = 0; + int port_index, phyN; + + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); + if (!rtk_phy) + return -ENOMEM; + + rtk_phy->dev = &pdev->dev; + rtk_phy->phy.dev = rtk_phy->dev; + rtk_phy->phy.label = RTK_USB2PHY_NAME; + rtk_phy->phy.init = rtk_usb_phy_init; + rtk_phy->phy.shutdown = rtk_usb_phy_shutdown; + rtk_phy->phy.notify_port_status = rtk_usb_phy_notify_port_status; + + if (!dev->of_node) { + dev_err(dev, "%s %d No device node\n", __func__, __LINE__); + goto err; + } + + rtk_phy->usb_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "realtek,usb"); + if (IS_ERR(rtk_phy->usb_regs)) { + dev_info(dev, "%s: DTS no support usb regs syscon\n", __func__); + rtk_phy->usb_regs = NULL; + } + + rtk_phy->mac_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "realtek,mac"); + if (IS_ERR(rtk_phy->mac_regs)) { + dev_info(dev, "%s: DTS no support mac regs syscon\n", __func__); + rtk_phy->mac_regs = NULL; + } + + rtk_phy->usb_ctrl_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "realtek,usb_ctrl"); + if (IS_ERR(rtk_phy->usb_ctrl_regs)) { + dev_info(dev, "%s: DTS no support usb_ctrl regs syscon\n", __func__); + rtk_phy->usb_ctrl_regs = NULL; + } + + ret = of_property_read_u32_index(dev->of_node, "realtek,port-index", 0, + &port_index); + if (ret) + port_index = -1; + + ret = of_property_read_u32_index(dev->of_node, "realtek,phyN", 0, + &phyN); + if (ret) { + dev_err(dev, "%s get phyN fail (ret=%d)\n", __func__, ret); + goto err; + } + + dev_dbg(dev, "%s port_index=%d phyN=%d\n", __func__, port_index, phyN); + + rtk_phy->port_index = port_index; + rtk_phy->phyN = phyN; + rtk_phy->reg_addr = devm_kzalloc(dev, + sizeof(struct reg_addr) * phyN, GFP_KERNEL); + if (!rtk_phy->reg_addr) + return -ENOMEM; + + rtk_phy->phy_data = devm_kzalloc(dev, + sizeof(struct phy_data) * phyN, GFP_KERNEL); + if (!rtk_phy->phy_data) + return -ENOMEM; + + for (index = 0; index < phyN; index++) { + ret = __get_phy_parameter(rtk_phy, index); + if (ret) { + dev_err(dev, "%s: __get_phy_parameter fail ret=%d\n", + __func__, ret); + goto err; + } + } + + platform_set_drvdata(pdev, rtk_phy); + + ret = usb_add_phy_dev(&rtk_phy->phy); + if (ret) + goto err; + + create_debug_files(rtk_phy); + +err: + dev_dbg(dev, "Probe RTK USB 2.0 PHY (ret=%d)\n", ret); + + return ret; +} + +static int rtk_usb2phy_remove(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy = platform_get_drvdata(pdev); + + remove_debug_files(rtk_phy); + + usb_remove_phy(&rtk_phy->phy); + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id usbphy_rtk_dt_match[] = { + { .compatible = "realtek,usb2phy", }, + { .compatible = "realtek,rtd-usb2phy", }, + { .compatible = "realtek,rtd1295-usb2phy", }, + { .compatible = "realtek,rtd1395-usb2phy", }, + { .compatible = "realtek,rtd1619-usb2phy", }, + { .compatible = "realtek,rtd1319-usb2phy", }, + { .compatible = "realtek,rtd1619b-usb2phy", }, + { .compatible = "realtek,rtd1312c-usb2phy", }, + { .compatible = "realtek,rtd1319d-usb2phy", }, + { .compatible = "realtek,rtd1315e-usb2phy", }, + {}, +}; +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); +#endif + +static struct platform_driver rtk_usb2phy_driver = { + .probe = rtk_usb2phy_probe, + .remove = rtk_usb2phy_remove, + .driver = { + .name = RTK_USB2PHY_NAME, + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(usbphy_rtk_dt_match), + }, +}; + +module_platform_driver(rtk_usb2phy_driver); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" RTK_USB2PHY_NAME); +MODULE_AUTHOR("Realtek Semiconductor Corporation"); +MODULE_DESCRIPTION("RTK usb 2.0 phy driver"); diff --git a/drivers/usb/phy/phy-rtk-usb3.c b/drivers/usb/phy/phy-rtk-usb3.c new file mode 100644 index 000000000000..dd669fd75ee6 --- /dev/null +++ b/drivers/usb/phy/phy-rtk-usb3.c @@ -0,0 +1,1165 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * phy-rtk-usb3.c RTK usb3.0 phy driver + * + * copyright (c) 2023 realtek semiconductor corporation + * + */ + +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_address.h> +#include <linux/uaccess.h> +#include <linux/debugfs.h> +#include <linux/nvmem-consumer.h> +#include <linux/regmap.h> +#include <linux/sys_soc.h> +#include <linux/mfd/syscon.h> +#include <linux/usb.h> +#include <linux/usb/hcd.h> +#include <linux/usb/phy.h> + +#include "phy-rtk-usb.h" + +#define RTK_USB3PHY_NAME "rtk-usb3phy" + +#define USB_MDIO_CTRL_PHY_BUSY BIT(7) +#define USB_MDIO_CTRL_PHY_WRITE BIT(0) +#define USB_MDIO_CTRL_PHY_ADDR_SHIFT 8 +#define USB_MDIO_CTRL_PHY_DATA_SHIFT 16 + +#define PHY_ADDR_0x09 0x09 +#define PHY_ADDR_0x0B 0x0B +#define PHY_ADDR_0x0D 0x0D +#define PHY_ADDR_0x10 0x10 +#define PHY_ADDR_0x1F 0x1F +#define PHY_ADDR_0x20 0x20 +#define PHY_ADDR_0x30 0x30 + +#define REG_0x0B_RX_OFFSET_RANGE_MASK 0xC +#define REG_0x0D_RX_DEBUG_TEST_EN BIT(6) +#define REG_0x10_DEBUG_MODE_SETTING 0x3C0 +#define REG_0x10_DEBUG_MODE_SETTING_MASK 0x3F8 +#define REG_0x1F_RX_OFFSET_CODE_MASK 0x1E + +#define USB_U3_TX_LFPS_SWING_TRIM_SHIFT 4 +#define USB_U3_TX_LFPS_SWING_TRIM_MASK 0xF + +#define PHY_ADDR_MAP_ARRAY_INDEX(addr) (addr) +#define ARRAY_INDEX_MAP_PHY_ADDR(index) (index) + +#define WRAP_CTR_reg 0x0 +#define PIPE3_POWER_DOWN_SEL BIT(10) + +struct reg_addr { + void __iomem *reg_mdio_ctl; +}; + +struct phy_parameter { + u8 addr; + u16 data; +}; + +struct phy_data { + int size; + struct phy_parameter *parameter; + + bool check_efuse; + u8 efuse_usb_u3_tx_lfps_swing_trim; + bool do_toggle; + bool do_toggle_once; + bool use_default_parameter; + bool check_rx_front_end_offset; +}; + +static int rtk_usb_phy3_wait_vbusy(struct reg_addr *regAddr) +{ + return utmi_wait_register(regAddr->reg_mdio_ctl, USB_MDIO_CTRL_PHY_BUSY, 0); +} + +static u16 rtk_usb_phy_read(struct reg_addr *regAddr, char addr) +{ + unsigned int regVal; + u32 value; + + regVal = (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT); + + writel(regVal, regAddr->reg_mdio_ctl); + + rtk_usb_phy3_wait_vbusy(regAddr); + + value = readl(regAddr->reg_mdio_ctl); + value = value >> USB_MDIO_CTRL_PHY_DATA_SHIFT; + + return (u16)value; +} + +static int rtk_usb_phy_write(struct reg_addr *regAddr, char addr, u16 data) +{ + unsigned int regVal; + + regVal = USB_MDIO_CTRL_PHY_WRITE | + (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT) | + (data << USB_MDIO_CTRL_PHY_DATA_SHIFT); + + writel(regVal, regAddr->reg_mdio_ctl); + + rtk_usb_phy3_wait_vbusy(regAddr); + + return 0; +} + +static void do_rtk_usb3_phy_toggle(struct rtk_usb_phy *rtk_phy, + int index, bool isConnect); + +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int phy_index) +{ + struct reg_addr *regAddr = + &((struct reg_addr *)rtk_phy->reg_addr)[phy_index]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[phy_index]; + int index = 0; + struct phy_parameter *phy_parameter = phy_data->parameter; + + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, phy_index); + + if (phy_data->use_default_parameter) { + dev_info(rtk_phy->dev, "%s phy#%d use default parameter\n", + __func__, phy_index); + goto do_toggle; + } + + for (index = 0; index < phy_data->size; index++) { + u8 addr = (phy_parameter + index)->addr; + u16 data = (phy_parameter + index)->data; + + if (addr == 0xFF) + continue; + + if (addr == PHY_ADDR_0x20) { + u8 efuse_val = phy_data->efuse_usb_u3_tx_lfps_swing_trim; + u16 val_mask = USB_U3_TX_LFPS_SWING_TRIM_MASK; + int val_shift = USB_U3_TX_LFPS_SWING_TRIM_SHIFT; + + if (efuse_val) { + data &= ~(val_mask << val_shift); + data |= ((efuse_val & val_mask) << val_shift); + } + } + + rtk_usb_phy_write(regAddr, addr, data); + } + + for (index = 0; index < phy_data->size; index++) { + u8 addr = (phy_parameter + index)->addr; + u16 data = (phy_parameter + index)->data; + + if (addr == 0xFF) + continue; + + dev_dbg(rtk_phy->dev, "[USB3_PHY], addr = 0x%02x, data = 0x%04x ==> read value = 0x%04x\n", + addr, data, + rtk_usb_phy_read(regAddr, addr)); + } + +do_toggle: + if (phy_data->do_toggle_once) + phy_data->do_toggle = true; + + do_rtk_usb3_phy_toggle(rtk_phy, phy_index, false); + + if (phy_data->do_toggle_once) { + u16 check_value = 0; + int count = 10; + u16 value_0x0D, value_0x10; + + /* Enable Debug mode by set 0x0D and 0x10 */ + value_0x0D = rtk_usb_phy_read(regAddr, PHY_ADDR_0x0D); + value_0x10 = rtk_usb_phy_read(regAddr, PHY_ADDR_0x10); + + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0D, + value_0x0D | REG_0x0D_RX_DEBUG_TEST_EN); + rtk_usb_phy_write(regAddr, PHY_ADDR_0x10, + (value_0x10 & ~REG_0x10_DEBUG_MODE_SETTING_MASK) | + REG_0x10_DEBUG_MODE_SETTING); + + check_value = rtk_usb_phy_read(regAddr, PHY_ADDR_0x30); + + while (!(check_value & BIT(15))) { + check_value = rtk_usb_phy_read(regAddr, PHY_ADDR_0x30); + mdelay(1); + if (count-- < 0) + break; + } + + if (!(check_value & BIT(15))) + dev_info(rtk_phy->dev, "toggle fail addr=0x%02x, data=0x%04x\n", + PHY_ADDR_0x30, check_value); + else + dev_info(rtk_phy->dev, "toggle okay addr=0x%02x, data=0x%04x\n", + PHY_ADDR_0x30, check_value); + + /* Disable Debug mode by set 0x0D and 0x10 to default*/ + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0D, value_0x0D); + rtk_usb_phy_write(regAddr, PHY_ADDR_0x10, value_0x10); + + phy_data->do_toggle = false; + } + + + if (phy_data->check_rx_front_end_offset) { + u16 rx_offset_code, rx_offset_range; + bool do_update = false; + + rx_offset_code = rtk_usb_phy_read(regAddr, PHY_ADDR_0x1F); + if (((rx_offset_code & REG_0x1F_RX_OFFSET_CODE_MASK) == 0x0) || + ((rx_offset_code & REG_0x1F_RX_OFFSET_CODE_MASK) == + REG_0x1F_RX_OFFSET_CODE_MASK)) + do_update = true; + + rx_offset_range = rtk_usb_phy_read(regAddr, PHY_ADDR_0x0B); + if (((rx_offset_range & REG_0x0B_RX_OFFSET_RANGE_MASK) == + REG_0x0B_RX_OFFSET_RANGE_MASK) && do_update) { + dev_warn(rtk_phy->dev, "Don't update rx_offset_range (rx_offset_code=0x%x, rx_offset_range=0x%x)\n", + rx_offset_code, rx_offset_range); + do_update = false; + } + + if (do_update) { + u16 tmp1, tmp2; + + tmp1 = rx_offset_range & (~REG_0x0B_RX_OFFSET_RANGE_MASK); + tmp2 = rx_offset_range & REG_0x0B_RX_OFFSET_RANGE_MASK; + tmp2 += (1 << 2); + rx_offset_range = tmp1 | (tmp2 & REG_0x0B_RX_OFFSET_RANGE_MASK); + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0B, rx_offset_range); + goto do_toggle; + } + } + + return 0; +} + +static int rtk_usb_phy_init(struct usb_phy *phy) +{ + struct rtk_usb_phy *rtk_phy = container_of(phy, struct rtk_usb_phy, phy); + int ret = 0; + int i; + unsigned long phy_init_time = jiffies; + + if (!rtk_phy) { + pr_err("%s rtk_phy is NULL!\n", __func__); + return -ENODEV; + } + + dev_dbg(phy->dev, "Init RTK USB 3.0 PHY\n"); + for (i = 0; i < rtk_phy->phyN; i++) + ret = do_rtk_usb_phy_init(rtk_phy, i); + + dev_info(phy->dev, "Initialized RTK USB 3.0 PHY (take %dms)\n", + jiffies_to_msecs(jiffies - phy_init_time)); + return ret; +} + +static void rtk_usb_phyhutdown(struct usb_phy *phy) +{ + dev_dbg(phy->dev, "Shutdown RTK USB 3.0 PHY\n"); +} + +static void do_rtk_usb3_phy_toggle(struct rtk_usb_phy *rtk_phy, int i, + bool isConnect) +{ + struct reg_addr *regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[i]; + struct phy_data *phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + struct phy_parameter *phy_parameter; + size_t index; + + if (!rtk_phy) { + pr_err("%s rtk_phy is NULL!\n", __func__); + return; + } + + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[i]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + + if (!phy_data) { + dev_err(rtk_phy->dev, "%s phy_data is NULL!\n", __func__); + return; + } + + if (!phy_data->do_toggle) + return; + + /* Disable usb3 phy suspend form usb wrapper */ + if (rtk_phy->usb_regs) + regmap_update_bits(rtk_phy->usb_regs, WRAP_CTR_reg, + (unsigned int)PIPE3_POWER_DOWN_SEL, + (unsigned int)PIPE3_POWER_DOWN_SEL); + + phy_parameter = phy_data->parameter; + + index = PHY_ADDR_MAP_ARRAY_INDEX(PHY_ADDR_0x09); + + if (index < phy_data->size) { + u8 addr = (phy_parameter + index)->addr; + u16 data = (phy_parameter + index)->data; + + if (addr == 0xFF) { + addr = ARRAY_INDEX_MAP_PHY_ADDR(index); + data = rtk_usb_phy_read(regAddr, addr); + (phy_parameter + index)->addr = addr; + (phy_parameter + index)->data = data; + } + mdelay(1); + dev_info(rtk_phy->dev, + "%s ########## to toggle PHY addr 0x09 BIT(9)\n", + __func__); + rtk_usb_phy_write(regAddr, addr, data&(~BIT(9))); + mdelay(1); + rtk_usb_phy_write(regAddr, addr, data); + } + dev_info(rtk_phy->dev, "%s ########## PHY addr 0x1f = 0x%04x\n", + __func__, rtk_usb_phy_read(regAddr, PHY_ADDR_0x1F)); + + /* Enable usb3 phy suspend form usb wrapper, power control by mac */ + if (rtk_phy->usb_regs) + regmap_update_bits(rtk_phy->usb_regs, WRAP_CTR_reg, + (unsigned int)PIPE3_POWER_DOWN_SEL, + (unsigned int)(~PIPE3_POWER_DOWN_SEL)); +} + +static void rtk_usb3_phy_toggle(struct usb_phy *usb3_phy, bool isConnect, int port) +{ + int index = port; + struct rtk_usb_phy *rtk_phy = NULL; + + if (usb3_phy != NULL && usb3_phy->dev != NULL) + rtk_phy = dev_get_drvdata(usb3_phy->dev); + + if (rtk_phy == NULL) { + pr_err("%s ERROR! NO this device\n", __func__); + return; + } + + if (index > rtk_phy->phyN) { + pr_err("%s %d ERROR! port=%d > phyN=%d\n", + __func__, __LINE__, index, rtk_phy->phyN); + return; + } + + do_rtk_usb3_phy_toggle(rtk_phy, index, isConnect); +} + +static int rtk_usb_phy_notify_port_status(struct usb_phy *x, int port, + u16 portstatus, u16 portchange) +{ + bool isConnect = false; + + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", + __func__, port, (int)portstatus, (int)portchange); + if (portstatus & USB_PORT_STAT_CONNECTION) + isConnect = true; + + if (portchange & USB_PORT_STAT_C_CONNECTION) + rtk_usb3_phy_toggle(x, isConnect, port); + + return 0; +} + +#ifdef CONFIG_DEBUG_FS +static struct dentry *create_phy_debug_root(void) +{ + struct dentry *phy_debug_root; + + phy_debug_root = debugfs_lookup("phy", usb_debug_root); + if (!phy_debug_root) { + phy_debug_root = debugfs_create_dir("phy", usb_debug_root); + if (!phy_debug_root) + pr_err("%s Error phy_debug_root is NULL\n", __func__); + else + pr_debug("%s Create phy_debug_root folder\n", __func__); + } + + return phy_debug_root; +} + +static int rtk_usb3_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + int i, index; + + for (i = 0; i < rtk_phy->phyN; i++) { + struct reg_addr *regAddr = + &((struct reg_addr *)rtk_phy->reg_addr)[i]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[i]; + struct phy_parameter *phy_parameter; + + phy_parameter = phy_data->parameter; + + seq_printf(s, "[USB3_PHY] PHY %d\n", i); + + for (index = 0; index < phy_data->size; index++) { + u8 addr = ARRAY_INDEX_MAP_PHY_ADDR(index); + u16 data = (phy_parameter + index)->data; + + if ((phy_parameter + index)->addr == 0xFF) + seq_printf(s, "[USB3_PHY], addr = 0x%02x, data = none ==> read value = 0x%04x\n", + addr, + rtk_usb_phy_read(regAddr, addr)); + else + seq_printf(s, "[USB3_PHY], addr = 0x%02x, data = 0x%04x ==> read value = 0x%04x\n", + addr, data, + rtk_usb_phy_read(regAddr, addr)); + } + + seq_puts(s, "Property:\n"); + seq_printf(s, "check_efuse: %s\n", + phy_data->check_efuse?"Enable":"Disable"); + seq_printf(s, "efuse_usb_u3_tx_lfps_swing_trim: 0x%x\n", + (int)phy_data->efuse_usb_u3_tx_lfps_swing_trim); + seq_printf(s, "do_toggle: %s\n", + phy_data->do_toggle?"Enable":"Disable"); + seq_printf(s, "do_toggle_once: %s\n", + phy_data->do_toggle_once?"Enable":"Disable"); + seq_printf(s, "use_default_parameter: %s\n", + phy_data->use_default_parameter?"Enable":"Disable"); + } + return 0; +} + +static int rtk_usb3_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb3_parameter_show, inode->i_private); +} + +static const struct file_operations rtk_usb3_parameter_fops = { + .open = rtk_usb3_parameter_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int __get_parameter_at_page(struct seq_file *s, + struct rtk_usb_phy *rtk_phy, + struct phy_parameter *phy_parameter_array, + const char *phy_addr) +{ + struct phy_parameter *phy_parameter; + uint32_t addr; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + + i = PHY_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_array + i); + + if (phy_parameter->addr != 0xFF) + seq_printf(s, "Now Parameter addr 0x%02x = 0x%04x\n", + phy_parameter->addr, phy_parameter->data); + else + seq_printf(s, "Now Parameter addr 0x%02x is default\n", + addr); + + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%04x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + return 0; +} + +static int __set_parameter_at_page( + struct rtk_usb_phy *rtk_phy, + struct reg_addr *regAddr, struct phy_data *phy_data, + struct phy_parameter *phy_parameter_array, + const char *phy_addr, const char *phy_value) +{ + struct phy_parameter *phy_parameter; + uint32_t addr, value; + int i, ret; + + ret = kstrtouint(phy_addr, 16, &addr); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + ret = kstrtouint(phy_value, 16, &value); + if (ret < 0) { + pr_err("%s::kstrtouint() failed\n", __func__); + return -EINVAL; + } + + i = PHY_ADDR_MAP_ARRAY_INDEX(addr); + phy_parameter = (phy_parameter_array + i); + + if (phy_parameter->addr != 0xFF) { + phy_parameter->data = value; + } else { + phy_parameter->addr = addr; + phy_parameter->data = value; + } + + dev_info(rtk_phy->dev, "%s addr=0x%02x data=0x%04x\n", + __func__, phy_parameter->addr, phy_parameter->data); + + if (addr == PHY_ADDR_0x20) + dev_info(rtk_phy->dev, + "%s PHY_ADDR_0x20 NOT use efuse u3_tx_lfps_swing_trim value\n", + __func__); + + if (rtk_usb_phy_write(regAddr, addr, value)) + dev_err(rtk_phy->dev, + "[%s:%d] Error: addr=0x%02x value=0x%04x\n", + __func__, __LINE__, addr, value); + + return 0; +} + +static int rtk_usb3_set_parameter_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + const struct file *file = s->file; + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *phy_dir_name = p_dentry->d_iname; + int ret, index; + struct phy_data *phy_data; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s\n", + __func__, phy_dir_name, file_name); + return -EINVAL; + } + + ret = __get_parameter_at_page(s, rtk_phy, phy_data->parameter, file_name); + if (ret < 0) + return ret; + + seq_puts(s, "Set phy parameter by following command\n"); + seq_printf(s, "echo \"value\" > %s/%s\n", + phy_dir_name, file_name); + + return 0; +} + +static int rtk_usb3_set_parameter_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb3_set_parameter_show, inode->i_private); +} + +static ssize_t rtk_usb3_set_parameter_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + const char *file_name = file_dentry(file)->d_iname; + struct dentry *p_dentry = file_dentry(file)->d_parent; + const char *phy_dir_name = p_dentry->d_iname; + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + struct reg_addr *regAddr; + struct phy_data *phy_data; + int ret = 0; + char buffer[40] = {0}; + int index; + + if (copy_from_user(&buffer, ubuf, + min_t(size_t, sizeof(buffer) - 1, count))) + return -EFAULT; + + for (index = 0; index < rtk_phy->phyN; index++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + break; + } + } + if (!regAddr) { + dev_err(rtk_phy->dev, + "%s: No regAddr for %s/%s\n", + __func__, phy_dir_name, file_name); + return -EINVAL; + } + if (!phy_data) { + dev_err(rtk_phy->dev, + "%s: No phy_data for %s/%s\n", + __func__, phy_dir_name, file_name); + return -EINVAL; + } + + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, + phy_data->parameter, file_name, buffer); + if (ret < 0) + return ret; + + return count; +} + +static const struct file_operations rtk_usb3_set_parameter_fops = { + .open = rtk_usb3_set_parameter_open, + .write = rtk_usb3_set_parameter_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int rtk_usb3_toggle_show(struct seq_file *s, void *unused) +{ + struct rtk_usb_phy *rtk_phy = s->private; + struct phy_data *phy_data; + int i; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + seq_printf(s, "Now phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + seq_puts(s, "ehco 1 to enable toggle phy parameter.\n"); + + return 0; +} + +static int rtk_usb3_toggle_open(struct inode *inode, struct file *file) +{ + return single_open(file, rtk_usb3_toggle_show, inode->i_private); +} + +static ssize_t rtk_usb3_toggle_write(struct file *file, + const char __user *ubuf, size_t count, loff_t *ppos) +{ + struct seq_file *s = file->private_data; + struct rtk_usb_phy *rtk_phy = s->private; + char buf[32]; + struct phy_data *phy_data; + bool enable = false; + int i; + + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) + return -EFAULT; + + if (!strncmp(buf, "1", 1)) + enable = true; + + for (i = 0; i < rtk_phy->phyN; i++) { + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; + phy_data->do_toggle = enable; + dev_info(rtk_phy->dev, "Set phy#%d do_toggle is %s.\n", + i, phy_data->do_toggle?"Enable":"Disable"); + } + + return count; +} + +static const struct file_operations rtk_usb3_toggle_fops = { + .open = rtk_usb3_toggle_open, + .write = rtk_usb3_toggle_write, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +static int create_debug_set_parameter_files(struct rtk_usb_phy *rtk_phy, + struct dentry *phy_dir, size_t addr_size) +{ + int i; + + for (i = 0; i < addr_size; i++) { + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "%02x", ARRAY_INDEX_MAP_PHY_ADDR(i)); + + if (!debugfs_create_file(name, 0644, + phy_dir, rtk_phy, + &rtk_usb3_set_parameter_fops)) + dev_err(rtk_phy->dev, + "%s Error create file %s fail", + name, __func__); + } + + return 0; +} + +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) +{ + struct dentry *phy_debug_root = NULL; + struct dentry *set_parameter_dir = NULL; + + phy_debug_root = create_phy_debug_root(); + + if (!phy_debug_root) { + dev_err(rtk_phy->dev, "%s Error phy_debug_root is NULL", + __func__); + return; + } + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy->dev), + phy_debug_root); + if (!rtk_phy->debug_dir) { + dev_err(rtk_phy->dev, "%s Error debug_dir is NULL", __func__); + return; + } + + if (!debugfs_create_file("parameter", 0444, + rtk_phy->debug_dir, rtk_phy, + &rtk_usb3_parameter_fops)) + goto file_error; + + set_parameter_dir = debugfs_create_dir("set_parameter", + rtk_phy->debug_dir); + if (set_parameter_dir) { + int index, ret; + + for (index = 0; index < rtk_phy->phyN; index++) { + struct dentry *phy_dir; + struct phy_data *phy_data; + size_t sz = 30; + char name[30] = {0}; + + snprintf(name, sz, "phy%d", index); + + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; + + phy_dir = debugfs_create_dir(name, set_parameter_dir); + if (!phy_dir) { + dev_err(rtk_phy->dev, + "%s Error create folder %s fail\n", + name, __func__); + goto file_error; + } + + ret = create_debug_set_parameter_files(rtk_phy, phy_dir, + phy_data->size); + if (ret < 0) { + dev_err(rtk_phy->dev, + "%s Error create files fail\n", + __func__); + goto file_error; + } + } + } + + if (!debugfs_create_file("toggle", 0644, rtk_phy->debug_dir, rtk_phy, + &rtk_usb3_toggle_fops)) + goto file_error; + + return; + +file_error: + debugfs_remove_recursive(rtk_phy->debug_dir); +} + +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) +{ + debugfs_remove_recursive(rtk_phy->debug_dir); +} +#else +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) { } +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) { } +#endif /* CONFIG_DEBUG_FS */ + +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, + struct phy_data *phy_data, int index) +{ + u8 value = 0; + struct nvmem_cell *cell; + + if (!phy_data->check_efuse) + goto out; + + cell = nvmem_cell_get(rtk_phy->dev, "usb_u3_tx_lfps_swing_trim"); + if (IS_ERR(cell)) { + dev_warn(rtk_phy->dev, + "%s failed to get usb_u3_tx_lfps_swing_trim: %ld\n", + __func__, PTR_ERR(cell)); + } else { + unsigned char *buf; + size_t buf_size; + + buf = nvmem_cell_read(cell, &buf_size); + + value = buf[0] & USB_U3_TX_LFPS_SWING_TRIM_MASK; + + dev_dbg(rtk_phy->dev, + "phy index=%d buf=0x%x buf_size=%d value=0x%x\n", + index, buf[0], (int)buf_size, value); + kfree(buf); + nvmem_cell_put(cell); + } + + if ((value > 0) && (value < 0x8)) + phy_data->efuse_usb_u3_tx_lfps_swing_trim = 0x8; + else + phy_data->efuse_usb_u3_tx_lfps_swing_trim = (u8)value; + + dev_dbg(rtk_phy->dev, "Get Efuse usb_u3_tx_lfps_swing_trim=0x%x (value=0x%x)\n", + phy_data->efuse_usb_u3_tx_lfps_swing_trim, value); + +out: + return 0; +} + +static int __get_phy_parameter_v1(struct device *dev, struct phy_data *phy_data, + struct device_node *sub_node) +{ + struct phy_parameter *phy_parameter; + int revision, i, ret = 0; + u8 *addr; + u16 *data; + + ret = of_property_read_u32_index(sub_node, "realtek,phy-data-size", 0, + &phy_data->size); + if (ret) + goto out; + + phy_data->parameter = devm_kzalloc(dev, + sizeof(struct phy_parameter) * phy_data->size, + GFP_KERNEL); + if (!phy_data->parameter) + return -ENOMEM; + + addr = kcalloc(phy_data->size, sizeof(u8), GFP_KERNEL); + if (!addr) { + kfree(phy_data->parameter); + phy_data->parameter = NULL; + return -ENOMEM; + } + + data = kcalloc(phy_data->size, sizeof(u16), GFP_KERNEL); + if (!data) { + kfree(phy_data->parameter); + kfree(addr); + phy_data->parameter = NULL; + return -ENOMEM; + } + ret = of_property_read_u8_array(sub_node, "realtek,phy-data-addr", + addr, phy_data->size); + if (ret) + goto out; + + revision = __get_chip_revision(); + dev_dbg(dev, "%s: Chip revision is %x\n", __func__, revision); + + while (revision >= DEFAULT_CHIP_REVISION) { + char phy_data_revision[32] = {0}; + + snprintf(phy_data_revision, 21, "realtek,phy-data-%X", + revision); + ret = of_property_read_u16_array(sub_node, + phy_data_revision, + data, phy_data->size); + if (!ret) { + dev_dbg(dev, "%s load %s parameter\n", + __func__, phy_data_revision); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + } + + /* For old device tree */ + if (ret) { + ret = of_property_read_u16_array(sub_node, + "realtek,phy-data-revA", + data, phy_data->size); + if (ret) + goto out; + else + dev_info(dev, "%s load parameter\n", __func__); + } + + phy_parameter = phy_data->parameter; + + for (i = 0; i < phy_data->size; i++) { + (phy_parameter + i)->addr = *(addr + i); + (phy_parameter + i)->data = *(data + i); + dev_dbg(dev, "%s i=%d addr=0x%x data=0x%x\n", + __func__, i, (phy_parameter + i)->addr, + (phy_parameter + i)->data); + } + +out: + kfree(addr); + kfree(data); + + return ret; +} + +static int __get_phy_parameter_v2(struct device *dev, struct phy_data *phy_data, + struct device_node *sub_node) +{ + struct phy_parameter *phy_parameter; + int revision, i, ret = 0; + int data_size, num_cells = 2; + char phy_data_revision[32] = {0}; + + ret = of_property_read_u32_index(sub_node, "realtek,phy-data-size", 0, + &phy_data->size); + if (ret) + goto out; + + phy_data->parameter = devm_kzalloc(dev, + sizeof(struct phy_parameter) * phy_data->size, + GFP_KERNEL); + if (!phy_data->parameter) + return -ENOMEM; + + revision = __get_chip_revision(); + dev_dbg(dev, "%s: Chip revision is %x\n", __func__, revision); + + while (revision >= DEFAULT_CHIP_REVISION) { + snprintf(phy_data_revision, 21, "realtek,phy-data-%X", + revision); + if (of_get_property(sub_node, phy_data_revision, &data_size)) { + dev_dbg(dev, "%s load %s parameter (data_size=%d)\n", + __func__, phy_data_revision, data_size); + break; + } + revision--; + if ((revision & 0xFF) > 0xF) + revision = (revision & 0xF00) + 0xF; + + data_size = 0; + ret = 0; + } + + phy_parameter = phy_data->parameter; + for (i = 0; i < phy_data->size; i++) + (phy_parameter + i)->addr = 0xFF; + + data_size = data_size / (sizeof(u32) * num_cells); + for (i = 0; i < data_size; i++) { + struct phy_parameter *parameter; + u32 addr, data; + int offset, index; + + offset = i * num_cells; + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset, &addr); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, addr); + break; + } + + ret = of_property_read_u32_index(sub_node, phy_data_revision, + offset + 1, &data); + if (ret) { + dev_err(dev, "ERROR: To get %s i=%d addr=0x%x\n", + phy_data_revision, i, data); + break; + } + + index = PHY_ADDR_MAP_ARRAY_INDEX(addr); + parameter = (phy_parameter + index); + parameter->addr = (u8)addr; + parameter->data = (u16)data; + + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", + phy_data_revision, index, + parameter->addr, parameter->data); + } + +out: + return ret; +} + +static int rtk_usb3phy_probe(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy; + struct device *dev = &pdev->dev; + int i, ret, phyN; + + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); + if (!rtk_phy) + return -ENOMEM; + + rtk_phy->dev = &pdev->dev; + rtk_phy->phy.dev = rtk_phy->dev; + rtk_phy->phy.label = RTK_USB3PHY_NAME; + rtk_phy->phy.init = rtk_usb_phy_init; + rtk_phy->phy.shutdown = rtk_usb_phyhutdown; + rtk_phy->phy.notify_port_status = rtk_usb_phy_notify_port_status; + + if (!dev->of_node) { + dev_err(dev, "%s %d No device node\n", __func__, __LINE__); + ret = -ENODEV; + goto err; + } + + rtk_phy->usb_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "realtek,usb"); + if (IS_ERR(rtk_phy->usb_regs)) { + dev_info(dev, "%s: DTS no support usb regs syscon\n", __func__); + rtk_phy->usb_regs = NULL; + } + + rtk_phy->mac_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "realtek,mac"); + if (IS_ERR(rtk_phy->mac_regs)) { + dev_info(dev, "%s: DTS no support mac regs syscon\n", __func__); + rtk_phy->mac_regs = NULL; + } + + rtk_phy->usb_ctrl_regs = syscon_regmap_lookup_by_phandle(dev->of_node, "realtek,usb_ctrl"); + if (IS_ERR(rtk_phy->usb_ctrl_regs)) { + dev_info(dev, "%s: DTS no support usb_ctrl regs syscon\n", __func__); + rtk_phy->usb_ctrl_regs = NULL; + } + + ret = of_property_read_u32_index(dev->of_node, "realtek,phyN", 0, + &phyN); + if (ret) + goto err; + + rtk_phy->phyN = phyN; + + rtk_phy->reg_addr = devm_kzalloc(dev, + sizeof(struct reg_addr) * phyN, GFP_KERNEL); + if (!rtk_phy->reg_addr) + return -ENOMEM; + + rtk_phy->phy_data = devm_kzalloc(dev, + sizeof(struct phy_data) * phyN, GFP_KERNEL); + if (!rtk_phy->phy_data) + return -ENOMEM; + + for (i = 0; i < phyN; i++) { + struct reg_addr *addr = + &((struct reg_addr *)rtk_phy->reg_addr)[i]; + struct phy_data *phy_data = + &((struct phy_data *)rtk_phy->phy_data)[i]; + + char phy_name[5], phy_name_v2[10]; + struct device_node *sub_node; + + addr->reg_mdio_ctl = of_iomap(dev->of_node, i); + dev_dbg(dev, "%s %d #%d reg_mdio_ctl=%p\n", + __func__, __LINE__, i, addr->reg_mdio_ctl); + + snprintf(phy_name, 5, "phy%d", i); + + sub_node = of_get_child_by_name(dev->of_node, phy_name); + if (sub_node) { + dev_dbg(dev, "%s %d: #%d Get phy data v1 sub_node for %s\n", + __func__, __LINE__, i, phy_name); + ret = __get_phy_parameter_v1(dev, phy_data, sub_node); + if (ret) + goto err; + } else { + snprintf(phy_name_v2, 10, "phy%d_data", i); + sub_node = of_get_child_by_name(dev->of_node, phy_name_v2); + if (sub_node) { + dev_dbg(dev, "%s %d: #%d Get phy data v2 sub_node for %s\n", + __func__, __LINE__, i, phy_name_v2); + ret = __get_phy_parameter_v2(dev, phy_data, sub_node); + if (ret) + goto err; + } + } + + if (!sub_node) { + dev_err(dev, "%s %d No device sub node for %s\n", + __func__, __LINE__, phy_name); + goto err; + } + + if (of_property_read_bool(sub_node, "realtek,do-toggle-once")) + phy_data->do_toggle_once = true; + else + phy_data->do_toggle_once = false; + + if (of_property_read_bool(sub_node, "realtek,do-toggle")) + phy_data->do_toggle = true; + else + phy_data->do_toggle = false; + + if (of_property_read_bool(sub_node, "realtek,use-default-parameter")) + phy_data->use_default_parameter = true; + else + phy_data->use_default_parameter = false; + + if (of_property_read_bool(sub_node, "realtek,check-rx-front-end-offset")) + phy_data->check_rx_front_end_offset = true; + else + phy_data->check_rx_front_end_offset = false; + + if (of_property_read_bool(sub_node, "realtek,check-efuse")) + phy_data->check_efuse = true; + else + phy_data->check_efuse = false; + + __get_phy_parameter_by_efuse(rtk_phy, phy_data, i); + } + + platform_set_drvdata(pdev, rtk_phy); + + ret = usb_add_phy_dev(&rtk_phy->phy); + if (ret) + goto err; + + create_debug_files(rtk_phy); + +err: + dev_dbg(&pdev->dev, "Probe RTK USB 3.0 PHY (ret=%d)\n", ret); + + return ret; +} + +static int rtk_usb3phy_remove(struct platform_device *pdev) +{ + struct rtk_usb_phy *rtk_phy = platform_get_drvdata(pdev); + + remove_debug_files(rtk_phy); + + usb_remove_phy(&rtk_phy->phy); + + return 0; +} + +#ifdef CONFIG_OF +static const struct of_device_id usbphy_rtk_dt_match[] = { + { .compatible = "realtek,usb3phy", }, + { .compatible = "realtek,rtd-usb3phy", }, + { .compatible = "realtek,rtd1295-usb3phy", }, + { .compatible = "realtek,rtd1619-usb3phy", }, + { .compatible = "realtek,rtd1319-usb3phy", }, + { .compatible = "realtek,rtd1619b-usb3phy", }, + { .compatible = "realtek,rtd1319d-usb3phy", }, + {}, +}; +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); +#endif + +static struct platform_driver rtk_usb3phy_driver = { + .probe = rtk_usb3phy_probe, + .remove = rtk_usb3phy_remove, + .driver = { + .name = RTK_USB3PHY_NAME, + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(usbphy_rtk_dt_match), + }, +}; + +module_platform_driver(rtk_usb3phy_driver); + +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" RTK_USB3PHY_NAME); +MODULE_AUTHOR("Realtek Semiconductor Corporation"); +MODULE_DESCRIPTION("RTK usb 3.0 phy driver"); -- 2.34.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 4:58 ` [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY Stanley Chang @ 2023-05-19 6:28 ` Arnd Bergmann 2023-05-19 10:40 ` Stanley Chang[昌育德] 2023-05-19 8:16 ` Paul Cercueil 2023-05-20 9:04 ` kernel test robot 2 siblings, 1 reply; 12+ messages in thread From: Arnd Bergmann @ 2023-05-19 6:28 UTC (permalink / raw) To: Stanley Chang, Greg Kroah-Hartman Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Paul Cercueil, Linus Walleij, linux-phy, devicetree, linux-kernel, linux-usb On Fri, May 19, 2023, at 06:58, Stanley Chang wrote: > +struct rtk_usb_phy { > + struct usb_phy phy; > + struct device *dev; > + struct regmap *usb_regs; > + struct regmap *mac_regs; > + struct regmap *usb_ctrl_regs; > + > + int port_index; > + int phyN; > + void *reg_addr; > + void *phy_data; > + > +#ifdef CONFIG_DEBUG_FS > + struct dentry *debug_dir; > +#endif > +}; I'd avoid the #ifdefs here and just leave the debugfs code in unconditionally in favor of readability. When debugfs is disabled, everything except for the one pointer value should get optimized out. > +#define phy_read(addr) __raw_readl(addr) > +#define phy_write(addr, val) do { \ > + /* Do smp_wmb */ \ > + smp_wmb(); __raw_writel(val, addr); \ > +} while (0) Using __raw_readl()/__raw_writel() in a driver is almost never the right interface, it does not guarantee atomicity of the access, has the wrong byte-order on big-endian kernels and misses the barriers to serialize against DMA accesses. smp_wmb() should have no effect here since this only serializes access to memory against another CPU if it's paired with an smp_rmb(), but not on MMIO registers. > +#define PHY_IO_TIMEOUT_MSEC (50) > + > +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 > result) > +{ > + unsigned long timeout = jiffies + > msecs_to_jiffies(PHY_IO_TIMEOUT_MSEC); > + > + while (time_before(jiffies, timeout)) { > + /* Do smp_rmb */ > + smp_rmb(); > + if ((phy_read(reg) & mask) == result) > + return 0; > + udelay(100); > + } > + pr_err("\033[0;32;31m can't program USB phy \033[m\n"); > + > + return -ETIMEDOUT; > +} This should just use read_poll_timeout() or possibly read_poll_timeout_atomic(), but not an open-coded version. I don't think I've seen escape sequences in a printk in any other driver, so please don't start that now. > +#define DEFAULT_CHIP_REVISION 0xA00 > +#define MAX_CHIP_REVISION 0xC00 > + > +static inline int __get_chip_revision(void) > +{ > + int chip_revision = 0xFFF; > + char revision[] = "FFF"; > + struct soc_device_attribute soc_att[] = {{.revision = revision}, {}}; You should probably check that you are actually on the right SoC type here as well, not just the right revision of an arbitrary chip. Ideally I think the revision check should be based off a DT proporty if that's possible, so you can have this code in the boot loader. > +#define RTK_USB2PHY_NAME "rtk-usb2phy" Better avoid hiding the driver name like this, it makes it harder to grep the source tree for particular driver names. > + /* rmb for reg read */ > + smp_rmb(); > + regVal = phy_read(reg_gusb2phyacc0); I would expect that you don't need barriers like this, especially if you change the phy_read() helper to use the proper readl(). If you do need to serialize against other CPUs, still, there should be a longer explanation about that, since it's so unexpected. > + > +static void do_rtk_usb2_phy_toggle(struct rtk_usb_phy *rtk_phy, > + int index, bool isConnect); It's best to sort your function definitions in a way that avoids forward declarations. This makes it easier to read and shows that there are no obvious recursions in the source. If you do have an intentional recursion, make sure that there is a way to prevent unbounded stack usage, and explain that in a comment. > +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int index) > +{ > + struct reg_addr *regAddr; > + struct phy_data *phy_data; > + struct phy_parameter *phy_page_setting; > + int i; > + > + if (!rtk_phy) { > + pr_err("%s, rtk_phy is NULL\n", __func__); > + return -EINVAL; > + } > + > + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, index); ... > + if (!phy_data) { > + pr_err("%s, phy_data is NULL\n", __func__); > + return -EINVAL; > + } You can probably remove most of the debugging prints. > + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; > + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; Why do you need the casts here? It looks like regAddr should be an __iomem pointer. Please build your driver with 'make C=1' to see if there are any incorrect address space annotations. > +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, > + struct phy_data *phy_data, int index) > +{ > + u8 value = 0; > + struct nvmem_cell *cell; > + struct soc_device_attribute rtk_soc_groot[] = { > + { .family = "Realtek Groot",}, > + { /* empty */ } > + }; > + struct soc_device_attribute rtk_soc_hank[] = { > + { .family = "Realtek Hank",}, > + { /* empty */ } > + }; > + struct soc_device_attribute rtk_soc_efuse_v1[] = { > + { .family = "Realtek Phoenix",}, > + { .family = "Realtek Kylin",}, > + { .family = "Realtek Hercules",}, > + { .family = "Realtek Thor",}, > + { .family = "Realtek Hank",}, > + { .family = "Realtek Groot",}, > + { .family = "Realtek Stark",}, > + { .family = "Realtek Parker",}, > + { /* empty */ } > + }; > + struct soc_device_attribute rtk_soc_dis_level_at_page0[] = { > + { .family = "Realtek Phoenix",}, > + { .family = "Realtek Kylin",}, > + { .family = "Realtek Hercules",}, > + { .family = "Realtek Thor",}, > + { .family = "Realtek Hank",}, > + { .family = "Realtek Groot",}, > + { /* empty */ } > + }; > + > + if (soc_device_match(rtk_soc_efuse_v1)) { > + dev_dbg(rtk_phy->dev, "Use efuse v1 to updated phy parameter\n"); > + phy_data->check_efuse_version = CHECK_EFUSE_V1; I'm not entirely sure what you are trying to do here, but it looks the purpose is to tell the difference between implementations of the phy device by looking at which SoC it's in. You should only need that very rarely when this information cannot be passed through the DT, but you literally already have the per-SoC compatible strings below, so just use those, or add other DT properties in the binding for specific quirks or capabilities. > +#ifdef CONFIG_OF > +static const struct of_device_id usbphy_rtk_dt_match[] = { > + { .compatible = "realtek,usb3phy", }, > + { .compatible = "realtek,rtd-usb3phy", }, > + { .compatible = "realtek,rtd1295-usb3phy", }, > + { .compatible = "realtek,rtd1619-usb3phy", }, > + { .compatible = "realtek,rtd1319-usb3phy", }, > + { .compatible = "realtek,rtd1619b-usb3phy", }, > + { .compatible = "realtek,rtd1319d-usb3phy", }, > + {}, > +}; > +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); > +#endif > + > +static struct platform_driver rtk_usb3phy_driver = { > + .probe = rtk_usb3phy_probe, > + .remove = rtk_usb3phy_remove, > + .driver = { > + .name = RTK_USB3PHY_NAME, > + .owner = THIS_MODULE, > + .of_match_table = of_match_ptr(usbphy_rtk_dt_match), > + }, > +}; Remove that of_match_ptr() and ifdef CONFIG_OF check here, new drivers should no longer use static platform device definitions and just assume that CONFIG_OF is used. Arnd ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 6:28 ` Arnd Bergmann @ 2023-05-19 10:40 ` Stanley Chang[昌育德] 0 siblings, 0 replies; 12+ messages in thread From: Stanley Chang[昌育德] @ 2023-05-19 10:40 UTC (permalink / raw) To: Arnd Bergmann, Greg Kroah-Hartman Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Paul Cercueil, Linus Walleij, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Hi Arnd, > > +#ifdef CONFIG_DEBUG_FS > > + struct dentry *debug_dir; > > +#endif > > +}; > > I'd avoid the #ifdefs here and just leave the debugfs code in unconditionally in > favor of readability. When debugfs is disabled, everything except for the one > pointer value should get optimized out. I will remove this #ifdef. > > +#define phy_read(addr) __raw_readl(addr) #define phy_write(addr, val) > > +do { \ > > + /* Do smp_wmb */ \ > > + smp_wmb(); __raw_writel(val, addr); \ } while (0) > > Using __raw_readl()/__raw_writel() in a driver is almost never the right > interface, it does not guarantee atomicity of the access, has the wrong > byte-order on big-endian kernels and misses the barriers to serialize against > DMA accesses. smp_wmb() should have no effect here since this only serializes > access to memory against another CPU if it's paired with an smp_rmb(), but > not on MMIO registers. I will try using readl/writel directly. > > +#define PHY_IO_TIMEOUT_MSEC (50) > > + > > +static inline int utmi_wait_register(void __iomem *reg, u32 mask, u32 > > result) > > +{ > > + unsigned long timeout = jiffies + > > msecs_to_jiffies(PHY_IO_TIMEOUT_MSEC); > > + > > + while (time_before(jiffies, timeout)) { > > + /* Do smp_rmb */ > > + smp_rmb(); > > + if ((phy_read(reg) & mask) == result) > > + return 0; > > + udelay(100); > > + } > > + pr_err("\033[0;32;31m can't program USB phy \033[m\n"); > > + > > + return -ETIMEDOUT; > > +} > > This should just use read_poll_timeout() or possibly > read_poll_timeout_atomic(), but not an open-coded version. > I've tried using read_poll_timeout() instead and it works. > I don't think I've seen escape sequences in a printk in any other driver, so > please don't start that now. Okay. I will remove it. > > +#define DEFAULT_CHIP_REVISION 0xA00 > > +#define MAX_CHIP_REVISION 0xC00 > > + > > +static inline int __get_chip_revision(void) { > > + int chip_revision = 0xFFF; > > + char revision[] = "FFF"; > > + struct soc_device_attribute soc_att[] = {{.revision = revision}, > > +{}}; > > You should probably check that you are actually on the right SoC type here as > well, not just the right revision of an arbitrary chip. > > Ideally I think the revision check should be based off a DT proporty if that's > possible, so you can have this code in the boot loader. In this case I just care in the chip version number. Because the revision number is not recorded in the DTB. > > +#define RTK_USB2PHY_NAME "rtk-usb2phy" > > Better avoid hiding the driver name like this, it makes it harder to grep the > source tree for particular driver names. I will remove this coding style. > > + /* rmb for reg read */ > > + smp_rmb(); > > + regVal = phy_read(reg_gusb2phyacc0); > > I would expect that you don't need barriers like this, especially if you change > the phy_read() helper to use the proper readl(). > > If you do need to serialize against other CPUs, still, there should be a longer > explanation about that, since it's so unexpected. I will use readl to instead the phy_read and remove smp_rmb. > > + > > +static void do_rtk_usb2_phy_toggle(struct rtk_usb_phy *rtk_phy, > > + int index, bool isConnect); > > It's best to sort your function definitions in a way that avoids forward > declarations. This makes it easier to read and shows that there are no obvious > recursions in the source. If you do have an intentional recursion, make sure that > there is a way to prevent unbounded stack usage, and explain that in a > comment. Ok, I'll move this function to just before the first use. > > + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; > > + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; > Why do you need the casts here? It looks like regAddr should be an __iomem > pointer. Please build your driver with 'make C=1' > to see if there are any incorrect address space annotations. I define member reg_addr as void *reg_addr So I have to convert it to "struct reg_addr" and use it as array. And I ran "make C=1" with no error or warning. > > +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, > > + struct phy_data *phy_data, int index) { > > + u8 value = 0; > > + struct nvmem_cell *cell; > > + struct soc_device_attribute rtk_soc_groot[] = { > > + { .family = "Realtek Groot",}, > > + { /* empty */ } > > + }; > > + struct soc_device_attribute rtk_soc_hank[] = { > > + { .family = "Realtek Hank",}, > > + { /* empty */ } > > + }; > > + struct soc_device_attribute rtk_soc_efuse_v1[] = { > > + { .family = "Realtek Phoenix",}, > > + { .family = "Realtek Kylin",}, > > + { .family = "Realtek Hercules",}, > > + { .family = "Realtek Thor",}, > > + { .family = "Realtek Hank",}, > > + { .family = "Realtek Groot",}, > > + { .family = "Realtek Stark",}, > > + { .family = "Realtek Parker",}, > > + { /* empty */ } > > + }; > > + struct soc_device_attribute rtk_soc_dis_level_at_page0[] = { > > + { .family = "Realtek Phoenix",}, > > + { .family = "Realtek Kylin",}, > > + { .family = "Realtek Hercules",}, > > + { .family = "Realtek Thor",}, > > + { .family = "Realtek Hank",}, > > + { .family = "Realtek Groot",}, > > + { /* empty */ } > > + }; > > + > > + if (soc_device_match(rtk_soc_efuse_v1)) { > > + dev_dbg(rtk_phy->dev, "Use efuse v1 to updated phy > parameter\n"); > > + phy_data->check_efuse_version = CHECK_EFUSE_V1; > > I'm not entirely sure what you are trying to do here, but it looks the purpose is > to tell the difference between implementations of the phy device by looking at > which SoC it's in. You should only need that very rarely when this information > cannot be passed through the DT, but you literally already have the per-SoC > compatible strings below, so just use those, or add other DT properties in the > binding for specific quirks or capabilities. My purpose is to judge different SoCs and set different parameters. The DTS property might be a good way to go, I'll check to see if it's a good fit. > Remove that of_match_ptr() and ifdef CONFIG_OF check here, new drivers > should no longer use static platform device definitions and just assume that > CONFIG_OF is used. > Ok, I will remove it. Thanks, Stanley ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 4:58 ` [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY Stanley Chang 2023-05-19 6:28 ` Arnd Bergmann @ 2023-05-19 8:16 ` Paul Cercueil 2023-05-19 10:58 ` Stanley Chang[昌育德] 2023-05-20 9:04 ` kernel test robot 2 siblings, 1 reply; 12+ messages in thread From: Paul Cercueil @ 2023-05-19 8:16 UTC (permalink / raw) To: Stanley Chang, Greg Kroah-Hartman Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Arnd Bergmann, Linus Walleij, linux-phy, devicetree, linux-kernel, linux-usb Hi Stanley, Le vendredi 19 mai 2023 à 12:58 +0800, Stanley Chang a écrit : > Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB > 2.0/3.0 > controller. Added two drivers to drive the USB 2.0/3.0 PHY > transceivers. > For USB 3.0 transceivers, a driver phy-rtk-usb3 is provided. > The driver phy-rtk-usb2 is used to support USB 2.0 transceivers. > > Signed-off-by: Stanley Chang <stanley_chang@realtek.com> > --- > drivers/usb/phy/Kconfig | 14 + > drivers/usb/phy/Makefile | 2 + > drivers/usb/phy/phy-rtk-usb.h | 88 ++ > drivers/usb/phy/phy-rtk-usb2.c | 2196 > ++++++++++++++++++++++++++++++++ > drivers/usb/phy/phy-rtk-usb3.c | 1165 +++++++++++++++++ > 5 files changed, 3465 insertions(+) > create mode 100644 drivers/usb/phy/phy-rtk-usb.h > create mode 100644 drivers/usb/phy/phy-rtk-usb2.c > create mode 100644 drivers/usb/phy/phy-rtk-usb3.c I'm pretty sure that drivers/usb/phy/ is deprecated now... New drivers should be written for the generic PHY subsystem in drivers/phy/. Cheers, -Paul > > diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig > index 5f629d7cad64..b2e5feb9f37a 100644 > --- a/drivers/usb/phy/Kconfig > +++ b/drivers/usb/phy/Kconfig > @@ -172,4 +172,18 @@ config USB_ULPI_VIEWPORT > Provides read/write operations to the ULPI phy register set > for > controllers with a viewport register (e.g. Chipidea/ARC > controllers). > > +config RTK_USB2PHY > + tristate "Realtek RTD USB2 PHY Transceiver Driver" > + select USB_PHY > + help > + Enable this to support Realtek SoC USB2 phy transceiver. > + Support the DHC (digital home center) RTD series SoCs. > + > +config RTK_USB3PHY > + tristate "Realtek RTD USB3 PHY Transceiver Driver" > + select USB_PHY > + help > + Enable this to support Realtek SoC USB3 phy transceiver. > + Support the DHC (digital home center) RTD series SoCs. > + > endmenu > diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile > index e5d619b4d8f6..1e64255fcd1f 100644 > --- a/drivers/usb/phy/Makefile > +++ b/drivers/usb/phy/Makefile > @@ -23,3 +23,5 @@ obj-$(CONFIG_USB_MXS_PHY) += phy-mxs- > usb.o > obj-$(CONFIG_USB_ULPI) += phy-ulpi.o > obj-$(CONFIG_USB_ULPI_VIEWPORT) += phy-ulpi- > viewport.o > obj-$(CONFIG_KEYSTONE_USB_PHY) += phy-keystone.o > +obj-$(CONFIG_RTK_USB2PHY) += phy-rtk-usb2.o > +obj-$(CONFIG_RTK_USB3PHY) += phy-rtk-usb3.o > diff --git a/drivers/usb/phy/phy-rtk-usb.h b/drivers/usb/phy/phy-rtk- > usb.h > new file mode 100644 > index 000000000000..5652866d0b02 > --- /dev/null > +++ b/drivers/usb/phy/phy-rtk-usb.h > @@ -0,0 +1,88 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * phy-rtk-usb.h Realtek usb phy header file > + * > + * copyright (c) 2023 realtek semiconductor corporation > + * > + */ > + > +#ifndef __PHY_RTK_USB_H__ > +#define __PHY_RTK_USB_H__ > + > +struct rtk_usb_phy { > + struct usb_phy phy; > + struct device *dev; > + struct regmap *usb_regs; > + struct regmap *mac_regs; > + struct regmap *usb_ctrl_regs; > + > + int port_index; > + int phyN; > + void *reg_addr; > + void *phy_data; > + > +#ifdef CONFIG_DEBUG_FS > + struct dentry *debug_dir; > +#endif > +}; > + > +#define phy_read(addr) __raw_readl(addr) > +#define phy_write(addr, val) do { \ > + /* Do smp_wmb */ \ > + smp_wmb(); __raw_writel(val, addr); \ > +} while (0) > +#define PHY_IO_TIMEOUT_MSEC (50) > + > +static inline int utmi_wait_register(void __iomem *reg, u32 mask, > u32 result) > +{ > + unsigned long timeout = jiffies + > msecs_to_jiffies(PHY_IO_TIMEOUT_MSEC); > + > + while (time_before(jiffies, timeout)) { > + /* Do smp_rmb */ > + smp_rmb(); > + if ((phy_read(reg) & mask) == result) > + return 0; > + udelay(100); > + } > + pr_err("\033[0;32;31m can't program USB phy \033[m\n"); > + > + return -ETIMEDOUT; > +} > + > +#define DEFAULT_CHIP_REVISION 0xA00 > +#define MAX_CHIP_REVISION 0xC00 > + > +static inline int __get_chip_revision(void) > +{ > + int chip_revision = 0xFFF; > + char revision[] = "FFF"; > + struct soc_device_attribute soc_att[] = {{.revision = > revision}, {}}; > + struct soc_device_attribute *soc_att_match = NULL; > + > + while (soc_att_match == NULL) { > + chip_revision--; > + > + if (chip_revision <= DEFAULT_CHIP_REVISION) > + break; > + if (chip_revision > MAX_CHIP_REVISION) > + chip_revision = MAX_CHIP_REVISION; > + else if ((chip_revision & 0xFF) > 0xF) > + chip_revision = (chip_revision & 0xF00) + > 0xF; > + > + snprintf(revision, 4, "%X", chip_revision); > + > + soc_att_match = (struct soc_device_attribute *) > + soc_device_match(soc_att); > + } > + > + if (soc_att_match) { > + pr_debug("%s get chip_revision %x\n", __func__, > chip_revision); > + return chip_revision; > + } > + > + pr_debug("%s: Use default chip_revision %x\n", __func__, > + DEFAULT_CHIP_REVISION); > + return DEFAULT_CHIP_REVISION; > +} > + > +#endif /* __PHY_RTK_USB_H__ */ > diff --git a/drivers/usb/phy/phy-rtk-usb2.c b/drivers/usb/phy/phy- > rtk-usb2.c > new file mode 100644 > index 000000000000..ce9305ccb6fb > --- /dev/null > +++ b/drivers/usb/phy/phy-rtk-usb2.c > @@ -0,0 +1,2196 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * phy-rtk-usb2.c RTK usb2.0 PHY driver > + * > + * Copyright (C) 2023 Realtek Semiconductor Corporation > + * > + */ > + > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/of_device.h> > +#include <linux/of_address.h> > +#include <linux/uaccess.h> > +#include <linux/debugfs.h> > +#include <linux/nvmem-consumer.h> > +#include <linux/regmap.h> > +#include <linux/sys_soc.h> > +#include <linux/mfd/syscon.h> > +#include <linux/usb.h> > +#include <linux/usb/phy.h> > +#include <linux/usb/hcd.h> > + > +#include "phy-rtk-usb.h" > + > +#define RTK_USB2PHY_NAME "rtk-usb2phy" > + > +/* GUSB2PHYACCn register */ > +#define PHY_NEW_REG_REQ BIT(25) > +#define PHY_VSTS_BUSY BIT(23) > +#define PHY_VCTRL_SHIFT 8 > +#define PHY_REG_DATA_MASK 0xff > + > +#define GET_LOW_NIBBLE(addr) (addr & 0x0f) > +#define GET_HIGH_NIBBLE(addr) ((addr & 0xf0)>>4) > + > +#define EFUS_USB_DC_CAL_RATE 2 > +#define EFUS_USB_DC_CAL_MAX 7 > + > +#define EFUS_USB_DC_DIS_RATE 1 > +#define EFUS_USB_DC_DIS_MAX 7 > + > +#define MAX_PHY_DATA_SIZE 20 > +#define OFFEST_PHY_READ 0x20 > + > +#define SET_PAGE_OFFSET 0xf4 > +#define SET_PAGE_0 0x9b > +#define SET_PAGE_1 0xbb > +#define SET_PAGE_2 0xdb > + > +#define PAGE_START 0xe0 > +#define PAGE0_0xE4 0xe4 > +#define PAGE0_0xE7 0xe7 > +#define PAGE1_0xE0 0xe0 > +#define PAGE1_0xE2 0xe2 > + > +/* mapping 0xE0 to 0 ... 0xE7 to 7, 0xF0 to 8 ,,, 0xF7 to 15 */ > +#define PAGE_ADDR_MAP_ARRAY_INDEX(addr) \ > + (((addr - PAGE_START)&0x7) + \ > + (((addr - PAGE_START)&0x10)>>1)) > +#define ARRAY_INDEX_MAP_PAGE_ADDR(index) \ > + (((index + PAGE_START)&0x7) + \ > + (((index&0x8)<<1) + PAGE_START)) > + > +struct reg_addr { > + void __iomem *reg_wrap_vstatus; > + void __iomem *reg_gusb2phyacc0; > + int vstatus_index; > +}; > + > +struct phy_parameter { > + u8 addr; > + u8 data; > +}; > + > +struct phy_data { > + int page0_size; > + struct phy_parameter *page0; > + int page1_size; > + struct phy_parameter *page1; > + int page2_size; > + struct phy_parameter *page2; > + > + bool check_efuse; > + int check_efuse_version; > +#define CHECK_EFUSE_V1 1 > +#define CHECK_EFUSE_V2 2 > + int8_t efuse_usb_dc_cal; > + int efuse_usb_dc_cal_rate; > + int usb_dc_cal_mask; > + int8_t efuse_usb_dc_dis; > + int efuse_usb_dc_dis_rate; > + int usb_dc_dis_mask; > + bool usb_dc_dis_at_page0; > + bool do_toggle; > + bool do_toggle_driving; > + int disconnect_driving_updated; > + bool use_default_parameter; > + bool is_double_sensitivity_mode; > + bool ldo_force_enable; > + bool ldo_enable; > + s32 ldo_page0_e4_compensate; > + s32 page0_e4_compensate; > +}; > + > +static char rtk_usb_phy_read(struct reg_addr *regAddr, char addr) > +{ > + void __iomem *reg_gusb2phyacc0 = regAddr->reg_gusb2phyacc0; > + unsigned int regVal; > + int ret = 0; > + > + addr -= OFFEST_PHY_READ; > + > + /* polling until VBusy == 0 */ > + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); > + if (ret) > + return (char)ret; > + > + /* VCtrl = low nibble of addr, and set PHY_NEW_REG_REQ */ > + regVal = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << > PHY_VCTRL_SHIFT); > + phy_write(reg_gusb2phyacc0, regVal); > + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); > + if (ret) > + return (char)ret; > + > + /* VCtrl = high nibble of addr, and set PHY_NEW_REG_REQ */ > + regVal = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << > PHY_VCTRL_SHIFT); > + phy_write(reg_gusb2phyacc0, regVal); > + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); > + if (ret) > + return (char)ret; > + > + /* rmb for reg read */ > + smp_rmb(); > + regVal = phy_read(reg_gusb2phyacc0); > + > + return (char) (regVal & PHY_REG_DATA_MASK); > +} > + > +static int rtk_usb_phy_write(struct reg_addr *regAddr, char addr, > char data) > +{ > + unsigned int regVal; > + void __iomem *reg_wrap_vstatus = regAddr->reg_wrap_vstatus; > + void __iomem *reg_gusb2phyacc0 = regAddr->reg_gusb2phyacc0; > + int shift_bits = regAddr->vstatus_index * 8; > + int ret = 0; > + > + /* write data to VStatusOut2 (data output to phy) */ > + phy_write(reg_wrap_vstatus, (u32)data<<shift_bits); > + > + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); > + if (ret) > + return ret; > + > + /* VCtrl = low nibble of addr, set PHY_NEW_REG_REQ */ > + regVal = PHY_NEW_REG_REQ | (GET_LOW_NIBBLE(addr) << > PHY_VCTRL_SHIFT); > + > + phy_write(reg_gusb2phyacc0, regVal); > + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); > + if (ret) > + return ret; > + > + /* VCtrl = high nibble of addr, set PHY_NEW_REG_REQ */ > + regVal = PHY_NEW_REG_REQ | (GET_HIGH_NIBBLE(addr) << > PHY_VCTRL_SHIFT); > + > + phy_write(reg_gusb2phyacc0, regVal); > + ret = utmi_wait_register(reg_gusb2phyacc0, PHY_VSTS_BUSY, 0); > + if (ret) > + return ret; > + > + return 0; > +} > + > +static int rtk_usb_phy_set_page(struct reg_addr *regAddr, int page) > +{ > + switch (page) { > + case 0: > + return rtk_usb_phy_write(regAddr, SET_PAGE_OFFSET, > SET_PAGE_0); > + case 1: > + return rtk_usb_phy_write(regAddr, SET_PAGE_OFFSET, > SET_PAGE_1); > + case 2: > + return rtk_usb_phy_write(regAddr, SET_PAGE_OFFSET, > SET_PAGE_2); > + default: > + pr_err("%s error page=%d\n", __func__, page); > + } > + > + return -1; > +} > + > +#define USB_CTRL 0x0 /* usb ctrl at 0x98007FB0 */ > +#define ISO_USB_U2PHY_REG_LDO_PW (BIT(20) | BIT(21) | BIT(22) | > BIT(23)) > + > +static int control_phy_power(struct rtk_usb_phy *rtk_phy, > + struct phy_data *phy_data, struct reg_addr *regAddr) > +{ > + int use_ldo = 0; > + unsigned int val; > + > + if (!rtk_phy->usb_ctrl_regs) { > + dev_info(rtk_phy->dev, "%s No usb_ctrl_regs can't set > USB_CTRL\n", > + __func__); > + return use_ldo; > + } > + > + if (regmap_read(rtk_phy->usb_ctrl_regs, USB_CTRL, &val)) { > + dev_err(rtk_phy->dev, "%s Get USB_CTRL fail\n", > __func__); > + return use_ldo; > + } > + > + if ((val & ISO_USB_U2PHY_REG_LDO_PW) == > ISO_USB_U2PHY_REG_LDO_PW) { > + dev_info(rtk_phy->dev, "%s phy use ldo power! > (USB_CTRL val=0x%x)\n", > + __func__, val); > + use_ldo = 1; > + goto out; > + } > + > + if (phy_data->ldo_force_enable) { > + regmap_update_bits(rtk_phy->usb_ctrl_regs, USB_CTRL, > + (unsigned int)ISO_USB_U2PHY_REG_LDO_PW, > + (unsigned int)ISO_USB_U2PHY_REG_LDO_PW); > + use_ldo = 1; > + > + dev_info(rtk_phy->dev, "%s phy %s then turn on ldo! > USB_CTRL val=0x%x\n", > + __func__, > + phy_data->ldo_force_enable ? > + "ldo_force_enable":"no power", > + val); > + } > + > +out: > + return use_ldo; > +} > + > +static u8 __updated_page0_0xe4_parameter(struct phy_data *phy_data, > u8 data) > +{ > + u8 val; > + s32 __val; > + s32 page0_e4_compensate = 0; > + s32 usb_dc_cal_mask = phy_data->usb_dc_cal_mask; > + > + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { > + if (phy_data->ldo_enable) > + page0_e4_compensate = phy_data- > >ldo_page0_e4_compensate; > + > + __val = (s32)(data & usb_dc_cal_mask) + > page0_e4_compensate > + + phy_data->efuse_usb_dc_cal; > + } else { /* for CHECK_EFUSE_V2 or no efuse */ > + page0_e4_compensate = phy_data->page0_e4_compensate; > + > + if (phy_data->efuse_usb_dc_cal) > + __val = (s32)((phy_data->efuse_usb_dc_cal & > usb_dc_cal_mask) > + + page0_e4_compensate); > + else > + __val = (s32)(data & usb_dc_cal_mask); > + } > + > + if (__val > usb_dc_cal_mask) > + __val = usb_dc_cal_mask; > + else if (__val < 0) > + __val = 0; > + > + val = (data & (~usb_dc_cal_mask)) | (__val & > usb_dc_cal_mask); > + > + return val; > +} > + > +static u8 __updated_dc_disconnect_level_page0_0xe4(struct phy_data > *phy_data, > + u8 data) > +{ > + u8 val; > + s32 __val; > + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; > + int offset = 4; > + > + __val = (s32)((data >> offset) & usb_dc_dis_mask) > + + phy_data->efuse_usb_dc_dis; > + > + if (__val > usb_dc_dis_mask) > + __val = usb_dc_dis_mask; > + else if (__val < 0) > + __val = 0; > + > + val = (data & (~(usb_dc_dis_mask << offset))) | > + (__val & usb_dc_dis_mask) << offset; > + > + return val; > +} > + > +/* updated disconnect level at page0 0xe4 */ > +static void update_dc_disconnect_level_at_page0(struct rtk_usb_phy > *rtk_phy, > + struct reg_addr *regAddr, > + struct phy_data *phy_data, bool isUpdate) > +{ > + struct phy_parameter *phy_page_setting; > + int i; > + > + /* Set page 0 */ > + phy_page_setting = phy_data->page0; > + rtk_usb_phy_set_page(regAddr, 0); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); > + > + if (i < phy_data->page0_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + u8 __data; > + int offset = 4; > + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default addr %x value %x\n", > + (phy_page_setting + i)->addr, > + (phy_page_setting + i)->data); > + } > + __data = rtk_usb_phy_read(regAddr, addr); > + > + /* keep default dc dis and real dc cal */ > + data = (data & ((usb_dc_dis_mask << offset))) | > + (__data & (~(usb_dc_dis_mask << > offset))); > + > + if (isUpdate) > + data = > __updated_dc_disconnect_level_page0_0xe4(phy_data, data); > + > + if (rtk_usb_phy_write(regAddr, addr, data)) { > + dev_err(rtk_phy->dev, > + "[%s:%d] Error page1 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, > + addr, data); > + return; > + } > + > + dev_info(rtk_phy->dev, > + "%s to set Page0 0xE4=%x for dc > disconnect level (%s)\n", > + __func__, > + rtk_usb_phy_read(regAddr, addr), > + isUpdate?"Update":"restore"); > + } else { > + dev_err(rtk_phy->dev, > + "ERROR: %s %d index=%d addr Not > PAGE0_0xE4\n", > + __func__, __LINE__, i); > + } > +} > + > +static u8 __updated_dc_disconnect_level_page1_0xe2(struct phy_data > *phy_data, > + u8 data) > +{ > + u8 val; > + s32 __val; > + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; > + > + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { > + __val = (s32)(data & usb_dc_dis_mask) > + + phy_data->efuse_usb_dc_dis; > + } else { /* for CHECK_EFUSE_V2 or no efuse */ > + if (phy_data->efuse_usb_dc_dis) > + __val = (s32)(phy_data->efuse_usb_dc_dis & > usb_dc_dis_mask); > + else > + __val = (s32)(data & usb_dc_dis_mask); > + } > + > + if (__val > usb_dc_dis_mask) > + __val = usb_dc_dis_mask; > + else if (__val < 0) > + __val = 0; > + > + val = (data & (~usb_dc_dis_mask)) | (__val & > usb_dc_dis_mask); > + > + return val; > +} > + > +/* updated disconnect level at page1 0xe2 */ > +static void update_dc_disconnect_level_at_page1(struct rtk_usb_phy > *rtk_phy, > + struct reg_addr *regAddr, > + struct phy_data *phy_data, bool isUpdate) > +{ > + struct phy_parameter *phy_page_setting; > + int i; > + > + /* Set page 1 */ > + phy_page_setting = phy_data->page1; > + rtk_usb_phy_set_page(regAddr, 1); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE2); > + > + if (i < phy_data->page1_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + u8 __data; > + s32 usb_dc_dis_mask = phy_data->usb_dc_dis_mask; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default addr %x value %x\n", > + (phy_page_setting + i)->addr, > + (phy_page_setting + i)->data); > + } > + __data = rtk_usb_phy_read(regAddr, addr); > + > + data = (data & usb_dc_dis_mask) | (__data & > ~(usb_dc_dis_mask)); > + > + if (isUpdate) > + data = > __updated_dc_disconnect_level_page1_0xe2(phy_data, data); > + > + if (rtk_usb_phy_write(regAddr, addr, data)) { > + dev_err(rtk_phy->dev, > + "[%s:%d] Error page1 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, > + addr, data); > + return; > + } > + > + dev_info(rtk_phy->dev, > + "%s to set Page1 0xE2=%x for dc > disconnect level (%s)\n", > + __func__, > + rtk_usb_phy_read(regAddr, addr), > + isUpdate?"Update":"restore"); > + } else { > + dev_err(rtk_phy->dev, > + "ERROR: %s %d index=%d addr Not > PAGE1_0xE2\n", > + __func__, __LINE__, i); > + } > +} > + > +static void update_dc_disconnect_level(struct rtk_usb_phy *rtk_phy, > + struct reg_addr *regAddr, > + struct phy_data *phy_data, bool isUpdate) > +{ > + if (phy_data->usb_dc_dis_at_page0) > + update_dc_disconnect_level_at_page0( > + rtk_phy, regAddr, phy_data, isUpdate); > + else > + update_dc_disconnect_level_at_page1( > + rtk_phy, regAddr, phy_data, isUpdate); > +} > + > +static void do_rtk_usb2_phy_toggle(struct rtk_usb_phy *rtk_phy, > + int index, bool isConnect); > + > +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int > index) > +{ > + struct reg_addr *regAddr; > + struct phy_data *phy_data; > + struct phy_parameter *phy_page_setting; > + int i; > + > + if (!rtk_phy) { > + pr_err("%s, rtk_phy is NULL\n", __func__); > + return -EINVAL; > + } > + > + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, index); > + > + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; > + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; > + > + if (!phy_data) { > + pr_err("%s, phy_data is NULL\n", __func__); > + return -EINVAL; > + } > + > + if (control_phy_power(rtk_phy, phy_data, regAddr)) { > + phy_data->ldo_enable = true; > + dev_info(rtk_phy->dev, "%s USB phy use ldo power > compensate phy parameter (%d)\n", > + __func__, phy_data->ldo_page0_e4_compensate); > + } > + > + if (phy_data->use_default_parameter) { > + dev_info(rtk_phy->dev, "%s phy#%d use default > parameter\n", > + __func__, index); > + goto do_toggle; > + } > + > + /* Set page 0 */ > + phy_page_setting = phy_data->page0; > + rtk_usb_phy_set_page(regAddr, 0); > + > + for (i = 0; i < phy_data->page0_size; i++) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) > + continue; > + > + if (addr == PAGE0_0xE4) > + data = > __updated_page0_0xe4_parameter(phy_data, data); > + > + if (rtk_usb_phy_write(regAddr, addr, data)) { > + dev_err(rtk_phy->dev, > + "[%s:%d] Error page0 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, addr, data); > + return -1; > + } > + dev_dbg(rtk_phy->dev, "[%s:%d] Good page0 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, addr, > + rtk_usb_phy_read(regAddr, addr)); > + } > + > + /* Set page 1 */ > + phy_page_setting = phy_data->page1; > + rtk_usb_phy_set_page(regAddr, 1); > + > + for (i = 0; i < phy_data->page1_size; i++) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) > + continue; > + > + if (rtk_usb_phy_write(regAddr, addr, data)) { > + dev_err(rtk_phy->dev, > + "[%s:%d] Error page1 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, > + addr, data); > + return -1; > + } > + dev_dbg(rtk_phy->dev, "[%s:%d] Good page1 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, addr, > + rtk_usb_phy_read(regAddr, addr)); > + } > + > + if (phy_data->page2_size == 0) > + goto do_toggle; > + > + /* Set page 2 */ > + phy_page_setting = phy_data->page2; > + rtk_usb_phy_set_page(regAddr, 2); > + > + for (i = 0; i < phy_data->page2_size; i++) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) > + continue; > + > + if (rtk_usb_phy_write(regAddr, addr, data)) { > + dev_err(rtk_phy->dev, > + "[%s:%d] Error page2 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, addr, data); > + return -1; > + } > + dev_dbg(rtk_phy->dev, "[%s:%d] Good page2 addr=0x%x > value=0x%x\n", > + __func__, __LINE__, > + (phy_page_setting + i)->addr, > + rtk_usb_phy_read(regAddr, > + (phy_page_setting + i)->addr)); > + } > + > +do_toggle: > + do_rtk_usb2_phy_toggle(rtk_phy, index, false); > + > + return 0; > +} > + > +static int rtk_usb_phy_init(struct usb_phy *phy) > +{ > + struct rtk_usb_phy *rtk_phy = container_of(phy, struct > rtk_usb_phy, phy); > + unsigned long phy_init_time = jiffies; > + int i, ret = 0; > + > + dev_dbg(phy->dev, "Init RTK USB 2.0 PHY\n"); > + for (i = 0; i < rtk_phy->phyN; i++) > + ret = do_rtk_usb_phy_init(rtk_phy, i); > + > + dev_info(phy->dev, "Initialized RTK USB 2.0 PHY (take > %dms)\n", > + jiffies_to_msecs(jiffies - phy_init_time)); > + return ret; > +} > + > +static void rtk_usb_phy_shutdown(struct usb_phy *phy) > +{ > + dev_info(phy->dev, "Shutdown RTK USB 2.0 PHY\n"); > +} > + > +static void do_rtk_usb2_phy_toggle(struct rtk_usb_phy *rtk_phy, > + int index, bool isConnect) > +{ > + struct reg_addr *regAddr; > + struct phy_data *phy_data; > + struct phy_parameter *phy_page_setting; > + int i; > + > + if (!rtk_phy) { > + pr_err("%s phy_data is NULL\n", __func__); > + return; > + } > + > + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; > + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; > + > + if (!phy_data) { > + dev_err(rtk_phy->dev, "%s phy_data is NULL\n", > __func__); > + return; > + } > + > + if (!phy_data->do_toggle) > + goto out; > + > + if (phy_data->is_double_sensitivity_mode) > + goto do_toggle_driving; > + > + /* Set page 0 */ > + phy_page_setting = phy_data->page0; > + rtk_usb_phy_set_page(regAddr, 0); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE7); > + > + if (i < phy_data->page0_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default addr %x value %x\n", > + (phy_page_setting + i)->addr, > + (phy_page_setting + i)->data); > + } > + > + if (isConnect) { > + rtk_usb_phy_write(regAddr, addr, data & > + (~(BIT(4) | BIT(5) | BIT(6)))); > + } else { > + rtk_usb_phy_write(regAddr, addr, data | > + (BIT(4) | BIT(5) | BIT(6))); > + } > + dev_info(rtk_phy->dev, > + "%s %sconnect to set Page0 0xE7=%x\n", > + __func__, > + isConnect?"":"dis", > + rtk_usb_phy_read(regAddr, addr)); > + } else { > + dev_err(rtk_phy->dev, > + "ERROR: %s %d index=%d addr Not > PAGE0_0xE7\n", > + __func__, __LINE__, i); > + } > + > +do_toggle_driving: > + > + if (!phy_data->do_toggle_driving) > + goto do_toggle; > + > + /* Page 0 addr 0xE4 driving capability */ > + > + /* Set page 0 */ > + phy_page_setting = phy_data->page0; > + rtk_usb_phy_set_page(regAddr, 0); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); > + > + if (i < phy_data->page0_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default addr %x value %x\n", > + (phy_page_setting + i)->addr, > + (phy_page_setting + i)->data); > + } > + > + if (addr == PAGE0_0xE4) > + data = > __updated_page0_0xe4_parameter(phy_data, data); > + > + if (isConnect) { > + rtk_usb_phy_write(regAddr, addr, data); > + } else { > + u8 val; > + s32 __val; > + s32 driving_updated = > + phy_data- > >disconnect_driving_updated; > + s32 usb_dc_cal_mask = phy_data- > >usb_dc_cal_mask; > + > + __val = (s32)(data & usb_dc_cal_mask) + > driving_updated; > + > + if (__val > usb_dc_cal_mask) > + __val = usb_dc_cal_mask; > + else if (__val < 0) > + __val = 0; > + > + val = (data & (~usb_dc_cal_mask)) | (__val & > usb_dc_cal_mask); > + > + rtk_usb_phy_write(regAddr, addr, val); > + } > + dev_info(rtk_phy->dev, > + "%s %sconnect to set Page0 0xE4=%x for > driving\n", > + __func__, > + isConnect?"":"dis", > + rtk_usb_phy_read(regAddr, addr)); > + } else { > + dev_err(rtk_phy->dev, > + "ERROR: %s %d index=%d addr Not > PAGE0_0xE4\n", > + __func__, __LINE__, i); > + } > + > +do_toggle: > + /* restore dc disconnect level before toggle */ > + update_dc_disconnect_level(rtk_phy, regAddr, phy_data, > false); > + > + /* Set page 1 */ > + phy_page_setting = phy_data->page1; > + rtk_usb_phy_set_page(regAddr, 1); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE0); > + > + if (i < phy_data->page1_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default addr %x value %x\n", > + (phy_page_setting + i)->addr, > + (phy_page_setting + i)->data); > + } > + > + dev_info(rtk_phy->dev, > + "%s ########## to toggle PAGE1_0xE0 > BIT(2)\n", > + __func__); > + rtk_usb_phy_write(regAddr, addr, data & (~BIT(2))); > + mdelay(1); > + rtk_usb_phy_write(regAddr, addr, data | (BIT(2))); > + } else { > + dev_err(rtk_phy->dev, > + "ERROR: %s %d index=%d addr Not > PAGE1_0xE0\n", > + __func__, __LINE__, i); > + } > + > + /* update dc disconnect level after toggle */ > + update_dc_disconnect_level(rtk_phy, regAddr, phy_data, true); > + > +out: > + return; > +} > + > +static void rtk_usb2_phy_toggle(struct usb_phy *usb2_phy, bool > isConnect, int port) > +{ > + int index = port; > + struct rtk_usb_phy *rtk_phy = NULL; > + > + if (usb2_phy != NULL && usb2_phy->dev != NULL) > + rtk_phy = dev_get_drvdata(usb2_phy->dev); > + > + if (rtk_phy == NULL) { > + pr_err("%s %d ERROR! NO this device\n", __func__, > __LINE__); > + return; > + } > + if (index > rtk_phy->phyN) { > + pr_err("%s %d ERROR! port=%d > phyN=%d\n", > + __func__, __LINE__, index, rtk_phy- > >phyN); > + return; > + } > + > + do_rtk_usb2_phy_toggle(rtk_phy, index, isConnect); > +} > + > +static int rtk_usb_phy_notify_port_status(struct usb_phy *x, int > port, > + u16 portstatus, u16 portchange) > +{ > + bool isConnect = false; > + > + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", > + __func__, port, (int)portstatus, > (int)portchange); > + if (portstatus & USB_PORT_STAT_CONNECTION) > + isConnect = true; > + > + if (portchange & USB_PORT_STAT_C_CONNECTION) > + rtk_usb2_phy_toggle(x, isConnect, port); > + > + return 0; > +} > + > +#ifdef CONFIG_DEBUG_FS > +static struct dentry *create_phy_debug_root(void) > +{ > + struct dentry *phy_debug_root; > + > + phy_debug_root = debugfs_lookup("phy", usb_debug_root); > + if (!phy_debug_root) { > + phy_debug_root = debugfs_create_dir("phy", > usb_debug_root); > + if (!phy_debug_root) > + pr_err("%s Error phy_debug_root is NULL\n", > __func__); > + else > + pr_debug("%s Create phy_debug_root folder\n", > __func__); > + } > + > + return phy_debug_root; > +} > + > +static int rtk_usb2_parameter_show(struct seq_file *s, void *unused) > +{ > + struct rtk_usb_phy *rtk_phy = s->private; > + int i, index; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + struct reg_addr *regAddr = > + &((struct reg_addr *)rtk_phy- > >reg_addr)[index]; > + struct phy_data *phy_data = > + &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + struct phy_parameter *phy_page_setting; > + > + seq_printf(s, "PHY %d:\n", index); > + > + seq_puts(s, "Page 0:\n"); > + /* Set page 0 */ > + phy_page_setting = phy_data->page0; > + rtk_usb_phy_set_page(regAddr, 0); > + > + for (i = 0; i < phy_data->page0_size; i++) { > + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + u8 data = (phy_page_setting + i)->data; > + u8 value = rtk_usb_phy_read(regAddr, addr); > + > + if ((phy_page_setting + i)->addr) > + seq_printf(s, "Page 0: addr=0x%x > data=0x%02x ==> read value=0x%02x\n", > + addr, data, value); > + else > + seq_printf(s, "Page 0: addr=0x%x > data=none ==> read value=0x%02x\n", > + addr, value); > + } > + > + seq_puts(s, "Page 1:\n"); > + /* Set page 1 */ > + phy_page_setting = phy_data->page1; > + rtk_usb_phy_set_page(regAddr, 1); > + > + for (i = 0; i < phy_data->page1_size; i++) { > + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + u8 data = (phy_page_setting + i)->data; > + u8 value = rtk_usb_phy_read(regAddr, addr); > + > + if ((phy_page_setting + i)->addr) > + seq_printf(s, "Page 1: addr=0x%x > data=0x%02x ==> read value=0x%02x\n", > + addr, data, value); > + else > + seq_printf(s, "Page 1: addr=0x%x > data=none ==> read value=0x%02x\n", > + addr, value); > + } > + > + if (phy_data->page2_size == 0) > + goto out; > + > + seq_puts(s, "Page 2:\n"); > + /* Set page 2 */ > + phy_page_setting = phy_data->page2; > + rtk_usb_phy_set_page(regAddr, 2); > + > + for (i = 0; i < phy_data->page2_size; i++) { > + u8 addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + u8 data = (phy_page_setting + i)->data; > + u8 value = rtk_usb_phy_read(regAddr, addr); > + > + if ((phy_page_setting + i)->addr) > + seq_printf(s, "Page 2: addr=0x%x > data=0x%02x ==> read value=0x%02x\n", > + addr, data, value); > + else > + seq_printf(s, "Page 2: addr=0x%x > data=none ==> read value=0x%02x\n", > + addr, value); > + } > + > + seq_puts(s, "Property:\n"); > + seq_printf(s, "check_efuse: %s\n", > + phy_data- > >check_efuse?"Enable":"Disable"); > + seq_printf(s, "check_efuse_version: %d\n", > + phy_data->check_efuse_version); > + seq_printf(s, "efuse_usb_dc_cal: %d\n", > + (int)phy_data->efuse_usb_dc_cal); > + seq_printf(s, "efuse_usb_dc_cal_rate: %d\n", > + phy_data->efuse_usb_dc_cal_rate); > + seq_printf(s, "usb_dc_cal_mask: 0x%x\n", > + phy_data->usb_dc_cal_mask); > + seq_printf(s, "efuse_usb_dc_dis: %d\n", > + (int)phy_data->efuse_usb_dc_dis); > + seq_printf(s, "efuse_usb_dc_dis_rate: %d\n", > + phy_data->efuse_usb_dc_dis_rate); > + seq_printf(s, "usb_dc_dis_mask: 0x%x\n", > + phy_data->usb_dc_dis_mask); > + seq_printf(s, "usb_dc_dis_at_page0: %s\n", > + phy_data- > >usb_dc_dis_at_page0?"true":"false"); > + seq_printf(s, "do_toggle: %s\n", > + phy_data->do_toggle?"Enable":"Disable"); > + seq_printf(s, "do_toggle_driving: %s\n", > + phy_data- > >do_toggle_driving?"Enable":"Disable"); > + seq_printf(s, "disconnect_driving_updated: 0x%x\n", > + phy_data->disconnect_driving_updated); > + seq_printf(s, "use_default_parameter: %s\n", > + phy_data- > >use_default_parameter?"Enable":"Disable"); > + seq_printf(s, "is_double_sensitivity_mode: %s\n", > + phy_data- > >is_double_sensitivity_mode?"Enable":"Disable"); > + seq_printf(s, "ldo_force_enable: %s\n", > + phy_data- > >ldo_force_enable?"Enable":"Disable"); > + seq_printf(s, "ldo_enable: %s\n", > + phy_data->ldo_enable?"Enable":"Disable"); > + seq_printf(s, "ldo_page0_e4_compensate: %d\n", > + phy_data->ldo_page0_e4_compensate); > + seq_printf(s, "page0_e4_compensate: %d\n", > + phy_data->page0_e4_compensate); > + } > + > +out: > + return 0; > +} > + > +static int rtk_usb2_parameter_open(struct inode *inode, struct file > *file) > +{ > + return single_open(file, rtk_usb2_parameter_show, inode- > >i_private); > +} > + > +static const struct file_operations rtk_usb2_parameter_fops = { > + .open = rtk_usb2_parameter_open, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > +}; > + > +static int __get_parameter_at_page(struct seq_file *s, > + struct rtk_usb_phy *rtk_phy, > + struct phy_parameter *phy_parameter_array, > + const char *phy_page, const char *phy_addr) > +{ > + struct phy_parameter *phy_parameter; > + uint32_t addr; > + int i, ret; > + > + ret = kstrtouint(phy_addr, 16, &addr); > + if (ret < 0) { > + pr_err("%s::kstrtouint() failed\n", __func__); > + return -EINVAL; > + } > + i = PAGE_ADDR_MAP_ARRAY_INDEX(addr); > + phy_parameter = (phy_parameter_array + i); > + > + if (phy_parameter->addr) > + seq_printf(s, "Now Parameter %s addr 0x%02x = > 0x%02x\n", > + phy_page, phy_parameter->addr, > phy_parameter->data); > + else > + seq_printf(s, "Now Parameter %s addr 0x%02x is > default\n", > + phy_page, addr); > + > + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%02x\n", > + __func__, phy_parameter->addr, phy_parameter- > >data); > + > + return 0; > +} > + > +static int __set_parameter_at_page( > + struct rtk_usb_phy *rtk_phy, > + struct reg_addr *regAddr, struct phy_data *phy_data, > + struct phy_parameter *phy_parameter_array, > + const char *phy_page, const char *phy_addr, const char > *phy_value) > +{ > + struct phy_parameter *phy_parameter; > + uint32_t addr, value; > + int i, ret; > + > + ret = kstrtouint(phy_addr, 16, &addr); > + if (ret < 0) { > + pr_err("%s::kstrtouint() failed\n", __func__); > + return -EINVAL; > + } > + ret = kstrtouint(phy_value, 16, &value); > + if (ret < 0) { > + pr_err("%s::kstrtouint() failed\n", __func__); > + return -EINVAL; > + } > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(addr); > + phy_parameter = (phy_parameter_array + i); > + > + if (phy_parameter->addr) { > + phy_parameter->data = value; > + } else { > + phy_parameter->addr = addr; > + phy_parameter->data = value; > + } > + > + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%02x\n", > + __func__, phy_parameter->addr, phy_parameter- > >data); > + > + if (strcmp("page0", phy_page) == 0 && (addr == PAGE0_0xE4)) > + value = __updated_page0_0xe4_parameter(phy_data, > value); > + > + if (rtk_usb_phy_write(regAddr, addr, value)) > + dev_err(rtk_phy->dev, > + "[%s:%d] Error: addr=0x%02x > value=0x%02x\n", > + __func__, __LINE__, addr, value); > + > + return 0; > +} > + > +static int rtk_usb2_set_parameter_show(struct seq_file *s, void > *unused) > +{ > + struct rtk_usb_phy *rtk_phy = s->private; > + const struct file *file = s->file; > + const char *file_name = file_dentry(file)->d_iname; > + struct dentry *p_dentry = file_dentry(file)->d_parent; > + const char *dir_name = p_dentry->d_iname; > + struct dentry *pp_dentry = p_dentry->d_parent; > + const char *phy_dir_name = pp_dentry->d_iname; > + int ret, index; > + struct phy_data *phy_data; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "phy%d", index); > + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + break; > + } > + } > + if (!phy_data) { > + dev_err(rtk_phy->dev, > + "%s: No phy_data for %s/%s/%s\n", > + __func__, phy_dir_name, dir_name, > file_name); > + return -EINVAL; > + } > + > + if (strcmp("page0", dir_name) == 0) > + ret = __get_parameter_at_page(s, rtk_phy, phy_data- > >page0, > + dir_name, file_name); > + else if (strcmp("page1", dir_name) == 0) > + ret = __get_parameter_at_page(s, rtk_phy, phy_data- > >page1, > + dir_name, file_name); > + else if (strcmp("page2", dir_name) == 0) > + ret = __get_parameter_at_page(s, rtk_phy, phy_data- > >page2, > + dir_name, file_name); > + > + if (ret < 0) > + return ret; > + > + seq_puts(s, "Set phy parameter by following command\n"); > + seq_printf(s, "echo \"value\" > %s/%s/%s\n", > + phy_dir_name, dir_name, file_name); > + > + return 0; > +} > + > +static int rtk_usb2_set_parameter_open(struct inode *inode, struct > file *file) > +{ > + return single_open(file, rtk_usb2_set_parameter_show, inode- > >i_private); > +} > + > +static ssize_t rtk_usb2_set_parameter_write(struct file *file, > + const char __user *ubuf, size_t count, loff_t *ppos) > +{ > + const char *file_name = file_dentry(file)->d_iname; > + struct dentry *p_dentry = file_dentry(file)->d_parent; > + const char *dir_name = p_dentry->d_iname; > + struct dentry *pp_dentry = p_dentry->d_parent; > + const char *phy_dir_name = pp_dentry->d_iname; > + struct seq_file *s = file->private_data; > + struct rtk_usb_phy *rtk_phy = s->private; > + struct reg_addr *regAddr; > + struct phy_data *phy_data; > + int ret = 0; > + char buffer[40] = {0}; > + int index; > + > + if (copy_from_user(&buffer, ubuf, > + min_t(size_t, sizeof(buffer) - 1, count))) > + return -EFAULT; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "phy%d", index); > + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { > + regAddr = &((struct reg_addr *)rtk_phy- > >reg_addr)[index]; > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + break; > + } > + } > + if (!regAddr) { > + dev_err(rtk_phy->dev, > + "%s: No regAddr for %s/%s/%s\n", > + __func__, phy_dir_name, dir_name, > file_name); > + return -EINVAL; > + } > + if (!phy_data) { > + dev_err(rtk_phy->dev, > + "%s: No phy_data for %s/%s/%s\n", > + __func__, phy_dir_name, dir_name, > file_name); > + return -EINVAL; > + } > + > + if (strcmp("page0", dir_name) == 0) { > + rtk_usb_phy_set_page(regAddr, 0); > + ret = __set_parameter_at_page(rtk_phy, regAddr, > phy_data, > + phy_data->page0, dir_name, file_name, > buffer); > + } else if (strcmp("page1", dir_name) == 0) { > + rtk_usb_phy_set_page(regAddr, 1); > + ret = __set_parameter_at_page(rtk_phy, regAddr, > phy_data, > + phy_data->page1, dir_name, file_name, > buffer); > + } else if (strcmp("page2", dir_name) == 0) { > + rtk_usb_phy_set_page(regAddr, 2); > + ret = __set_parameter_at_page(rtk_phy, regAddr, > phy_data, > + phy_data->page2, dir_name, file_name, > buffer); > + } > + if (ret < 0) > + return ret; > + > + return count; > +} > + > +static const struct file_operations rtk_usb2_set_parameter_fops = { > + .open = rtk_usb2_set_parameter_open, > + .write = rtk_usb2_set_parameter_write, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > +}; > + > +static int rtk_usb2_toggle_show(struct seq_file *s, void *unused) > +{ > + struct rtk_usb_phy *rtk_phy = s->private; > + struct phy_data *phy_data; > + int i; > + > + for (i = 0; i < rtk_phy->phyN; i++) { > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + seq_printf(s, "Now phy#%d do_toggle is %s.\n", > + i, phy_data- > >do_toggle?"Enable":"Disable"); > + } > + seq_puts(s, "ehco 1 to enable toggle phy parameter.\n"); > + > + return 0; > +} > + > +static int rtk_usb2_toggle_open(struct inode *inode, struct file > *file) > +{ > + return single_open(file, rtk_usb2_toggle_show, inode- > >i_private); > +} > + > +static ssize_t rtk_usb2_toggle_write(struct file *file, > + const char __user *ubuf, size_t count, loff_t *ppos) > +{ > + struct seq_file *s = file->private_data; > + struct rtk_usb_phy *rtk_phy = s->private; > + char buf[32]; > + struct phy_data *phy_data; > + bool enable = false; > + int i; > + > + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, > count))) > + return -EFAULT; > + > + if (!strncmp(buf, "1", 1)) > + enable = true; > + > + for (i = 0; i < rtk_phy->phyN; i++) { > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + phy_data->do_toggle = enable; > + dev_info(rtk_phy->dev, "Set phy#%d do_toggle is > %s.\n", > + i, phy_data- > >do_toggle?"Enable":"Disable"); > + } > + > + return count; > +} > + > +static const struct file_operations rtk_usb2_toggle_fops = { > + .open = rtk_usb2_toggle_open, > + .write = rtk_usb2_toggle_write, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > +}; > + > +static int create_debug_set_parameter_files(struct rtk_usb_phy > *rtk_phy, > + struct dentry *phy_dir, const char *page, size_t > addr_size) > +{ > + struct dentry *page_dir; > + int i; > + > + page_dir = debugfs_create_dir(page, phy_dir); > + if (!page_dir) { > + dev_err(rtk_phy->dev, > + "%s Error create folder %s fail\n", > + __func__, page); > + return -EINVAL; > + } > + > + for (i = 0; i < addr_size; i++) { > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "%x", > ARRAY_INDEX_MAP_PAGE_ADDR(i)); > + > + if (!debugfs_create_file(name, 0644, > + page_dir, rtk_phy, > + &rtk_usb2_set_parameter_fops)) > + dev_err(rtk_phy->dev, > + "%s Error create file %s/%s > fail", > + page, name, __func__); > + } > + > + return 0; > +} > + > +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) > +{ > + struct dentry *phy_debug_root = NULL; > + struct dentry *set_parameter_dir = NULL; > + > + phy_debug_root = create_phy_debug_root(); > + > + if (!phy_debug_root) { > + dev_err(rtk_phy->dev, "%s Error phy_debug_root is > NULL", > + __func__); > + return; > + } > + > + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy- > >dev), > + phy_debug_root); > + if (!rtk_phy->debug_dir) { > + dev_err(rtk_phy->dev, "%s Error debug_dir is NULL", > __func__); > + return; > + } > + > + if (!debugfs_create_file("parameter", 0444, rtk_phy- > >debug_dir, rtk_phy, > + &rtk_usb2_parameter_fops)) > + goto file_error; > + > + set_parameter_dir = debugfs_create_dir("set_parameter", > + rtk_phy->debug_dir); > + if (set_parameter_dir) { > + int index, ret; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + struct dentry *phy_dir; > + struct phy_data *phy_data; > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "phy%d", index); > + > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + > + phy_dir = debugfs_create_dir(name, > set_parameter_dir); > + if (!phy_dir) { > + dev_err(rtk_phy->dev, > + "%s Error create folder > %s fail\n", > + name, __func__); > + goto file_error; > + } > + > + ret = > create_debug_set_parameter_files(rtk_phy, phy_dir, > + "page0", phy_data->page0_size); > + if (ret < 0) { > + dev_err(rtk_phy->dev, > + "%s Error create files > for page0 fail\n", > + __func__); > + goto file_error; > + } > + > + ret = > create_debug_set_parameter_files(rtk_phy, phy_dir, > + "page1", phy_data->page1_size); > + if (ret < 0) { > + dev_err(rtk_phy->dev, > + "%s Error create files > for page1 fail\n", > + __func__); > + goto file_error; > + } > + > + ret = > create_debug_set_parameter_files(rtk_phy, phy_dir, > + "page2", phy_data->page2_size); > + if (ret < 0) { > + dev_err(rtk_phy->dev, > + "%s Error create files > for page2 fail\n", > + __func__); > + goto file_error; > + } > + } > + } > + > + if (!debugfs_create_file("toggle", 0644, > + rtk_phy->debug_dir, rtk_phy, > &rtk_usb2_toggle_fops)) > + goto file_error; > + > + return; > + > +file_error: > + debugfs_remove_recursive(rtk_phy->debug_dir); > +} > + > +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) > +{ > + debugfs_remove_recursive(rtk_phy->debug_dir); > +} > +#else > +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) { > } > +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) { > } > +#endif /* CONFIG_DEBUG_FS */ > + > +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, > + struct phy_data *phy_data, int index) > +{ > + u8 value = 0; > + struct nvmem_cell *cell; > + struct soc_device_attribute rtk_soc_groot[] = { > + { .family = "Realtek Groot",}, > + { /* empty */ } > + }; > + struct soc_device_attribute rtk_soc_hank[] = { > + { .family = "Realtek Hank",}, > + { /* empty */ } > + }; > + struct soc_device_attribute rtk_soc_efuse_v1[] = { > + { .family = "Realtek Phoenix",}, > + { .family = "Realtek Kylin",}, > + { .family = "Realtek Hercules",}, > + { .family = "Realtek Thor",}, > + { .family = "Realtek Hank",}, > + { .family = "Realtek Groot",}, > + { .family = "Realtek Stark",}, > + { .family = "Realtek Parker",}, > + { /* empty */ } > + }; > + struct soc_device_attribute rtk_soc_dis_level_at_page0[] = { > + { .family = "Realtek Phoenix",}, > + { .family = "Realtek Kylin",}, > + { .family = "Realtek Hercules",}, > + { .family = "Realtek Thor",}, > + { .family = "Realtek Hank",}, > + { .family = "Realtek Groot",}, > + { /* empty */ } > + }; > + > + if (soc_device_match(rtk_soc_efuse_v1)) { > + dev_dbg(rtk_phy->dev, "Use efuse v1 to updated phy > parameter\n"); > + phy_data->check_efuse_version = CHECK_EFUSE_V1; > + } else { > + dev_dbg(rtk_phy->dev, "Use efuse v2 to updated phy > parameter\n"); > + phy_data->check_efuse_version = CHECK_EFUSE_V2; > + } > + > + if (soc_device_match(rtk_soc_dis_level_at_page0)) { > + dev_dbg(rtk_phy->dev, "Use usb_dc_dis_at_page0\\n"); > + phy_data->usb_dc_dis_at_page0 = true; > + > + phy_data->usb_dc_cal_mask = 0xf; > + phy_data->usb_dc_dis_mask = 0xf; > + > + phy_data->disconnect_driving_updated = 0xf; > + } else { > + dev_dbg(rtk_phy->dev, "No use > usb_dc_dis_at_page0\n"); > + phy_data->usb_dc_dis_at_page0 = false; > + > + phy_data->usb_dc_cal_mask = 0x1f; > + phy_data->usb_dc_dis_mask = 0xf; > + > + phy_data->disconnect_driving_updated = 0x8; > + } > + > + phy_data->efuse_usb_dc_cal_rate = EFUS_USB_DC_CAL_RATE; > + phy_data->efuse_usb_dc_dis_rate = EFUS_USB_DC_DIS_RATE; > + > + if (soc_device_match(rtk_soc_hank)) > + phy_data->efuse_usb_dc_cal_rate = 1; > + > + if (!phy_data->check_efuse) > + goto out; > + > + /* Read efuse for usb dc cal */ > + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-cal"); > + if (IS_ERR(cell)) { > + dev_warn(rtk_phy->dev, "%s failed to get usb-dc-cal: > %ld\n", > + __func__, PTR_ERR(cell)); > + } else { > + unsigned char *buf; > + size_t buf_size; > + > + buf = nvmem_cell_read(cell, &buf_size); > + > + value = buf[0] & phy_data->usb_dc_cal_mask; > + > + dev_dbg(rtk_phy->dev, > + "buf=0x%x buf_size=%d value=0x%x\n", > + buf[0], (int)buf_size, value); > + > + kfree(buf); > + nvmem_cell_put(cell); > + } > + > + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { > + int rate = phy_data->efuse_usb_dc_cal_rate; > + > + if (value <= EFUS_USB_DC_CAL_MAX) > + phy_data->efuse_usb_dc_cal = (int8_t)(value * > rate); > + else > + phy_data->efuse_usb_dc_cal = -(int8_t)( > + (EFUS_USB_DC_CAL_MAX & value) * > rate); > + > + if (soc_device_match(rtk_soc_groot)) { > + dev_info(rtk_phy->dev, "For groot IC we need > a workaround to adjust efuse_usb_dc_cal\n"); > + > + /* We don't multiple dc_cal_rate=2 for > positive dc cal compensate */ > + if (value <= EFUS_USB_DC_CAL_MAX) > + phy_data->efuse_usb_dc_cal = > (int8_t)(value); > + > + /* We set max dc cal compensate is 0x8 if otp > is 0x7 */ > + if (value == 0x7) > + phy_data->efuse_usb_dc_cal = > (int8_t)(value + 1); > + } > + } else { /* for CHECK_EFUSE_V2 */ > + phy_data->efuse_usb_dc_cal = value & phy_data- > >usb_dc_cal_mask; > + } > + > + dev_dbg(rtk_phy->dev, "Get Efuse usb_dc_cal=%d for index=%d > value=%x\n", > + phy_data->efuse_usb_dc_cal, index, value); > + > + /* Read efuse for usb dc disconnect level */ > + value = 0; > + cell = nvmem_cell_get(rtk_phy->dev, "usb-dc-dis"); > + if (IS_ERR(cell)) { > + dev_warn(rtk_phy->dev, "%s failed to get usb-dc-dis: > %ld\n", > + __func__, PTR_ERR(cell)); > + } else { > + unsigned char *buf; > + size_t buf_size; > + > + buf = nvmem_cell_read(cell, &buf_size); > + > + value = buf[0] & phy_data->usb_dc_dis_mask; > + > + dev_dbg(rtk_phy->dev, > + "buf=0x%x buf_size=%d value=0x%x\n", > + buf[0], (int)buf_size, value); > + > + kfree(buf); > + nvmem_cell_put(cell); > + } > + > + if (phy_data->check_efuse_version == CHECK_EFUSE_V1) { > + int rate = phy_data->efuse_usb_dc_dis_rate; > + > + if (value <= EFUS_USB_DC_DIS_MAX) > + phy_data->efuse_usb_dc_dis = (int8_t)(value * > rate); > + else > + phy_data->efuse_usb_dc_dis = -(int8_t)( > + (EFUS_USB_DC_DIS_MAX & value) * > rate); > + } else { /* for CHECK_EFUSE_V2 */ > + phy_data->efuse_usb_dc_dis = value & phy_data- > >usb_dc_dis_mask; > + } > + > + dev_dbg(rtk_phy->dev, "Get Efuse usb_dc_dis=%d for index=%d > value=%x\n", > + phy_data->efuse_usb_dc_dis, index, value); > + > +out: > + return 0; > +} > + > +/* Get default phy parameter for update by efuse or > ldo_page0_e4_compensate */ > +static int __get_default_phy_parameter_for_updated( > + struct rtk_usb_phy *rtk_phy, int index) > +{ > + int i; > + struct reg_addr *regAddr; > + struct phy_data *phy_data; > + struct phy_parameter *phy_page_setting; > + > + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; > + phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; > + > + /* Get PAGE0_0xE4 default value */ > + if (phy_data->efuse_usb_dc_cal || phy_data- > >ldo_page0_e4_compensate || > + (phy_data->efuse_usb_dc_dis && phy_data- > >usb_dc_dis_at_page0)) { > + phy_page_setting = phy_data->page0; > + rtk_usb_phy_set_page(regAddr, 0); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE0_0xE4); > + if (i < phy_data->page0_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, > addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default addr %x > value %x\n", > + (phy_page_setting + i)- > >addr, > + (phy_page_setting + i)- > >data); > + } > + } > + } > + > + /* Get PAGE1_0xE2 default value */ > + if (phy_data->efuse_usb_dc_dis && !phy_data- > >usb_dc_dis_at_page0) { > + phy_page_setting = phy_data->page1; > + rtk_usb_phy_set_page(regAddr, 1); > + > + i = PAGE_ADDR_MAP_ARRAY_INDEX(PAGE1_0xE2); > + if (i < phy_data->page1_size) { > + u8 addr = (phy_page_setting + i)->addr; > + u8 data = (phy_page_setting + i)->data; > + > + if (!addr) { > + addr = ARRAY_INDEX_MAP_PAGE_ADDR(i); > + data = rtk_usb_phy_read(regAddr, > addr); > + > + (phy_page_setting + i)->addr = addr; > + (phy_page_setting + i)->data = data; > + dev_dbg(rtk_phy->dev, > + "Get default page1 addr > %x value %x\n", > + (phy_page_setting + i)- > >addr, > + (phy_page_setting + i)- > >data); > + } > + } > + } > + > + return 0; > +} > + > +static int __get_phy_parameter_v1(struct device *dev, struct > phy_data *phy_data, > + struct device_node *sub_node) > +{ > + int phy_data_page0_size, phy_data_page1_size; > + int phy_data_page2_size; > + char tmp_addr[MAX_PHY_DATA_SIZE]; > + char tmp_data[MAX_PHY_DATA_SIZE]; > + int i, chip_revision, revision, ret = 0; > + > + chip_revision = __get_chip_revision(); > + > + dev_dbg(dev, "%s: Chip revision is %x\n", __func__, > chip_revision); > + > + ret = of_property_read_u32_index(sub_node, > + "realtek,phy-data-page0-size", 0, > &phy_data_page0_size); > + if (ret) > + goto err; > + > + ret = of_property_read_u32_index(sub_node, > + "realtek,phy-data-page1-size", 0, > &phy_data_page1_size); > + if (ret) > + goto err; > + > + dev_dbg(dev, "%s %d phy_data_page0_size=%d, > phy_data_page1_size=%d\n", > + __func__, __LINE__, > + phy_data_page0_size, phy_data_page1_size); > + > + if (phy_data_page0_size > MAX_PHY_DATA_SIZE || > + phy_data_page1_size > MAX_PHY_DATA_SIZE) { > + dev_err(dev, "%s phy_data size > > MAX_PHY_DATA_SIZE\n", > + __func__); > + goto err; > + } > + > + ret = of_property_read_u32_index(sub_node, > + "realtek,phy-data-page2-size", 0, > &phy_data_page2_size); > + if (ret) > + phy_data_page2_size = 0; > + dev_dbg(dev, "%s %d phy_data_page2_size=%d\n", > + __func__, __LINE__, > + phy_data_page2_size); > + > + if (phy_data_page2_size > MAX_PHY_DATA_SIZE) { > + dev_err(dev, "%s page2 phy_data size=%d > > MAX_PHY_DATA_SIZE\n", > + __func__, phy_data_page2_size); > + goto err; > + } > + > + phy_data->page0_size = phy_data_page0_size; > + phy_data->page0 = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * > + phy_data_page0_size, > + GFP_KERNEL); > + if (!phy_data->page0) { > + ret = -ENOMEM; > + goto err; > + } > + > + phy_data->page1_size = phy_data_page1_size; > + phy_data->page1 = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * > + phy_data_page1_size, > + GFP_KERNEL); > + if (!phy_data->page1) { > + ret = -ENOMEM; > + goto err; > + } > + > + phy_data->page2_size = phy_data_page2_size; > + if (phy_data->page2_size > 0) { > + phy_data->page2 = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * > + phy_data->page2_size, > + GFP_KERNEL); > + if (!phy_data->page2) { > + ret = -ENOMEM; > + goto err; > + } > + } > + > + ret = of_property_read_u8_array(sub_node, "realtek,phy-data- > page0-addr", > + tmp_addr, phy_data_page0_size); > + if (ret) > + goto err; > + > + revision = chip_revision; > + while (revision >= DEFAULT_CHIP_REVISION) { > + char phy_data_revision[32] = {0}; > + > + snprintf(phy_data_revision, 27, "realtek,phy-data- > page0-%X", revision); > + > + ret = of_property_read_u8_array(sub_node, > phy_data_revision, > + tmp_data, phy_data_page0_size); > + if (!ret) { > + dev_dbg(dev, "%s load %s parameter\n", > + __func__, phy_data_revision); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + } > + > + /* For old device tree */ > + if (ret) { > + ret = of_property_read_u8_array(sub_node, > "realtek,phy-data-page0-data", > + tmp_data, phy_data_page0_size); > + if (ret) > + goto err; > + else > + dev_info(dev, "%s load page0 parameter\n", > + __func__); > + } > + > + for (i = 0; i < phy_data_page0_size; i++) { > + struct phy_parameter *phy_data_page0 = > + (phy_data->page0 + i); > + > + phy_data_page0->addr = tmp_addr[i]; > + phy_data_page0->data = tmp_data[i]; > + } > + > + ret = of_property_read_u8_array(sub_node, "realtek,phy-data- > page1-addr", > + tmp_addr, phy_data_page1_size); > + if (ret) > + goto err; > + > + revision = chip_revision; > + while (revision >= DEFAULT_CHIP_REVISION) { > + char phy_data_revision[32] = {0}; > + > + snprintf(phy_data_revision, 27, "realtek,phy-data- > page1-%X", revision); > + > + ret = of_property_read_u8_array(sub_node, > phy_data_revision, > + tmp_data, phy_data_page1_size); > + if (!ret) { > + dev_dbg(dev, "%s load %s parameter\n", > + __func__, phy_data_revision); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + } > + > + /* For old device tree */ > + if (ret) { > + ret = of_property_read_u8_array(sub_node, > "realtek,phy-data-page1-data", > + tmp_data, phy_data_page1_size); > + if (ret) > + goto err; > + else > + dev_info(dev, "%s load page1 parameter\n", > + __func__); > + } > + > + for (i = 0; i < phy_data_page1_size; i++) { > + struct phy_parameter *phy_data_page1 = > + (phy_data->page1 + i); > + > + phy_data_page1->addr = tmp_addr[i]; > + phy_data_page1->data = tmp_data[i]; > + } > + > + if (phy_data->page2_size > 0) { > + ret = of_property_read_u8_array(sub_node, > + "realtek,phy-data-page2-addr", > + tmp_addr, phy_data->page2_size); > + if (ret) > + goto err; > + > + revision = chip_revision; > + while (revision >= DEFAULT_CHIP_REVISION) { > + char phy_data_revision[32] = {0}; > + > + snprintf(phy_data_revision, 27, "realtek,phy- > data-page2-%X", > + revision); > + > + ret = of_property_read_u8_array(sub_node, > + phy_data_revision, > + tmp_data, phy_data_page2_size); > + if (!ret) { > + dev_dbg(dev, "%s load %s > parameter\n", > + __func__, > phy_data_revision); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + } > + > + /* For old device tree */ > + if (ret) { > + ret = of_property_read_u8_array(sub_node, > + "realtek,phy-data-page2-data", > + tmp_data, phy_data->page2_size); > + if (ret) > + goto err; > + else > + dev_info(dev, "%s load page2 > parameter\n", > + __func__); > + } > + for (i = 0; i < phy_data->page2_size; i++) { > + struct phy_parameter *phy_data_page2 = > + (phy_data->page2 + i); > + phy_data_page2->addr = tmp_addr[i]; > + phy_data_page2->data = tmp_data[i]; > + } > + } > + > +err: > + return ret; > +} > + > +static int __get_phy_parameter_v2(struct device *dev, struct > phy_data *phy_data, > + struct device_node *sub_node) > +{ > + u32 page_size = 0; > + u32 num_cells = 2; /*< addr value > */ > + u32 data_size; > + int i, offset, chip_revision, revision, ret = 0; > + char phy_data_revision[32] = {0}; > + > + chip_revision = __get_chip_revision(); > + > + /* Page 0 */ > + ret = of_property_read_u32_index(sub_node, "realtek,page0- > size", 0, &page_size); > + if (ret) { > + dev_err(dev, "%s No page0_size\n", __func__); > + goto parse_page1; > + } > + > + phy_data->page0_size = page_size; > + phy_data->page0 = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * page_size, > GFP_KERNEL); > + if (!phy_data->page0) { > + ret = -ENOMEM; > + goto out; > + } > + > + revision = chip_revision; > + while (revision >= DEFAULT_CHIP_REVISION) { > + snprintf(phy_data_revision, 23, "realtek,page0-data- > %X", revision); > + > + if (of_get_property(sub_node, phy_data_revision, > &data_size)) { > + dev_dbg(dev, "%s load %s parameter > (data_size=%d)\n", > + __func__, phy_data_revision, > data_size); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + > + data_size = 0; > + ret = 0; > + } > + data_size = data_size / (sizeof(u32) * num_cells); > + > + for (i = 0; i < data_size; i++) { > + struct phy_parameter *phy_data_page; > + u32 addr, data; > + int index; > + > + offset = i * num_cells; > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset, &addr); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, addr); > + break; > + } > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset + 1, &data); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, data); > + break; > + } > + > + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); > + phy_data_page = (phy_data->page0 + index); > + phy_data_page->addr = (char)addr; > + phy_data_page->data = (char)data; > + > + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", > + phy_data_revision, index, > + phy_data_page->addr, phy_data_page- > >data); > + } > + > +parse_page1: > + /* Page 1 */ > + ret = of_property_read_u32_index(sub_node, "realtek,page1- > size", 0, &page_size); > + if (ret) { > + dev_err(dev, "%s No page0_size\n", __func__); > + goto parse_page2; > + } > + > + phy_data->page1_size = page_size; > + phy_data->page1 = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * page_size, > GFP_KERNEL); > + if (!phy_data->page1) { > + ret = -ENOMEM; > + goto out; > + } > + > + revision = chip_revision; > + while (revision >= DEFAULT_CHIP_REVISION) { > + snprintf(phy_data_revision, 23, "realtek,page1- > data_%X", revision); > + > + if (of_get_property(sub_node, phy_data_revision, > &data_size)) { > + dev_dbg(dev, "%s load %s parameter > (data_size=%d)\n", > + __func__, phy_data_revision, > data_size); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + > + data_size = 0; > + ret = 0; > + } > + data_size = data_size / (sizeof(u32) * num_cells); > + > + for (i = 0; i < data_size; i++) { > + struct phy_parameter *phy_data_page; > + u32 addr, data; > + int index; > + > + offset = i * num_cells; > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset, &addr); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, addr); > + break; > + } > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset + 1, &data); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, data); > + break; > + } > + > + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); > + phy_data_page = phy_data->page1 + index; > + phy_data_page->addr = (char)addr; > + phy_data_page->data = (char)data; > + > + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", > + phy_data_revision, index, > + phy_data_page->addr, phy_data_page- > >data); > + } > + > +parse_page2: > + /* Page 2 */ > + ret = of_property_read_u32_index(sub_node, "realtek,page2- > size", 0, &page_size); > + if (ret) { > + dev_dbg(dev, "%s No page2_size\n", __func__); > + goto out; > + } > + > + phy_data->page2_size = page_size; > + phy_data->page2 = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * page_size, > GFP_KERNEL); > + if (!phy_data->page2) { > + ret = -ENOMEM; > + goto out; > + } > + > + revision = chip_revision; > + while (revision >= DEFAULT_CHIP_REVISION) { > + snprintf(phy_data_revision, 23, "realtek,page2-data- > %X", revision); > + > + if (of_get_property(sub_node, phy_data_revision, > &data_size)) { > + dev_dbg(dev, "%s load %s parameter > (data_size=%d)\n", > + __func__, phy_data_revision, > data_size); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + > + data_size = 0; > + ret = 0; > + } > + data_size = data_size / (sizeof(u32) * num_cells); > + > + for (i = 0; i < data_size; i++) { > + struct phy_parameter *phy_data_page; > + u32 addr, data; > + int index; > + > + offset = i * num_cells; > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset, &addr); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, addr); > + break; > + } > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset + 1, &data); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, data); > + break; > + } > + > + index = PAGE_ADDR_MAP_ARRAY_INDEX(addr); > + phy_data_page = phy_data->page2 + index; > + phy_data_page->addr = (char)addr; > + phy_data_page->data = (char)data; > + > + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", > + phy_data_revision, index, > + phy_data_page->addr, phy_data_page- > >data); > + } > + > +out: > + return ret; > +} > + > +static int __get_phy_parameter(struct rtk_usb_phy *rtk_phy, int > index) > +{ > + struct device *dev = rtk_phy->dev; > + struct reg_addr *addr = > + &((struct reg_addr *)rtk_phy->reg_addr)[index]; > + struct phy_data *phy_data = > + &((struct phy_data *)rtk_phy->phy_data)[index]; > + char phy_name[5], phy_name_v2[10]; > + struct device_node *sub_node; > + int ret = 0; > + > + addr->reg_wrap_vstatus = of_iomap(dev->of_node, 0); > + addr->reg_gusb2phyacc0 = of_iomap(dev->of_node, index + 1); > + addr->vstatus_index = index; > + dev_dbg(dev, "%s %d #%d reg_wrap_vstatus=%p\n", > + __func__, __LINE__, > + index, addr->reg_wrap_vstatus); > + dev_dbg(dev, "%s %d #%d reg_gusb2phyacc0=%p\n", > + __func__, __LINE__, > + index, addr->reg_gusb2phyacc0); > + > + snprintf(phy_name, 5, "phy%d", index); > + > + sub_node = of_get_child_by_name(dev->of_node, phy_name); > + if (sub_node) { > + dev_dbg(dev, "%s %d: #%d Get phy data v1 sub_node for > %s\n", > + __func__, __LINE__, index, phy_name); > + ret = __get_phy_parameter_v1(dev, phy_data, > sub_node); > + if (ret) > + goto err; > + } else { > + snprintf(phy_name_v2, 10, "phy%d_data", index); > + sub_node = of_get_child_by_name(dev->of_node, > phy_name_v2); > + if (sub_node) { > + dev_dbg(dev, "%s %d: #%d Get phy data v2 > sub_node for %s\n", > + __func__, __LINE__, index, phy_name_v2); > + ret = __get_phy_parameter_v2(dev, phy_data, > sub_node); > + if (ret) > + goto err; > + } > + } > + > + if (!sub_node) > + goto err; > + > + if (of_property_read_bool(sub_node, "realtek,do-toggle")) > + phy_data->do_toggle = true; > + else > + phy_data->do_toggle = false; > + > + if (of_property_read_bool(sub_node, "realtek,do-toggle- > driving")) > + phy_data->do_toggle_driving = true; > + else > + phy_data->do_toggle_driving = false; > + > + if (of_property_read_bool(sub_node, "realtek,check-efuse")) > + phy_data->check_efuse = true; > + else > + phy_data->check_efuse = false; > + > + if (of_property_read_bool(sub_node, "realtek,use-default- > parameter")) > + phy_data->use_default_parameter = true; > + else > + phy_data->use_default_parameter = false; > + > + if (of_property_read_bool(sub_node, > + "realtek,is-double-sensitivity-mode")) > + phy_data->is_double_sensitivity_mode = true; > + else > + phy_data->is_double_sensitivity_mode = false; > + > + if (of_property_read_bool(sub_node, > + "realtek,ldo-force-enable")) > + phy_data->ldo_force_enable = true; > + else > + phy_data->ldo_force_enable = false; > + > + if (of_property_read_s32(sub_node, > + "realtek,ldo-page0-e4-compensate", &phy_data- > >ldo_page0_e4_compensate)) > + phy_data->ldo_page0_e4_compensate = 0; > + > + if (of_property_read_s32(sub_node, > + "realtek,page0-e4-compensate", &phy_data- > >page0_e4_compensate)) > + phy_data->page0_e4_compensate = 0; > + > + __get_phy_parameter_by_efuse(rtk_phy, phy_data, index); > + > + __get_default_phy_parameter_for_updated(rtk_phy, index); > +err: > + return ret; > +} > + > +static int rtk_usb2phy_probe(struct platform_device *pdev) > +{ > + struct rtk_usb_phy *rtk_phy; > + struct device *dev = &pdev->dev; > + int index, ret = 0; > + int port_index, phyN; > + > + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); > + if (!rtk_phy) > + return -ENOMEM; > + > + rtk_phy->dev = &pdev->dev; > + rtk_phy->phy.dev = rtk_phy->dev; > + rtk_phy->phy.label = RTK_USB2PHY_NAME; > + rtk_phy->phy.init = rtk_usb_phy_init; > + rtk_phy->phy.shutdown = rtk_usb_phy_shutdown; > + rtk_phy->phy.notify_port_status = > rtk_usb_phy_notify_port_status; > + > + if (!dev->of_node) { > + dev_err(dev, "%s %d No device node\n", __func__, > __LINE__); > + goto err; > + } > + > + rtk_phy->usb_regs = syscon_regmap_lookup_by_phandle(dev- > >of_node, "realtek,usb"); > + if (IS_ERR(rtk_phy->usb_regs)) { > + dev_info(dev, "%s: DTS no support usb regs syscon\n", > __func__); > + rtk_phy->usb_regs = NULL; > + } > + > + rtk_phy->mac_regs = syscon_regmap_lookup_by_phandle(dev- > >of_node, "realtek,mac"); > + if (IS_ERR(rtk_phy->mac_regs)) { > + dev_info(dev, "%s: DTS no support mac regs syscon\n", > __func__); > + rtk_phy->mac_regs = NULL; > + } > + > + rtk_phy->usb_ctrl_regs = syscon_regmap_lookup_by_phandle(dev- > >of_node, "realtek,usb_ctrl"); > + if (IS_ERR(rtk_phy->usb_ctrl_regs)) { > + dev_info(dev, "%s: DTS no support usb_ctrl regs > syscon\n", __func__); > + rtk_phy->usb_ctrl_regs = NULL; > + } > + > + ret = of_property_read_u32_index(dev->of_node, "realtek,port- > index", 0, > + &port_index); > + if (ret) > + port_index = -1; > + > + ret = of_property_read_u32_index(dev->of_node, > "realtek,phyN", 0, > + &phyN); > + if (ret) { > + dev_err(dev, "%s get phyN fail (ret=%d)\n", __func__, > ret); > + goto err; > + } > + > + dev_dbg(dev, "%s port_index=%d phyN=%d\n", __func__, > port_index, phyN); > + > + rtk_phy->port_index = port_index; > + rtk_phy->phyN = phyN; > + rtk_phy->reg_addr = devm_kzalloc(dev, > + sizeof(struct reg_addr) * phyN, GFP_KERNEL); > + if (!rtk_phy->reg_addr) > + return -ENOMEM; > + > + rtk_phy->phy_data = devm_kzalloc(dev, > + sizeof(struct phy_data) * phyN, GFP_KERNEL); > + if (!rtk_phy->phy_data) > + return -ENOMEM; > + > + for (index = 0; index < phyN; index++) { > + ret = __get_phy_parameter(rtk_phy, index); > + if (ret) { > + dev_err(dev, "%s: __get_phy_parameter fail > ret=%d\n", > + __func__, ret); > + goto err; > + } > + } > + > + platform_set_drvdata(pdev, rtk_phy); > + > + ret = usb_add_phy_dev(&rtk_phy->phy); > + if (ret) > + goto err; > + > + create_debug_files(rtk_phy); > + > +err: > + dev_dbg(dev, "Probe RTK USB 2.0 PHY (ret=%d)\n", ret); > + > + return ret; > +} > + > +static int rtk_usb2phy_remove(struct platform_device *pdev) > +{ > + struct rtk_usb_phy *rtk_phy = platform_get_drvdata(pdev); > + > + remove_debug_files(rtk_phy); > + > + usb_remove_phy(&rtk_phy->phy); > + > + return 0; > +} > + > +#ifdef CONFIG_OF > +static const struct of_device_id usbphy_rtk_dt_match[] = { > + { .compatible = "realtek,usb2phy", }, > + { .compatible = "realtek,rtd-usb2phy", }, > + { .compatible = "realtek,rtd1295-usb2phy", }, > + { .compatible = "realtek,rtd1395-usb2phy", }, > + { .compatible = "realtek,rtd1619-usb2phy", }, > + { .compatible = "realtek,rtd1319-usb2phy", }, > + { .compatible = "realtek,rtd1619b-usb2phy", }, > + { .compatible = "realtek,rtd1312c-usb2phy", }, > + { .compatible = "realtek,rtd1319d-usb2phy", }, > + { .compatible = "realtek,rtd1315e-usb2phy", }, > + {}, > +}; > +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); > +#endif > + > +static struct platform_driver rtk_usb2phy_driver = { > + .probe = rtk_usb2phy_probe, > + .remove = rtk_usb2phy_remove, > + .driver = { > + .name = RTK_USB2PHY_NAME, > + .owner = THIS_MODULE, > + .of_match_table = of_match_ptr(usbphy_rtk_dt_match), > + }, > +}; > + > +module_platform_driver(rtk_usb2phy_driver); > + > +MODULE_LICENSE("GPL"); > +MODULE_ALIAS("platform:" RTK_USB2PHY_NAME); > +MODULE_AUTHOR("Realtek Semiconductor Corporation"); > +MODULE_DESCRIPTION("RTK usb 2.0 phy driver"); > diff --git a/drivers/usb/phy/phy-rtk-usb3.c b/drivers/usb/phy/phy- > rtk-usb3.c > new file mode 100644 > index 000000000000..dd669fd75ee6 > --- /dev/null > +++ b/drivers/usb/phy/phy-rtk-usb3.c > @@ -0,0 +1,1165 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * phy-rtk-usb3.c RTK usb3.0 phy driver > + * > + * copyright (c) 2023 realtek semiconductor corporation > + * > + */ > + > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/of_device.h> > +#include <linux/of_address.h> > +#include <linux/uaccess.h> > +#include <linux/debugfs.h> > +#include <linux/nvmem-consumer.h> > +#include <linux/regmap.h> > +#include <linux/sys_soc.h> > +#include <linux/mfd/syscon.h> > +#include <linux/usb.h> > +#include <linux/usb/hcd.h> > +#include <linux/usb/phy.h> > + > +#include "phy-rtk-usb.h" > + > +#define RTK_USB3PHY_NAME "rtk-usb3phy" > + > +#define USB_MDIO_CTRL_PHY_BUSY BIT(7) > +#define USB_MDIO_CTRL_PHY_WRITE BIT(0) > +#define USB_MDIO_CTRL_PHY_ADDR_SHIFT 8 > +#define USB_MDIO_CTRL_PHY_DATA_SHIFT 16 > + > +#define PHY_ADDR_0x09 0x09 > +#define PHY_ADDR_0x0B 0x0B > +#define PHY_ADDR_0x0D 0x0D > +#define PHY_ADDR_0x10 0x10 > +#define PHY_ADDR_0x1F 0x1F > +#define PHY_ADDR_0x20 0x20 > +#define PHY_ADDR_0x30 0x30 > + > +#define REG_0x0B_RX_OFFSET_RANGE_MASK 0xC > +#define REG_0x0D_RX_DEBUG_TEST_EN BIT(6) > +#define REG_0x10_DEBUG_MODE_SETTING 0x3C0 > +#define REG_0x10_DEBUG_MODE_SETTING_MASK 0x3F8 > +#define REG_0x1F_RX_OFFSET_CODE_MASK 0x1E > + > +#define USB_U3_TX_LFPS_SWING_TRIM_SHIFT 4 > +#define USB_U3_TX_LFPS_SWING_TRIM_MASK 0xF > + > +#define PHY_ADDR_MAP_ARRAY_INDEX(addr) (addr) > +#define ARRAY_INDEX_MAP_PHY_ADDR(index) (index) > + > +#define WRAP_CTR_reg 0x0 > +#define PIPE3_POWER_DOWN_SEL BIT(10) > + > +struct reg_addr { > + void __iomem *reg_mdio_ctl; > +}; > + > +struct phy_parameter { > + u8 addr; > + u16 data; > +}; > + > +struct phy_data { > + int size; > + struct phy_parameter *parameter; > + > + bool check_efuse; > + u8 efuse_usb_u3_tx_lfps_swing_trim; > + bool do_toggle; > + bool do_toggle_once; > + bool use_default_parameter; > + bool check_rx_front_end_offset; > +}; > + > +static int rtk_usb_phy3_wait_vbusy(struct reg_addr *regAddr) > +{ > + return utmi_wait_register(regAddr->reg_mdio_ctl, > USB_MDIO_CTRL_PHY_BUSY, 0); > +} > + > +static u16 rtk_usb_phy_read(struct reg_addr *regAddr, char addr) > +{ > + unsigned int regVal; > + u32 value; > + > + regVal = (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT); > + > + writel(regVal, regAddr->reg_mdio_ctl); > + > + rtk_usb_phy3_wait_vbusy(regAddr); > + > + value = readl(regAddr->reg_mdio_ctl); > + value = value >> USB_MDIO_CTRL_PHY_DATA_SHIFT; > + > + return (u16)value; > +} > + > +static int rtk_usb_phy_write(struct reg_addr *regAddr, char addr, > u16 data) > +{ > + unsigned int regVal; > + > + regVal = USB_MDIO_CTRL_PHY_WRITE | > + (addr << USB_MDIO_CTRL_PHY_ADDR_SHIFT) | > + (data << USB_MDIO_CTRL_PHY_DATA_SHIFT); > + > + writel(regVal, regAddr->reg_mdio_ctl); > + > + rtk_usb_phy3_wait_vbusy(regAddr); > + > + return 0; > +} > + > +static void do_rtk_usb3_phy_toggle(struct rtk_usb_phy *rtk_phy, > + int index, bool isConnect); > + > +static int do_rtk_usb_phy_init(struct rtk_usb_phy *rtk_phy, int > phy_index) > +{ > + struct reg_addr *regAddr = > + &((struct reg_addr *)rtk_phy- > >reg_addr)[phy_index]; > + struct phy_data *phy_data = > + &((struct phy_data *)rtk_phy- > >phy_data)[phy_index]; > + int index = 0; > + struct phy_parameter *phy_parameter = phy_data->parameter; > + > + dev_dbg(rtk_phy->dev, "%s: init phy#%d\n", __func__, > phy_index); > + > + if (phy_data->use_default_parameter) { > + dev_info(rtk_phy->dev, "%s phy#%d use default > parameter\n", > + __func__, phy_index); > + goto do_toggle; > + } > + > + for (index = 0; index < phy_data->size; index++) { > + u8 addr = (phy_parameter + index)->addr; > + u16 data = (phy_parameter + index)->data; > + > + if (addr == 0xFF) > + continue; > + > + if (addr == PHY_ADDR_0x20) { > + u8 efuse_val = phy_data- > >efuse_usb_u3_tx_lfps_swing_trim; > + u16 val_mask = > USB_U3_TX_LFPS_SWING_TRIM_MASK; > + int val_shift = > USB_U3_TX_LFPS_SWING_TRIM_SHIFT; > + > + if (efuse_val) { > + data &= ~(val_mask << val_shift); > + data |= ((efuse_val & val_mask) << > val_shift); > + } > + } > + > + rtk_usb_phy_write(regAddr, addr, data); > + } > + > + for (index = 0; index < phy_data->size; index++) { > + u8 addr = (phy_parameter + index)->addr; > + u16 data = (phy_parameter + index)->data; > + > + if (addr == 0xFF) > + continue; > + > + dev_dbg(rtk_phy->dev, "[USB3_PHY], addr = 0x%02x, > data = 0x%04x ==> read value = 0x%04x\n", > + addr, data, > + rtk_usb_phy_read(regAddr, addr)); > + } > + > +do_toggle: > + if (phy_data->do_toggle_once) > + phy_data->do_toggle = true; > + > + do_rtk_usb3_phy_toggle(rtk_phy, phy_index, false); > + > + if (phy_data->do_toggle_once) { > + u16 check_value = 0; > + int count = 10; > + u16 value_0x0D, value_0x10; > + > + /* Enable Debug mode by set 0x0D and 0x10 */ > + value_0x0D = rtk_usb_phy_read(regAddr, > PHY_ADDR_0x0D); > + value_0x10 = rtk_usb_phy_read(regAddr, > PHY_ADDR_0x10); > + > + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0D, > + value_0x0D | REG_0x0D_RX_DEBUG_TEST_EN); > + rtk_usb_phy_write(regAddr, PHY_ADDR_0x10, > + (value_0x10 & > ~REG_0x10_DEBUG_MODE_SETTING_MASK) | > + REG_0x10_DEBUG_MODE_SETTING); > + > + check_value = rtk_usb_phy_read(regAddr, > PHY_ADDR_0x30); > + > + while (!(check_value & BIT(15))) { > + check_value = rtk_usb_phy_read(regAddr, > PHY_ADDR_0x30); > + mdelay(1); > + if (count-- < 0) > + break; > + } > + > + if (!(check_value & BIT(15))) > + dev_info(rtk_phy->dev, "toggle fail > addr=0x%02x, data=0x%04x\n", > + PHY_ADDR_0x30, check_value); > + else > + dev_info(rtk_phy->dev, "toggle okay > addr=0x%02x, data=0x%04x\n", > + PHY_ADDR_0x30, check_value); > + > + /* Disable Debug mode by set 0x0D and 0x10 to > default*/ > + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0D, > value_0x0D); > + rtk_usb_phy_write(regAddr, PHY_ADDR_0x10, > value_0x10); > + > + phy_data->do_toggle = false; > + } > + > + > + if (phy_data->check_rx_front_end_offset) { > + u16 rx_offset_code, rx_offset_range; > + bool do_update = false; > + > + rx_offset_code = rtk_usb_phy_read(regAddr, > PHY_ADDR_0x1F); > + if (((rx_offset_code & REG_0x1F_RX_OFFSET_CODE_MASK) > == 0x0) || > + ((rx_offset_code & > REG_0x1F_RX_OFFSET_CODE_MASK) == > + REG_0x1F_RX_OFFSET_CODE_MASK)) > + do_update = true; > + > + rx_offset_range = rtk_usb_phy_read(regAddr, > PHY_ADDR_0x0B); > + if (((rx_offset_range & > REG_0x0B_RX_OFFSET_RANGE_MASK) == > + REG_0x0B_RX_OFFSET_RANGE_MASK) && > do_update) { > + dev_warn(rtk_phy->dev, "Don't update > rx_offset_range (rx_offset_code=0x%x, rx_offset_range=0x%x)\n", > + rx_offset_code, rx_offset_range); > + do_update = false; > + } > + > + if (do_update) { > + u16 tmp1, tmp2; > + > + tmp1 = rx_offset_range & > (~REG_0x0B_RX_OFFSET_RANGE_MASK); > + tmp2 = rx_offset_range & > REG_0x0B_RX_OFFSET_RANGE_MASK; > + tmp2 += (1 << 2); > + rx_offset_range = tmp1 | (tmp2 & > REG_0x0B_RX_OFFSET_RANGE_MASK); > + rtk_usb_phy_write(regAddr, PHY_ADDR_0x0B, > rx_offset_range); > + goto do_toggle; > + } > + } > + > + return 0; > +} > + > +static int rtk_usb_phy_init(struct usb_phy *phy) > +{ > + struct rtk_usb_phy *rtk_phy = container_of(phy, struct > rtk_usb_phy, phy); > + int ret = 0; > + int i; > + unsigned long phy_init_time = jiffies; > + > + if (!rtk_phy) { > + pr_err("%s rtk_phy is NULL!\n", __func__); > + return -ENODEV; > + } > + > + dev_dbg(phy->dev, "Init RTK USB 3.0 PHY\n"); > + for (i = 0; i < rtk_phy->phyN; i++) > + ret = do_rtk_usb_phy_init(rtk_phy, i); > + > + dev_info(phy->dev, "Initialized RTK USB 3.0 PHY (take > %dms)\n", > + jiffies_to_msecs(jiffies - phy_init_time)); > + return ret; > +} > + > +static void rtk_usb_phyhutdown(struct usb_phy *phy) > +{ > + dev_dbg(phy->dev, "Shutdown RTK USB 3.0 PHY\n"); > +} > + > +static void do_rtk_usb3_phy_toggle(struct rtk_usb_phy *rtk_phy, int > i, > + bool isConnect) > +{ > + struct reg_addr *regAddr = &((struct reg_addr *)rtk_phy- > >reg_addr)[i]; > + struct phy_data *phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + struct phy_parameter *phy_parameter; > + size_t index; > + > + if (!rtk_phy) { > + pr_err("%s rtk_phy is NULL!\n", __func__); > + return; > + } > + > + regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[i]; > + phy_data = &((struct phy_data *)rtk_phy->phy_data)[i]; > + > + if (!phy_data) { > + dev_err(rtk_phy->dev, "%s phy_data is NULL!\n", > __func__); > + return; > + } > + > + if (!phy_data->do_toggle) > + return; > + > + /* Disable usb3 phy suspend form usb wrapper */ > + if (rtk_phy->usb_regs) > + regmap_update_bits(rtk_phy->usb_regs, WRAP_CTR_reg, > + (unsigned int)PIPE3_POWER_DOWN_SEL, > + (unsigned int)PIPE3_POWER_DOWN_SEL); > + > + phy_parameter = phy_data->parameter; > + > + index = PHY_ADDR_MAP_ARRAY_INDEX(PHY_ADDR_0x09); > + > + if (index < phy_data->size) { > + u8 addr = (phy_parameter + index)->addr; > + u16 data = (phy_parameter + index)->data; > + > + if (addr == 0xFF) { > + addr = ARRAY_INDEX_MAP_PHY_ADDR(index); > + data = rtk_usb_phy_read(regAddr, addr); > + (phy_parameter + index)->addr = addr; > + (phy_parameter + index)->data = data; > + } > + mdelay(1); > + dev_info(rtk_phy->dev, > + "%s ########## to toggle PHY addr 0x09 > BIT(9)\n", > + __func__); > + rtk_usb_phy_write(regAddr, addr, data&(~BIT(9))); > + mdelay(1); > + rtk_usb_phy_write(regAddr, addr, data); > + } > + dev_info(rtk_phy->dev, "%s ########## PHY addr 0x1f = > 0x%04x\n", > + __func__, rtk_usb_phy_read(regAddr, > PHY_ADDR_0x1F)); > + > + /* Enable usb3 phy suspend form usb wrapper, power control by > mac */ > + if (rtk_phy->usb_regs) > + regmap_update_bits(rtk_phy->usb_regs, WRAP_CTR_reg, > + (unsigned int)PIPE3_POWER_DOWN_SEL, > + (unsigned int)(~PIPE3_POWER_DOWN_SEL)); > +} > + > +static void rtk_usb3_phy_toggle(struct usb_phy *usb3_phy, bool > isConnect, int port) > +{ > + int index = port; > + struct rtk_usb_phy *rtk_phy = NULL; > + > + if (usb3_phy != NULL && usb3_phy->dev != NULL) > + rtk_phy = dev_get_drvdata(usb3_phy->dev); > + > + if (rtk_phy == NULL) { > + pr_err("%s ERROR! NO this device\n", __func__); > + return; > + } > + > + if (index > rtk_phy->phyN) { > + pr_err("%s %d ERROR! port=%d > phyN=%d\n", > + __func__, __LINE__, index, rtk_phy- > >phyN); > + return; > + } > + > + do_rtk_usb3_phy_toggle(rtk_phy, index, isConnect); > +} > + > +static int rtk_usb_phy_notify_port_status(struct usb_phy *x, int > port, > + u16 portstatus, u16 portchange) > +{ > + bool isConnect = false; > + > + pr_debug("%s port=%d portstatus=0x%x portchange=0x%x\n", > + __func__, port, (int)portstatus, > (int)portchange); > + if (portstatus & USB_PORT_STAT_CONNECTION) > + isConnect = true; > + > + if (portchange & USB_PORT_STAT_C_CONNECTION) > + rtk_usb3_phy_toggle(x, isConnect, port); > + > + return 0; > +} > + > +#ifdef CONFIG_DEBUG_FS > +static struct dentry *create_phy_debug_root(void) > +{ > + struct dentry *phy_debug_root; > + > + phy_debug_root = debugfs_lookup("phy", usb_debug_root); > + if (!phy_debug_root) { > + phy_debug_root = debugfs_create_dir("phy", > usb_debug_root); > + if (!phy_debug_root) > + pr_err("%s Error phy_debug_root is NULL\n", > __func__); > + else > + pr_debug("%s Create phy_debug_root folder\n", > __func__); > + } > + > + return phy_debug_root; > +} > + > +static int rtk_usb3_parameter_show(struct seq_file *s, void *unused) > +{ > + struct rtk_usb_phy *rtk_phy = s->private; > + int i, index; > + > + for (i = 0; i < rtk_phy->phyN; i++) { > + struct reg_addr *regAddr = > + &((struct reg_addr *)rtk_phy- > >reg_addr)[i]; > + struct phy_data *phy_data = > + &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + struct phy_parameter *phy_parameter; > + > + phy_parameter = phy_data->parameter; > + > + seq_printf(s, "[USB3_PHY] PHY %d\n", i); > + > + for (index = 0; index < phy_data->size; index++) { > + u8 addr = ARRAY_INDEX_MAP_PHY_ADDR(index); > + u16 data = (phy_parameter + index)->data; > + > + if ((phy_parameter + index)->addr == 0xFF) > + seq_printf(s, "[USB3_PHY], addr = > 0x%02x, data = none ==> read value = 0x%04x\n", > + addr, > + rtk_usb_phy_read(regAddr, > addr)); > + else > + seq_printf(s, "[USB3_PHY], addr = > 0x%02x, data = 0x%04x ==> read value = 0x%04x\n", > + addr, data, > + rtk_usb_phy_read(regAddr, > addr)); > + } > + > + seq_puts(s, "Property:\n"); > + seq_printf(s, "check_efuse: %s\n", > + phy_data- > >check_efuse?"Enable":"Disable"); > + seq_printf(s, "efuse_usb_u3_tx_lfps_swing_trim: > 0x%x\n", > + (int)phy_data- > >efuse_usb_u3_tx_lfps_swing_trim); > + seq_printf(s, "do_toggle: %s\n", > + phy_data->do_toggle?"Enable":"Disable"); > + seq_printf(s, "do_toggle_once: %s\n", > + phy_data- > >do_toggle_once?"Enable":"Disable"); > + seq_printf(s, "use_default_parameter: %s\n", > + phy_data- > >use_default_parameter?"Enable":"Disable"); > + } > + return 0; > +} > + > +static int rtk_usb3_parameter_open(struct inode *inode, struct file > *file) > +{ > + return single_open(file, rtk_usb3_parameter_show, inode- > >i_private); > +} > + > +static const struct file_operations rtk_usb3_parameter_fops = { > + .open = rtk_usb3_parameter_open, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > +}; > + > +static int __get_parameter_at_page(struct seq_file *s, > + struct rtk_usb_phy *rtk_phy, > + struct phy_parameter *phy_parameter_array, > + const char *phy_addr) > +{ > + struct phy_parameter *phy_parameter; > + uint32_t addr; > + int i, ret; > + > + ret = kstrtouint(phy_addr, 16, &addr); > + if (ret < 0) { > + pr_err("%s::kstrtouint() failed\n", __func__); > + return -EINVAL; > + } > + > + i = PHY_ADDR_MAP_ARRAY_INDEX(addr); > + phy_parameter = (phy_parameter_array + i); > + > + if (phy_parameter->addr != 0xFF) > + seq_printf(s, "Now Parameter addr 0x%02x = 0x%04x\n", > + phy_parameter->addr, phy_parameter- > >data); > + else > + seq_printf(s, "Now Parameter addr 0x%02x is > default\n", > + addr); > + > + dev_dbg(rtk_phy->dev, "%s addr=0x%02x data=0x%04x\n", > + __func__, phy_parameter->addr, phy_parameter- > >data); > + > + return 0; > +} > + > +static int __set_parameter_at_page( > + struct rtk_usb_phy *rtk_phy, > + struct reg_addr *regAddr, struct phy_data *phy_data, > + struct phy_parameter *phy_parameter_array, > + const char *phy_addr, const char *phy_value) > +{ > + struct phy_parameter *phy_parameter; > + uint32_t addr, value; > + int i, ret; > + > + ret = kstrtouint(phy_addr, 16, &addr); > + if (ret < 0) { > + pr_err("%s::kstrtouint() failed\n", __func__); > + return -EINVAL; > + } > + ret = kstrtouint(phy_value, 16, &value); > + if (ret < 0) { > + pr_err("%s::kstrtouint() failed\n", __func__); > + return -EINVAL; > + } > + > + i = PHY_ADDR_MAP_ARRAY_INDEX(addr); > + phy_parameter = (phy_parameter_array + i); > + > + if (phy_parameter->addr != 0xFF) { > + phy_parameter->data = value; > + } else { > + phy_parameter->addr = addr; > + phy_parameter->data = value; > + } > + > + dev_info(rtk_phy->dev, "%s addr=0x%02x data=0x%04x\n", > + __func__, phy_parameter->addr, phy_parameter- > >data); > + > + if (addr == PHY_ADDR_0x20) > + dev_info(rtk_phy->dev, > + "%s PHY_ADDR_0x20 NOT use efuse > u3_tx_lfps_swing_trim value\n", > + __func__); > + > + if (rtk_usb_phy_write(regAddr, addr, value)) > + dev_err(rtk_phy->dev, > + "[%s:%d] Error: addr=0x%02x > value=0x%04x\n", > + __func__, __LINE__, addr, value); > + > + return 0; > +} > + > +static int rtk_usb3_set_parameter_show(struct seq_file *s, void > *unused) > +{ > + struct rtk_usb_phy *rtk_phy = s->private; > + const struct file *file = s->file; > + const char *file_name = file_dentry(file)->d_iname; > + struct dentry *p_dentry = file_dentry(file)->d_parent; > + const char *phy_dir_name = p_dentry->d_iname; > + int ret, index; > + struct phy_data *phy_data; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "phy%d", index); > + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + break; > + } > + } > + if (!phy_data) { > + dev_err(rtk_phy->dev, > + "%s: No phy_data for %s/%s\n", > + __func__, phy_dir_name, > file_name); > + return -EINVAL; > + } > + > + ret = __get_parameter_at_page(s, rtk_phy, phy_data- > >parameter, file_name); > + if (ret < 0) > + return ret; > + > + seq_puts(s, "Set phy parameter by following command\n"); > + seq_printf(s, "echo \"value\" > %s/%s\n", > + phy_dir_name, file_name); > + > + return 0; > +} > + > +static int rtk_usb3_set_parameter_open(struct inode *inode, struct > file *file) > +{ > + return single_open(file, rtk_usb3_set_parameter_show, inode- > >i_private); > +} > + > +static ssize_t rtk_usb3_set_parameter_write(struct file *file, > + const char __user *ubuf, size_t count, loff_t *ppos) > +{ > + const char *file_name = file_dentry(file)->d_iname; > + struct dentry *p_dentry = file_dentry(file)->d_parent; > + const char *phy_dir_name = p_dentry->d_iname; > + struct seq_file *s = file->private_data; > + struct rtk_usb_phy *rtk_phy = s->private; > + struct reg_addr *regAddr; > + struct phy_data *phy_data; > + int ret = 0; > + char buffer[40] = {0}; > + int index; > + > + if (copy_from_user(&buffer, ubuf, > + min_t(size_t, sizeof(buffer) - 1, count))) > + return -EFAULT; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "phy%d", index); > + if (strncmp(name, phy_dir_name, strlen(name)) == 0) { > + regAddr = &((struct reg_addr *)rtk_phy- > >reg_addr)[index]; > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + break; > + } > + } > + if (!regAddr) { > + dev_err(rtk_phy->dev, > + "%s: No regAddr for %s/%s\n", > + __func__, phy_dir_name, > file_name); > + return -EINVAL; > + } > + if (!phy_data) { > + dev_err(rtk_phy->dev, > + "%s: No phy_data for %s/%s\n", > + __func__, phy_dir_name, > file_name); > + return -EINVAL; > + } > + > + ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, > + phy_data->parameter, file_name, buffer); > + if (ret < 0) > + return ret; > + > + return count; > +} > + > +static const struct file_operations rtk_usb3_set_parameter_fops = { > + .open = rtk_usb3_set_parameter_open, > + .write = rtk_usb3_set_parameter_write, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > +}; > + > +static int rtk_usb3_toggle_show(struct seq_file *s, void *unused) > +{ > + struct rtk_usb_phy *rtk_phy = s->private; > + struct phy_data *phy_data; > + int i; > + > + for (i = 0; i < rtk_phy->phyN; i++) { > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + seq_printf(s, "Now phy#%d do_toggle is %s.\n", > + i, phy_data- > >do_toggle?"Enable":"Disable"); > + } > + seq_puts(s, "ehco 1 to enable toggle phy parameter.\n"); > + > + return 0; > +} > + > +static int rtk_usb3_toggle_open(struct inode *inode, struct file > *file) > +{ > + return single_open(file, rtk_usb3_toggle_show, inode- > >i_private); > +} > + > +static ssize_t rtk_usb3_toggle_write(struct file *file, > + const char __user *ubuf, size_t count, loff_t *ppos) > +{ > + struct seq_file *s = file->private_data; > + struct rtk_usb_phy *rtk_phy = s->private; > + char buf[32]; > + struct phy_data *phy_data; > + bool enable = false; > + int i; > + > + if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, > count))) > + return -EFAULT; > + > + if (!strncmp(buf, "1", 1)) > + enable = true; > + > + for (i = 0; i < rtk_phy->phyN; i++) { > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + phy_data->do_toggle = enable; > + dev_info(rtk_phy->dev, "Set phy#%d do_toggle is > %s.\n", > + i, phy_data- > >do_toggle?"Enable":"Disable"); > + } > + > + return count; > +} > + > +static const struct file_operations rtk_usb3_toggle_fops = { > + .open = rtk_usb3_toggle_open, > + .write = rtk_usb3_toggle_write, > + .read = seq_read, > + .llseek = seq_lseek, > + .release = single_release, > +}; > + > +static int create_debug_set_parameter_files(struct rtk_usb_phy > *rtk_phy, > + struct dentry *phy_dir, size_t addr_size) > +{ > + int i; > + > + for (i = 0; i < addr_size; i++) { > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "%02x", > ARRAY_INDEX_MAP_PHY_ADDR(i)); > + > + if (!debugfs_create_file(name, 0644, > + phy_dir, rtk_phy, > + &rtk_usb3_set_parameter_fops)) > + dev_err(rtk_phy->dev, > + "%s Error create file %s fail", > + name, __func__); > + } > + > + return 0; > +} > + > +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) > +{ > + struct dentry *phy_debug_root = NULL; > + struct dentry *set_parameter_dir = NULL; > + > + phy_debug_root = create_phy_debug_root(); > + > + if (!phy_debug_root) { > + dev_err(rtk_phy->dev, "%s Error phy_debug_root is > NULL", > + __func__); > + return; > + } > + rtk_phy->debug_dir = debugfs_create_dir(dev_name(rtk_phy- > >dev), > + phy_debug_root); > + if (!rtk_phy->debug_dir) { > + dev_err(rtk_phy->dev, "%s Error debug_dir is NULL", > __func__); > + return; > + } > + > + if (!debugfs_create_file("parameter", 0444, > + rtk_phy->debug_dir, rtk_phy, > + &rtk_usb3_parameter_fops)) > + goto file_error; > + > + set_parameter_dir = debugfs_create_dir("set_parameter", > + rtk_phy->debug_dir); > + if (set_parameter_dir) { > + int index, ret; > + > + for (index = 0; index < rtk_phy->phyN; index++) { > + struct dentry *phy_dir; > + struct phy_data *phy_data; > + size_t sz = 30; > + char name[30] = {0}; > + > + snprintf(name, sz, "phy%d", index); > + > + phy_data = &((struct phy_data *)rtk_phy- > >phy_data)[index]; > + > + phy_dir = debugfs_create_dir(name, > set_parameter_dir); > + if (!phy_dir) { > + dev_err(rtk_phy->dev, > + "%s Error create folder > %s fail\n", > + name, __func__); > + goto file_error; > + } > + > + ret = > create_debug_set_parameter_files(rtk_phy, phy_dir, > + phy_data->size); > + if (ret < 0) { > + dev_err(rtk_phy->dev, > + "%s Error create files > fail\n", > + __func__); > + goto file_error; > + } > + } > + } > + > + if (!debugfs_create_file("toggle", 0644, rtk_phy->debug_dir, > rtk_phy, > + &rtk_usb3_toggle_fops)) > + goto file_error; > + > + return; > + > +file_error: > + debugfs_remove_recursive(rtk_phy->debug_dir); > +} > + > +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) > +{ > + debugfs_remove_recursive(rtk_phy->debug_dir); > +} > +#else > +static inline void create_debug_files(struct rtk_usb_phy *rtk_phy) { > } > +static inline void remove_debug_files(struct rtk_usb_phy *rtk_phy) { > } > +#endif /* CONFIG_DEBUG_FS */ > + > +static int __get_phy_parameter_by_efuse(struct rtk_usb_phy *rtk_phy, > + struct phy_data *phy_data, int index) > +{ > + u8 value = 0; > + struct nvmem_cell *cell; > + > + if (!phy_data->check_efuse) > + goto out; > + > + cell = nvmem_cell_get(rtk_phy->dev, > "usb_u3_tx_lfps_swing_trim"); > + if (IS_ERR(cell)) { > + dev_warn(rtk_phy->dev, > + "%s failed to get > usb_u3_tx_lfps_swing_trim: %ld\n", > + __func__, PTR_ERR(cell)); > + } else { > + unsigned char *buf; > + size_t buf_size; > + > + buf = nvmem_cell_read(cell, &buf_size); > + > + value = buf[0] & USB_U3_TX_LFPS_SWING_TRIM_MASK; > + > + dev_dbg(rtk_phy->dev, > + "phy index=%d buf=0x%x buf_size=%d > value=0x%x\n", > + index, buf[0], (int)buf_size, value); > + kfree(buf); > + nvmem_cell_put(cell); > + } > + > + if ((value > 0) && (value < 0x8)) > + phy_data->efuse_usb_u3_tx_lfps_swing_trim = 0x8; > + else > + phy_data->efuse_usb_u3_tx_lfps_swing_trim = > (u8)value; > + > + dev_dbg(rtk_phy->dev, "Get Efuse > usb_u3_tx_lfps_swing_trim=0x%x (value=0x%x)\n", > + phy_data->efuse_usb_u3_tx_lfps_swing_trim, > value); > + > +out: > + return 0; > +} > + > +static int __get_phy_parameter_v1(struct device *dev, struct > phy_data *phy_data, > + struct device_node *sub_node) > +{ > + struct phy_parameter *phy_parameter; > + int revision, i, ret = 0; > + u8 *addr; > + u16 *data; > + > + ret = of_property_read_u32_index(sub_node, "realtek,phy-data- > size", 0, > + &phy_data->size); > + if (ret) > + goto out; > + > + phy_data->parameter = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * phy_data->size, > + GFP_KERNEL); > + if (!phy_data->parameter) > + return -ENOMEM; > + > + addr = kcalloc(phy_data->size, sizeof(u8), GFP_KERNEL); > + if (!addr) { > + kfree(phy_data->parameter); > + phy_data->parameter = NULL; > + return -ENOMEM; > + } > + > + data = kcalloc(phy_data->size, sizeof(u16), GFP_KERNEL); > + if (!data) { > + kfree(phy_data->parameter); > + kfree(addr); > + phy_data->parameter = NULL; > + return -ENOMEM; > + } > + ret = of_property_read_u8_array(sub_node, "realtek,phy-data- > addr", > + addr, phy_data->size); > + if (ret) > + goto out; > + > + revision = __get_chip_revision(); > + dev_dbg(dev, "%s: Chip revision is %x\n", __func__, > revision); > + > + while (revision >= DEFAULT_CHIP_REVISION) { > + char phy_data_revision[32] = {0}; > + > + snprintf(phy_data_revision, 21, "realtek,phy-data- > %X", > + revision); > + ret = of_property_read_u16_array(sub_node, > + phy_data_revision, > + data, phy_data->size); > + if (!ret) { > + dev_dbg(dev, "%s load %s parameter\n", > + __func__, phy_data_revision); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + } > + > + /* For old device tree */ > + if (ret) { > + ret = of_property_read_u16_array(sub_node, > + "realtek,phy-data-revA", > + data, phy_data->size); > + if (ret) > + goto out; > + else > + dev_info(dev, "%s load parameter\n", > __func__); > + } > + > + phy_parameter = phy_data->parameter; > + > + for (i = 0; i < phy_data->size; i++) { > + (phy_parameter + i)->addr = *(addr + i); > + (phy_parameter + i)->data = *(data + i); > + dev_dbg(dev, "%s i=%d addr=0x%x data=0x%x\n", > + __func__, i, (phy_parameter + i)->addr, > + (phy_parameter + i)->data); > + } > + > +out: > + kfree(addr); > + kfree(data); > + > + return ret; > +} > + > +static int __get_phy_parameter_v2(struct device *dev, struct > phy_data *phy_data, > + struct device_node *sub_node) > +{ > + struct phy_parameter *phy_parameter; > + int revision, i, ret = 0; > + int data_size, num_cells = 2; > + char phy_data_revision[32] = {0}; > + > + ret = of_property_read_u32_index(sub_node, "realtek,phy-data- > size", 0, > + &phy_data->size); > + if (ret) > + goto out; > + > + phy_data->parameter = devm_kzalloc(dev, > + sizeof(struct phy_parameter) * phy_data->size, > + GFP_KERNEL); > + if (!phy_data->parameter) > + return -ENOMEM; > + > + revision = __get_chip_revision(); > + dev_dbg(dev, "%s: Chip revision is %x\n", __func__, > revision); > + > + while (revision >= DEFAULT_CHIP_REVISION) { > + snprintf(phy_data_revision, 21, "realtek,phy-data- > %X", > + revision); > + if (of_get_property(sub_node, phy_data_revision, > &data_size)) { > + dev_dbg(dev, "%s load %s parameter > (data_size=%d)\n", > + __func__, phy_data_revision, > data_size); > + break; > + } > + revision--; > + if ((revision & 0xFF) > 0xF) > + revision = (revision & 0xF00) + 0xF; > + > + data_size = 0; > + ret = 0; > + } > + > + phy_parameter = phy_data->parameter; > + for (i = 0; i < phy_data->size; i++) > + (phy_parameter + i)->addr = 0xFF; > + > + data_size = data_size / (sizeof(u32) * num_cells); > + for (i = 0; i < data_size; i++) { > + struct phy_parameter *parameter; > + u32 addr, data; > + int offset, index; > + > + offset = i * num_cells; > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset, &addr); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, addr); > + break; > + } > + > + ret = of_property_read_u32_index(sub_node, > phy_data_revision, > + offset + 1, &data); > + if (ret) { > + dev_err(dev, "ERROR: To get %s i=%d > addr=0x%x\n", > + phy_data_revision, i, data); > + break; > + } > + > + index = PHY_ADDR_MAP_ARRAY_INDEX(addr); > + parameter = (phy_parameter + index); > + parameter->addr = (u8)addr; > + parameter->data = (u16)data; > + > + dev_dbg(dev, "%s index=%d addr=0x%x data=0x%x\n", > + phy_data_revision, index, > + parameter->addr, parameter->data); > + } > + > +out: > + return ret; > +} > + > +static int rtk_usb3phy_probe(struct platform_device *pdev) > +{ > + struct rtk_usb_phy *rtk_phy; > + struct device *dev = &pdev->dev; > + int i, ret, phyN; > + > + rtk_phy = devm_kzalloc(dev, sizeof(*rtk_phy), GFP_KERNEL); > + if (!rtk_phy) > + return -ENOMEM; > + > + rtk_phy->dev = &pdev->dev; > + rtk_phy->phy.dev = rtk_phy->dev; > + rtk_phy->phy.label = RTK_USB3PHY_NAME; > + rtk_phy->phy.init = rtk_usb_phy_init; > + rtk_phy->phy.shutdown = rtk_usb_phyhutdown; > + rtk_phy->phy.notify_port_status = > rtk_usb_phy_notify_port_status; > + > + if (!dev->of_node) { > + dev_err(dev, "%s %d No device node\n", __func__, > __LINE__); > + ret = -ENODEV; > + goto err; > + } > + > + rtk_phy->usb_regs = syscon_regmap_lookup_by_phandle(dev- > >of_node, "realtek,usb"); > + if (IS_ERR(rtk_phy->usb_regs)) { > + dev_info(dev, "%s: DTS no support usb regs syscon\n", > __func__); > + rtk_phy->usb_regs = NULL; > + } > + > + rtk_phy->mac_regs = syscon_regmap_lookup_by_phandle(dev- > >of_node, "realtek,mac"); > + if (IS_ERR(rtk_phy->mac_regs)) { > + dev_info(dev, "%s: DTS no support mac regs syscon\n", > __func__); > + rtk_phy->mac_regs = NULL; > + } > + > + rtk_phy->usb_ctrl_regs = syscon_regmap_lookup_by_phandle(dev- > >of_node, "realtek,usb_ctrl"); > + if (IS_ERR(rtk_phy->usb_ctrl_regs)) { > + dev_info(dev, "%s: DTS no support usb_ctrl regs > syscon\n", __func__); > + rtk_phy->usb_ctrl_regs = NULL; > + } > + > + ret = of_property_read_u32_index(dev->of_node, > "realtek,phyN", 0, > + &phyN); > + if (ret) > + goto err; > + > + rtk_phy->phyN = phyN; > + > + rtk_phy->reg_addr = devm_kzalloc(dev, > + sizeof(struct reg_addr) * phyN, GFP_KERNEL); > + if (!rtk_phy->reg_addr) > + return -ENOMEM; > + > + rtk_phy->phy_data = devm_kzalloc(dev, > + sizeof(struct phy_data) * phyN, GFP_KERNEL); > + if (!rtk_phy->phy_data) > + return -ENOMEM; > + > + for (i = 0; i < phyN; i++) { > + struct reg_addr *addr = > + &((struct reg_addr *)rtk_phy- > >reg_addr)[i]; > + struct phy_data *phy_data = > + &((struct phy_data *)rtk_phy- > >phy_data)[i]; > + > + char phy_name[5], phy_name_v2[10]; > + struct device_node *sub_node; > + > + addr->reg_mdio_ctl = of_iomap(dev->of_node, i); > + dev_dbg(dev, "%s %d #%d reg_mdio_ctl=%p\n", > + __func__, __LINE__, i, addr- > >reg_mdio_ctl); > + > + snprintf(phy_name, 5, "phy%d", i); > + > + sub_node = of_get_child_by_name(dev->of_node, > phy_name); > + if (sub_node) { > + dev_dbg(dev, "%s %d: #%d Get phy data v1 > sub_node for %s\n", > + __func__, __LINE__, i, phy_name); > + ret = __get_phy_parameter_v1(dev, phy_data, > sub_node); > + if (ret) > + goto err; > + } else { > + snprintf(phy_name_v2, 10, "phy%d_data", i); > + sub_node = of_get_child_by_name(dev->of_node, > phy_name_v2); > + if (sub_node) { > + dev_dbg(dev, "%s %d: #%d Get phy data > v2 sub_node for %s\n", > + __func__, __LINE__, i, > phy_name_v2); > + ret = __get_phy_parameter_v2(dev, > phy_data, sub_node); > + if (ret) > + goto err; > + } > + } > + > + if (!sub_node) { > + dev_err(dev, "%s %d No device sub node for > %s\n", > + __func__, __LINE__, phy_name); > + goto err; > + } > + > + if (of_property_read_bool(sub_node, "realtek,do- > toggle-once")) > + phy_data->do_toggle_once = true; > + else > + phy_data->do_toggle_once = false; > + > + if (of_property_read_bool(sub_node, "realtek,do- > toggle")) > + phy_data->do_toggle = true; > + else > + phy_data->do_toggle = false; > + > + if (of_property_read_bool(sub_node, "realtek,use- > default-parameter")) > + phy_data->use_default_parameter = true; > + else > + phy_data->use_default_parameter = false; > + > + if (of_property_read_bool(sub_node, "realtek,check- > rx-front-end-offset")) > + phy_data->check_rx_front_end_offset = true; > + else > + phy_data->check_rx_front_end_offset = false; > + > + if (of_property_read_bool(sub_node, "realtek,check- > efuse")) > + phy_data->check_efuse = true; > + else > + phy_data->check_efuse = false; > + > + __get_phy_parameter_by_efuse(rtk_phy, phy_data, i); > + } > + > + platform_set_drvdata(pdev, rtk_phy); > + > + ret = usb_add_phy_dev(&rtk_phy->phy); > + if (ret) > + goto err; > + > + create_debug_files(rtk_phy); > + > +err: > + dev_dbg(&pdev->dev, "Probe RTK USB 3.0 PHY (ret=%d)\n", ret); > + > + return ret; > +} > + > +static int rtk_usb3phy_remove(struct platform_device *pdev) > +{ > + struct rtk_usb_phy *rtk_phy = platform_get_drvdata(pdev); > + > + remove_debug_files(rtk_phy); > + > + usb_remove_phy(&rtk_phy->phy); > + > + return 0; > +} > + > +#ifdef CONFIG_OF > +static const struct of_device_id usbphy_rtk_dt_match[] = { > + { .compatible = "realtek,usb3phy", }, > + { .compatible = "realtek,rtd-usb3phy", }, > + { .compatible = "realtek,rtd1295-usb3phy", }, > + { .compatible = "realtek,rtd1619-usb3phy", }, > + { .compatible = "realtek,rtd1319-usb3phy", }, > + { .compatible = "realtek,rtd1619b-usb3phy", }, > + { .compatible = "realtek,rtd1319d-usb3phy", }, > + {}, > +}; > +MODULE_DEVICE_TABLE(of, usbphy_rtk_dt_match); > +#endif > + > +static struct platform_driver rtk_usb3phy_driver = { > + .probe = rtk_usb3phy_probe, > + .remove = rtk_usb3phy_remove, > + .driver = { > + .name = RTK_USB3PHY_NAME, > + .owner = THIS_MODULE, > + .of_match_table = of_match_ptr(usbphy_rtk_dt_match), > + }, > +}; > + > +module_platform_driver(rtk_usb3phy_driver); > + > +MODULE_LICENSE("GPL"); > +MODULE_ALIAS("platform:" RTK_USB3PHY_NAME); > +MODULE_AUTHOR("Realtek Semiconductor Corporation"); > +MODULE_DESCRIPTION("RTK usb 3.0 phy driver"); ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 8:16 ` Paul Cercueil @ 2023-05-19 10:58 ` Stanley Chang[昌育德] 2023-05-19 11:01 ` Arnd Bergmann 0 siblings, 1 reply; 12+ messages in thread From: Stanley Chang[昌育德] @ 2023-05-19 10:58 UTC (permalink / raw) To: Paul Cercueil, Greg Kroah-Hartman Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Arnd Bergmann, Linus Walleij, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Hi Paul, > > Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB > > 2.0/3.0 > > controller. Added two drivers to drive the USB 2.0/3.0 PHY > > transceivers. > > For USB 3.0 transceivers, a driver phy-rtk-usb3 is provided. > > The driver phy-rtk-usb2 is used to support USB 2.0 transceivers. > > > > Signed-off-by: Stanley Chang <stanley_chang@realtek.com> > > --- > > drivers/usb/phy/Kconfig | 14 + > > drivers/usb/phy/Makefile | 2 + > > drivers/usb/phy/phy-rtk-usb.h | 88 ++ > > drivers/usb/phy/phy-rtk-usb2.c | 2196 > > ++++++++++++++++++++++++++++++++ > > drivers/usb/phy/phy-rtk-usb3.c | 1165 +++++++++++++++++ > > 5 files changed, 3465 insertions(+) > > create mode 100644 drivers/usb/phy/phy-rtk-usb.h > > create mode 100644 drivers/usb/phy/phy-rtk-usb2.c > > create mode 100644 drivers/usb/phy/phy-rtk-usb3.c > > I'm pretty sure that drivers/usb/phy/ is deprecated now... > > New drivers should be written for the generic PHY subsystem in > drivers/phy/. > Thanks for your reminder. Will drivers/usb/phy be removed? Is it not allowed to add new drivers? In our application, driver/phy is not suitable. We need to notify the phy driver when the USB hub port status changes. However, generic PHY drivers are designed for various device's PHY. And it seems inappropriate to add this function. So we choose to use driver/usb/phy. Thanks, Stanley ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 10:58 ` Stanley Chang[昌育德] @ 2023-05-19 11:01 ` Arnd Bergmann 2023-05-19 17:40 ` Vinod Koul 2023-05-20 5:10 ` Stanley Chang[昌育德] 0 siblings, 2 replies; 12+ messages in thread From: Arnd Bergmann @ 2023-05-19 11:01 UTC (permalink / raw) To: Stanley Chang, Paul Cercueil, Greg Kroah-Hartman Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Linus Walleij, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org On Fri, May 19, 2023, at 12:58, Stanley Chang[昌育德] wrote: >> >> I'm pretty sure that drivers/usb/phy/ is deprecated now... >> >> New drivers should be written for the generic PHY subsystem in >> drivers/phy/. Indeed, I missed that in my review. > Thanks for your reminder. > Will drivers/usb/phy be removed? > Is it not allowed to add new drivers? > > In our application, driver/phy is not suitable. > We need to notify the phy driver when the USB hub port status changes. > However, generic PHY drivers are designed for various device's PHY. > And it seems inappropriate to add this function. So we choose to use > driver/usb/phy. If you run into something that works in the old usbphy layer but can't be done in drivers/phy, I think the better solution would be to change the drivers/phy/ code to add this. Arnd ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 11:01 ` Arnd Bergmann @ 2023-05-19 17:40 ` Vinod Koul 2023-05-20 5:18 ` Stanley Chang[昌育德] 2023-05-20 5:10 ` Stanley Chang[昌育德] 1 sibling, 1 reply; 12+ messages in thread From: Vinod Koul @ 2023-05-19 17:40 UTC (permalink / raw) To: Arnd Bergmann Cc: Stanley Chang, Paul Cercueil, Greg Kroah-Hartman, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Linus Walleij, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org On 19-05-23, 13:01, Arnd Bergmann wrote: > On Fri, May 19, 2023, at 12:58, Stanley Chang[昌育德] wrote: > >> > >> I'm pretty sure that drivers/usb/phy/ is deprecated now... > >> > >> New drivers should be written for the generic PHY subsystem in > >> drivers/phy/. > > Indeed, I missed that in my review. > > > Thanks for your reminder. > > Will drivers/usb/phy be removed? > > Is it not allowed to add new drivers? > > > > In our application, driver/phy is not suitable. > > We need to notify the phy driver when the USB hub port status changes. > > However, generic PHY drivers are designed for various device's PHY. > > And it seems inappropriate to add this function. So we choose to use > > driver/usb/phy. > > If you run into something that works in the old usbphy layer > but can't be done in drivers/phy, I think the better solution > would be to change the drivers/phy/ code to add this. The is correct, phy interfaces can be improved upon and have been added upon as and when we have users. FWIW there are already usb phy drivers in Generic phy susbystem, so you need to really justify why you need a new interface? -- ~Vinod ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 17:40 ` Vinod Koul @ 2023-05-20 5:18 ` Stanley Chang[昌育德] 0 siblings, 0 replies; 12+ messages in thread From: Stanley Chang[昌育德] @ 2023-05-20 5:18 UTC (permalink / raw) To: Vinod Koul, Arnd Bergmann Cc: Paul Cercueil, Greg Kroah-Hartman, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Linus Walleij, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Hi Vinod, > The is correct, phy interfaces can be improved upon and have been added > upon as and when we have users. > > FWIW there are already usb phy drivers in Generic phy susbystem, so you need > to really justify why you need a new interface? > I will reference the us phy drivers in drivers/phy. Is using usb phy in drivers/phy the right choice? As the following as: drivers/phy/ti/phy-twl4030-usb.c drivers/phy/ti/phy-omap-usb2.c drivers/phy/ti/phy-dm816x-usb.c drivers/phy/phy-lgm-usb.c drivers/phy/tegra/xusb.c drivers/phy/motorola/phy-cpcap-usb.c Thanks, Stanley ^ permalink raw reply [flat|nested] 12+ messages in thread
* RE: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 11:01 ` Arnd Bergmann 2023-05-19 17:40 ` Vinod Koul @ 2023-05-20 5:10 ` Stanley Chang[昌育德] 1 sibling, 0 replies; 12+ messages in thread From: Stanley Chang[昌育德] @ 2023-05-20 5:10 UTC (permalink / raw) To: Arnd Bergmann, Paul Cercueil, Greg Kroah-Hartman Cc: Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Linus Walleij, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Hi Arnd, > >> I'm pretty sure that drivers/usb/phy/ is deprecated now... > >> > >> New drivers should be written for the generic PHY subsystem in > >> drivers/phy/. > > Indeed, I missed that in my review. > > > Thanks for your reminder. > > Will drivers/usb/phy be removed? > > Is it not allowed to add new drivers? > > > > In our application, driver/phy is not suitable. > > We need to notify the phy driver when the USB hub port status changes. > > However, generic PHY drivers are designed for various device's PHY. > > And it seems inappropriate to add this function. So we choose to use > > driver/usb/phy. > > If you run into something that works in the old usbphy layer but can't be done > in drivers/phy, I think the better solution would be to change the drivers/phy/ > code to add this. > > Arnd > I would move the code to drivers/phy. Can I use the "struct usb_phy" interface after adding the code to the driver/phy? I found that some drivers use "usb_phy" in deivers/phy/. Can I follow these drivers? Thanks, Stanley ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 4:58 ` [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY Stanley Chang 2023-05-19 6:28 ` Arnd Bergmann 2023-05-19 8:16 ` Paul Cercueil @ 2023-05-20 9:04 ` kernel test robot 2 siblings, 0 replies; 12+ messages in thread From: kernel test robot @ 2023-05-20 9:04 UTC (permalink / raw) To: Stanley Chang, Greg Kroah-Hartman Cc: llvm, oe-kbuild-all, Stanley Chang, Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Bagas Sanjaya, Eugeniu Rosca, Michael Grzeschik, Matthias Kaehlcke, Flavio Suligoi, Mathias Nyman, Bhuvanesh Surachari, Arnd Bergmann, Paul Cercueil, Linus Walleij, linux-phy, devicetree, linux-kernel, linux-usb [-- Attachment #1: Type: text/plain, Size: 10733 bytes --] Hi Stanley, kernel test robot noticed the following build warnings: [auto build test WARNING on usb/usb-testing] [also build test WARNING on usb/usb-next usb/usb-linus robh/for-next linus/master v6.4-rc2 next-20230519] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Stanley-Chang/usb-phy-Add-driver-for-the-Realtek-SoC-USB-2-0-3-0-PHY/20230519-130108 base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git usb-testing patch link: https://lore.kernel.org/r/20230519045825.28369-2-stanley_chang%40realtek.com patch subject: [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY config: i386-allyesconfig compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/e5d8b867188b162bc49cc68373b1a25a179c01b3 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Stanley-Chang/usb-phy-Add-driver-for-the-Realtek-SoC-USB-2-0-3-0-PHY/20230519-130108 git checkout e5d8b867188b162bc49cc68373b1a25a179c01b3 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 olddefconfig COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/usb/phy/ If you fix the issue, kindly add following tag where applicable | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202305201608.MBqXmFKF-lkp@intel.com/ All warnings (new ones prefixed by >>): >> drivers/usb/phy/phy-rtk-usb2.c:1049:11: warning: variable 'ret' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] else if (strcmp("page2", dir_name) == 0) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1053:6: note: uninitialized use occurs here if (ret < 0) ^~~ drivers/usb/phy/phy-rtk-usb2.c:1049:7: note: remove the 'if' if its condition is always true else if (strcmp("page2", dir_name) == 0) ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1023:9: note: initialize the variable 'ret' to silence this warning int ret, index; ^ = 0 >> drivers/usb/phy/phy-rtk-usb2.c:1026:18: warning: variable 'phy_data' is used uninitialized whenever 'for' loop exits because its condition is false [-Wsometimes-uninitialized] for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1036:7: note: uninitialized use occurs here if (!phy_data) { ^~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1026:18: note: remove the condition if it is always true for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1024:27: note: initialize the variable 'phy_data' to silence this warning struct phy_data *phy_data; ^ = NULL >> drivers/usb/phy/phy-rtk-usb2.c:1088:18: warning: variable 'regAddr' is used uninitialized whenever 'for' loop exits because its condition is false [-Wsometimes-uninitialized] for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1099:7: note: uninitialized use occurs here if (!regAddr) { ^~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1088:18: note: remove the condition if it is always true for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb2.c:1078:26: note: initialize the variable 'regAddr' to silence this warning struct reg_addr *regAddr; ^ = NULL 3 warnings generated. -- >> drivers/usb/phy/phy-rtk-usb3.c:532:18: warning: variable 'phy_data' is used uninitialized whenever 'for' loop exits because its condition is false [-Wsometimes-uninitialized] for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb3.c:542:7: note: uninitialized use occurs here if (!phy_data) { ^~~~~~~~ drivers/usb/phy/phy-rtk-usb3.c:532:18: note: remove the condition if it is always true for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb3.c:530:27: note: initialize the variable 'phy_data' to silence this warning struct phy_data *phy_data; ^ = NULL >> drivers/usb/phy/phy-rtk-usb3.c:583:18: warning: variable 'regAddr' is used uninitialized whenever 'for' loop exits because its condition is false [-Wsometimes-uninitialized] for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb3.c:594:7: note: uninitialized use occurs here if (!regAddr) { ^~~~~~~ drivers/usb/phy/phy-rtk-usb3.c:583:18: note: remove the condition if it is always true for (index = 0; index < rtk_phy->phyN; index++) { ^~~~~~~~~~~~~~~~~~~~~ drivers/usb/phy/phy-rtk-usb3.c:573:26: note: initialize the variable 'regAddr' to silence this warning struct reg_addr *regAddr; ^ = NULL 2 warnings generated. vim +1049 drivers/usb/phy/phy-rtk-usb2.c 1013 1014 static int rtk_usb2_set_parameter_show(struct seq_file *s, void *unused) 1015 { 1016 struct rtk_usb_phy *rtk_phy = s->private; 1017 const struct file *file = s->file; 1018 const char *file_name = file_dentry(file)->d_iname; 1019 struct dentry *p_dentry = file_dentry(file)->d_parent; 1020 const char *dir_name = p_dentry->d_iname; 1021 struct dentry *pp_dentry = p_dentry->d_parent; 1022 const char *phy_dir_name = pp_dentry->d_iname; 1023 int ret, index; 1024 struct phy_data *phy_data; 1025 > 1026 for (index = 0; index < rtk_phy->phyN; index++) { 1027 size_t sz = 30; 1028 char name[30] = {0}; 1029 1030 snprintf(name, sz, "phy%d", index); 1031 if (strncmp(name, phy_dir_name, strlen(name)) == 0) { 1032 phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; 1033 break; 1034 } 1035 } 1036 if (!phy_data) { 1037 dev_err(rtk_phy->dev, 1038 "%s: No phy_data for %s/%s/%s\n", 1039 __func__, phy_dir_name, dir_name, file_name); 1040 return -EINVAL; 1041 } 1042 1043 if (strcmp("page0", dir_name) == 0) 1044 ret = __get_parameter_at_page(s, rtk_phy, phy_data->page0, 1045 dir_name, file_name); 1046 else if (strcmp("page1", dir_name) == 0) 1047 ret = __get_parameter_at_page(s, rtk_phy, phy_data->page1, 1048 dir_name, file_name); > 1049 else if (strcmp("page2", dir_name) == 0) 1050 ret = __get_parameter_at_page(s, rtk_phy, phy_data->page2, 1051 dir_name, file_name); 1052 1053 if (ret < 0) 1054 return ret; 1055 1056 seq_puts(s, "Set phy parameter by following command\n"); 1057 seq_printf(s, "echo \"value\" > %s/%s/%s\n", 1058 phy_dir_name, dir_name, file_name); 1059 1060 return 0; 1061 } 1062 1063 static int rtk_usb2_set_parameter_open(struct inode *inode, struct file *file) 1064 { 1065 return single_open(file, rtk_usb2_set_parameter_show, inode->i_private); 1066 } 1067 1068 static ssize_t rtk_usb2_set_parameter_write(struct file *file, 1069 const char __user *ubuf, size_t count, loff_t *ppos) 1070 { 1071 const char *file_name = file_dentry(file)->d_iname; 1072 struct dentry *p_dentry = file_dentry(file)->d_parent; 1073 const char *dir_name = p_dentry->d_iname; 1074 struct dentry *pp_dentry = p_dentry->d_parent; 1075 const char *phy_dir_name = pp_dentry->d_iname; 1076 struct seq_file *s = file->private_data; 1077 struct rtk_usb_phy *rtk_phy = s->private; 1078 struct reg_addr *regAddr; 1079 struct phy_data *phy_data; 1080 int ret = 0; 1081 char buffer[40] = {0}; 1082 int index; 1083 1084 if (copy_from_user(&buffer, ubuf, 1085 min_t(size_t, sizeof(buffer) - 1, count))) 1086 return -EFAULT; 1087 > 1088 for (index = 0; index < rtk_phy->phyN; index++) { 1089 size_t sz = 30; 1090 char name[30] = {0}; 1091 1092 snprintf(name, sz, "phy%d", index); 1093 if (strncmp(name, phy_dir_name, strlen(name)) == 0) { 1094 regAddr = &((struct reg_addr *)rtk_phy->reg_addr)[index]; 1095 phy_data = &((struct phy_data *)rtk_phy->phy_data)[index]; 1096 break; 1097 } 1098 } 1099 if (!regAddr) { 1100 dev_err(rtk_phy->dev, 1101 "%s: No regAddr for %s/%s/%s\n", 1102 __func__, phy_dir_name, dir_name, file_name); 1103 return -EINVAL; 1104 } 1105 if (!phy_data) { 1106 dev_err(rtk_phy->dev, 1107 "%s: No phy_data for %s/%s/%s\n", 1108 __func__, phy_dir_name, dir_name, file_name); 1109 return -EINVAL; 1110 } 1111 1112 if (strcmp("page0", dir_name) == 0) { 1113 rtk_usb_phy_set_page(regAddr, 0); 1114 ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, 1115 phy_data->page0, dir_name, file_name, buffer); 1116 } else if (strcmp("page1", dir_name) == 0) { 1117 rtk_usb_phy_set_page(regAddr, 1); 1118 ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, 1119 phy_data->page1, dir_name, file_name, buffer); 1120 } else if (strcmp("page2", dir_name) == 0) { 1121 rtk_usb_phy_set_page(regAddr, 2); 1122 ret = __set_parameter_at_page(rtk_phy, regAddr, phy_data, 1123 phy_data->page2, dir_name, file_name, buffer); 1124 } 1125 if (ret < 0) 1126 return ret; 1127 1128 return count; 1129 } 1130 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki [-- Attachment #2: config --] [-- Type: text/plain, Size: 287161 bytes --] # # Automatically generated file; DO NOT EDIT. # Linux/i386 6.4.0-rc1 Kernel Configuration # CONFIG_CC_VERSION_TEXT="clang version 14.0.6 (git://gitmirror/llvm_project f28c006a5895fc0e329fe15fead81e37457cb1d1)" CONFIG_GCC_VERSION=0 CONFIG_CC_IS_CLANG=y CONFIG_CLANG_VERSION=140006 CONFIG_AS_IS_LLVM=y CONFIG_AS_VERSION=140006 CONFIG_LD_VERSION=0 CONFIG_LD_IS_LLD=y CONFIG_LLD_VERSION=140006 CONFIG_RUST_IS_AVAILABLE=y CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y CONFIG_TOOLS_SUPPORT_RELR=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=125 CONFIG_CONSTRUCTORS=y CONFIG_IRQ_WORK=y CONFIG_BUILDTIME_TABLE_SORT=y CONFIG_THREAD_INFO_IN_TASK=y # # General setup # CONFIG_INIT_ENV_ARG_LIMIT=32 # CONFIG_COMPILE_TEST is not set # CONFIG_WERROR is not set CONFIG_UAPI_HEADER_TEST=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_BUILD_SALT="" CONFIG_HAVE_KERNEL_GZIP=y CONFIG_HAVE_KERNEL_BZIP2=y CONFIG_HAVE_KERNEL_LZMA=y CONFIG_HAVE_KERNEL_XZ=y CONFIG_HAVE_KERNEL_LZO=y CONFIG_HAVE_KERNEL_LZ4=y CONFIG_HAVE_KERNEL_ZSTD=y CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_BZIP2 is not set # CONFIG_KERNEL_LZMA is not set # CONFIG_KERNEL_XZ is not set # CONFIG_KERNEL_LZO is not set # CONFIG_KERNEL_LZ4 is not set # CONFIG_KERNEL_ZSTD is not set CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_WATCH_QUEUE=y CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_USELIB=y CONFIG_AUDIT=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y CONFIG_AUDITSYSCALL=y # # IRQ subsystem # CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_GENERIC_IRQ_INJECTION=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_SIM=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_IRQ_MSI_IOMMU=y CONFIG_GENERIC_IRQ_MATRIX_ALLOCATOR=y CONFIG_GENERIC_IRQ_RESERVATION_MODE=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_SPARSE_IRQ=y CONFIG_GENERIC_IRQ_DEBUGFS=y # end of IRQ subsystem CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_ARCH_CLOCKSOURCE_INIT=y CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_CONTEXT_TRACKING=y CONFIG_CONTEXT_TRACKING_IDLE=y # # Timers subsystem # CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set CONFIG_NO_HZ_IDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=125 # end of Timers subsystem CONFIG_BPF=y CONFIG_HAVE_EBPF_JIT=y # # BPF subsystem # CONFIG_BPF_SYSCALL=y CONFIG_BPF_JIT=y CONFIG_BPF_JIT_ALWAYS_ON=y CONFIG_BPF_JIT_DEFAULT_ON=y CONFIG_BPF_UNPRIV_DEFAULT_OFF=y CONFIG_USERMODE_DRIVER=y # CONFIG_BPF_PRELOAD is not set # CONFIG_BPF_LSM is not set # end of BPF subsystem CONFIG_PREEMPT_VOLUNTARY_BUILD=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set CONFIG_PREEMPT_COUNT=y # CONFIG_PREEMPT_DYNAMIC is not set CONFIG_SCHED_CORE=y # # CPU/Task time and stats accounting # CONFIG_TICK_CPU_ACCOUNTING=y CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y CONFIG_TASK_DELAY_ACCT=y CONFIG_TASK_XACCT=y CONFIG_TASK_IO_ACCOUNTING=y CONFIG_PSI=y CONFIG_PSI_DEFAULT_DISABLED=y # end of CPU/Task time and stats accounting CONFIG_CPU_ISOLATION=y # # RCU Subsystem # CONFIG_TREE_RCU=y CONFIG_RCU_EXPERT=y CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y CONFIG_FORCE_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_FORCE_TASKS_RUDE_RCU=y CONFIG_TASKS_RUDE_RCU=y CONFIG_FORCE_TASKS_TRACE_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_FANOUT=32 CONFIG_RCU_FANOUT_LEAF=16 CONFIG_RCU_NOCB_CPU=y CONFIG_RCU_NOCB_CPU_DEFAULT_ALL=y CONFIG_TASKS_TRACE_RCU_READ_MB=y CONFIG_RCU_LAZY=y # end of RCU Subsystem CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_IKHEADERS=y CONFIG_LOG_BUF_SHIFT=20 CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_INDEX=y CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # # Scheduler features # CONFIG_UCLAMP_TASK=y CONFIG_UCLAMP_BUCKETS_COUNT=5 # end of Scheduler features CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough" CONFIG_GCC11_NO_ARRAY_BOUNDS=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y CONFIG_CGROUP_FAVOR_DYNMODS=y CONFIG_MEMCG=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y CONFIG_CFS_BANDWIDTH=y CONFIG_RT_GROUP_SCHED=y CONFIG_SCHED_MM_CID=y CONFIG_UCLAMP_TASK_GROUP=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_RDMA=y CONFIG_CGROUP_FREEZER=y CONFIG_CGROUP_HUGETLB=y CONFIG_CPUSETS=y CONFIG_PROC_PID_CPUSET=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_PERF=y # CONFIG_CGROUP_BPF is not set CONFIG_CGROUP_MISC=y CONFIG_CGROUP_DEBUG=y CONFIG_SOCK_CGROUP_DATA=y CONFIG_NAMESPACES=y CONFIG_UTS_NS=y CONFIG_TIME_NS=y CONFIG_IPC_NS=y CONFIG_USER_NS=y CONFIG_PID_NS=y CONFIG_NET_NS=y CONFIG_CHECKPOINT_RESTORE=y CONFIG_SCHED_AUTOGROUP=y CONFIG_RELAY=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_RD_GZIP=y CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y CONFIG_RD_LZ4=y CONFIG_RD_ZSTD=y CONFIG_BOOT_CONFIG=y CONFIG_BOOT_CONFIG_FORCE=y CONFIG_BOOT_CONFIG_EMBED=y CONFIG_BOOT_CONFIG_EMBED_FILE="" CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y CONFIG_LD_ORPHAN_WARN_LEVEL="warn" CONFIG_SYSCTL=y CONFIG_HAVE_UID16=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_HAVE_PCSPKR_PLATFORM=y CONFIG_EXPERT=y CONFIG_UID16=y CONFIG_MULTIUSER=y CONFIG_SGETMASK_SYSCALL=y CONFIG_SYSFS_SYSCALL=y CONFIG_FHANDLE=y CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y CONFIG_PCSPKR_PLATFORM=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y CONFIG_DEBUG_RSEQ=y CONFIG_EMBEDDED=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_GUEST_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PC104=y # # Kernel Performance Events And Counters # CONFIG_PERF_EVENTS=y CONFIG_DEBUG_PERF_USE_VMALLOC=y # end of Kernel Performance Events And Counters CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y # end of General setup CONFIG_X86_32=y CONFIG_FORCE_DYNAMIC_FTRACE=y CONFIG_X86=y CONFIG_INSTRUCTION_DECODER=y CONFIG_OUTPUT_FORMAT="elf32-i386" CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_MMU=y CONFIG_ARCH_MMAP_RND_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_BITS_MAX=16 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16 CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_BUG=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_HAVE_INTEL_TXT=y CONFIG_X86_32_SMP=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_PGTABLE_LEVELS=2 # # Processor type and features # CONFIG_SMP=y CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_MPPARSE=y CONFIG_GOLDFISH=y CONFIG_X86_CPU_RESCTRL=y CONFIG_X86_BIGSMP=y CONFIG_X86_EXTENDED_PLATFORM=y # CONFIG_X86_GOLDFISH is not set CONFIG_X86_INTEL_MID=y CONFIG_X86_INTEL_QUARK=y CONFIG_X86_INTEL_LPSS=y # CONFIG_X86_AMD_PLATFORM_DEVICE is not set CONFIG_IOSF_MBI=y CONFIG_IOSF_MBI_DEBUG=y CONFIG_X86_RDC321X=y CONFIG_X86_32_NON_STANDARD=y CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y CONFIG_STA2X11=y CONFIG_X86_32_IRIS=y # CONFIG_SCHED_OMIT_FRAME_POINTER is not set CONFIG_HYPERVISOR_GUEST=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_DEBUG=y CONFIG_PARAVIRT_SPINLOCKS=y CONFIG_X86_HV_CALLBACK_VECTOR=y CONFIG_KVM_GUEST=y CONFIG_ARCH_CPUIDLE_HALTPOLL=y CONFIG_PVH=y CONFIG_PARAVIRT_TIME_ACCOUNTING=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_M486SX is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set # CONFIG_M586MMX is not set CONFIG_M686=y # CONFIG_MPENTIUMII is not set # CONFIG_MPENTIUMIII is not set # CONFIG_MPENTIUMM is not set # CONFIG_MPENTIUM4 is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set # CONFIG_MCRUSOE is not set # CONFIG_MEFFICEON is not set # CONFIG_MWINCHIPC6 is not set # CONFIG_MWINCHIP3D is not set # CONFIG_MELAN is not set # CONFIG_MGEODEGX1 is not set # CONFIG_MGEODE_LX is not set # CONFIG_MCYRIXIII is not set # CONFIG_MVIAC3_2 is not set # CONFIG_MVIAC7 is not set # CONFIG_MCORE2 is not set # CONFIG_MATOM is not set CONFIG_X86_GENERIC=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y CONFIG_X86_TSC=y CONFIG_X86_CMPXCHG64=y CONFIG_X86_CMOV=y CONFIG_X86_MINIMUM_CPU_FAMILY=6 CONFIG_X86_DEBUGCTLMSR=y CONFIG_IA32_FEAT_CTL=y CONFIG_X86_VMX_FEATURE_NAMES=y CONFIG_PROCESSOR_SELECT=y CONFIG_CPU_SUP_INTEL=y # CONFIG_CPU_SUP_CYRIX_32 is not set # CONFIG_CPU_SUP_AMD is not set # CONFIG_CPU_SUP_HYGON is not set # CONFIG_CPU_SUP_CENTAUR is not set CONFIG_CPU_SUP_TRANSMETA_32=y CONFIG_CPU_SUP_UMC_32=y # CONFIG_CPU_SUP_ZHAOXIN is not set CONFIG_CPU_SUP_VORTEX_32=y CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y CONFIG_DMI=y CONFIG_BOOT_VESA_SUPPORT=y CONFIG_NR_CPUS_RANGE_BEGIN=2 CONFIG_NR_CPUS_RANGE_END=64 CONFIG_NR_CPUS_DEFAULT=32 CONFIG_NR_CPUS=32 CONFIG_SCHED_CLUSTER=y CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_MCE=y CONFIG_X86_MCELOG_LEGACY=y CONFIG_X86_MCE_INTEL=y CONFIG_X86_ANCIENT_MCE=y CONFIG_X86_MCE_THRESHOLD=y CONFIG_X86_MCE_INJECT=y # # Performance monitoring # CONFIG_PERF_EVENTS_INTEL_UNCORE=y CONFIG_PERF_EVENTS_INTEL_RAPL=y CONFIG_PERF_EVENTS_INTEL_CSTATE=y # end of Performance monitoring CONFIG_X86_LEGACY_VM86=y CONFIG_VM86=y CONFIG_X86_16BIT=y CONFIG_X86_ESPFIX32=y CONFIG_X86_IOPL_IOPERM=y CONFIG_TOSHIBA=y CONFIG_X86_REBOOTFIXUPS=y CONFIG_MICROCODE=y CONFIG_MICROCODE_INTEL=y CONFIG_MICROCODE_LATE_LOADING=y CONFIG_X86_MSR=y CONFIG_X86_CPUID=y # CONFIG_NOHIGHMEM is not set CONFIG_HIGHMEM4G=y # CONFIG_HIGHMEM64G is not set CONFIG_VMSPLIT_3G=y # CONFIG_VMSPLIT_3G_OPT is not set # CONFIG_VMSPLIT_2G is not set # CONFIG_VMSPLIT_2G_OPT is not set # CONFIG_VMSPLIT_1G is not set CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_HIGHMEM=y CONFIG_X86_CPA_STATISTICS=y CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ILLEGAL_POINTER_VALUE=0 CONFIG_HIGHPTE=y CONFIG_X86_CHECK_BIOS_CORRUPTION=y CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y CONFIG_MTRR=y CONFIG_MTRR_SANITIZER=y CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT=0 CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT=1 CONFIG_X86_PAT=y CONFIG_ARCH_USES_PG_UNCACHED=y CONFIG_X86_UMIP=y CONFIG_CC_HAS_IBT=y CONFIG_X86_INTEL_TSX_MODE_OFF=y # CONFIG_X86_INTEL_TSX_MODE_ON is not set # CONFIG_X86_INTEL_TSX_MODE_AUTO is not set CONFIG_EFI=y CONFIG_EFI_STUB=y CONFIG_EFI_HANDOVER_PROTOCOL=y CONFIG_EFI_FAKE_MEMMAP=y CONFIG_EFI_MAX_FAKE_MEM=8 CONFIG_EFI_RUNTIME_MAP=y # CONFIG_HZ_100 is not set CONFIG_HZ_250=y # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 CONFIG_SCHED_HRTICK=y CONFIG_KEXEC=y CONFIG_CRASH_DUMP=y CONFIG_KEXEC_JUMP=y CONFIG_PHYSICAL_START=0x1000000 CONFIG_RELOCATABLE=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_X86_NEED_RELOCS=y CONFIG_PHYSICAL_ALIGN=0x200000 CONFIG_HOTPLUG_CPU=y # CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set # CONFIG_DEBUG_HOTPLUG_CPU0 is not set CONFIG_COMPAT_VDSO=y # CONFIG_CMDLINE_BOOL is not set CONFIG_MODIFY_LDT_SYSCALL=y CONFIG_STRICT_SIGALTSTACK_SIZE=y # end of Processor type and features CONFIG_CC_HAS_ENTRY_PADDING=y CONFIG_FUNCTION_PADDING_CFI=0 CONFIG_FUNCTION_PADDING_BYTES=4 CONFIG_SPECULATION_MITIGATIONS=y CONFIG_RETPOLINE=y CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y # # Power management and ACPI options # CONFIG_ARCH_HIBERNATION_HEADER=y CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y CONFIG_SUSPEND_SKIP_SYNC=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y CONFIG_PM_AUTOSLEEP=y CONFIG_PM_USERSPACE_AUTOSLEEP=y CONFIG_PM_WAKELOCKS=y CONFIG_PM_WAKELOCKS_LIMIT=100 CONFIG_PM_WAKELOCKS_GC=y CONFIG_PM=y CONFIG_PM_DEBUG=y CONFIG_PM_ADVANCED_DEBUG=y # CONFIG_PM_TEST_SUSPEND is not set CONFIG_PM_SLEEP_DEBUG=y CONFIG_DPM_WATCHDOG=y CONFIG_DPM_WATCHDOG_TIMEOUT=120 CONFIG_PM_TRACE=y CONFIG_PM_TRACE_RTC=y CONFIG_PM_CLK=y CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y CONFIG_ENERGY_MODEL=y CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_TABLE_LIB=y CONFIG_ACPI_DEBUGGER=y CONFIG_ACPI_DEBUGGER_USER=y CONFIG_ACPI_SPCR_TABLE=y CONFIG_ACPI_SLEEP=y CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y CONFIG_ACPI_EC_DEBUGFS=y CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_VIDEO=y CONFIG_ACPI_FAN=y CONFIG_ACPI_TAD=y CONFIG_ACPI_DOCK=y CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_IPMI=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_PROCESSOR_AGGREGATOR=y CONFIG_ACPI_THERMAL=y CONFIG_ACPI_PLATFORM_PROFILE=y CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_DEBUG=y CONFIG_ACPI_PCI_SLOT=y CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_IOAPIC=y CONFIG_ACPI_SBS=y CONFIG_ACPI_HED=y CONFIG_ACPI_CUSTOM_METHOD=y CONFIG_ACPI_BGRT=y # CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_ACPI_APEI=y CONFIG_ACPI_APEI_GHES=y CONFIG_ACPI_APEI_PCIEAER=y CONFIG_ACPI_APEI_MEMORY_FAILURE=y CONFIG_ACPI_APEI_EINJ=y CONFIG_ACPI_APEI_ERST_DEBUG=y CONFIG_ACPI_DPTF=y CONFIG_DPTF_POWER=y CONFIG_DPTF_PCH_FIVR=y CONFIG_ACPI_WATCHDOG=y CONFIG_ACPI_EXTLOG=y CONFIG_ACPI_CONFIGFS=y CONFIG_ACPI_PCC=y CONFIG_ACPI_FFH=y CONFIG_PMIC_OPREGION=y CONFIG_BYTCRC_PMIC_OPREGION=y CONFIG_CHTCRC_PMIC_OPREGION=y CONFIG_XPOWER_PMIC_OPREGION=y CONFIG_BXT_WC_PMIC_OPREGION=y CONFIG_CHT_WC_PMIC_OPREGION=y CONFIG_CHT_DC_TI_PMIC_OPREGION=y CONFIG_TPS68470_PMIC_OPREGION=y CONFIG_ACPI_VIOT=y CONFIG_X86_PM_TIMER=y CONFIG_X86_APM_BOOT=y CONFIG_APM=y CONFIG_APM_IGNORE_USER_SUSPEND=y CONFIG_APM_DO_ENABLE=y CONFIG_APM_CPU_IDLE=y CONFIG_APM_DISPLAY_BLANK=y CONFIG_APM_ALLOW_INTS=y # # CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # # CPU frequency scaling drivers # CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_X86_INTEL_PSTATE=y CONFIG_X86_PCC_CPUFREQ=y # CONFIG_X86_AMD_PSTATE is not set # CONFIG_X86_AMD_PSTATE_UT is not set CONFIG_X86_ACPI_CPUFREQ=y CONFIG_X86_POWERNOW_K6=y CONFIG_X86_POWERNOW_K7=y CONFIG_X86_POWERNOW_K7_ACPI=y # CONFIG_X86_POWERNOW_K8 is not set CONFIG_X86_GX_SUSPMOD=y CONFIG_X86_SPEEDSTEP_CENTRINO=y CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE=y CONFIG_X86_SPEEDSTEP_ICH=y CONFIG_X86_SPEEDSTEP_SMI=y CONFIG_X86_P4_CLOCKMOD=y CONFIG_X86_CPUFREQ_NFORCE2=y CONFIG_X86_LONGRUN=y CONFIG_X86_LONGHAUL=y CONFIG_X86_E_POWERSAVER=y # # shared options # CONFIG_X86_SPEEDSTEP_LIB=y CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK=y # end of CPU Frequency scaling # # CPU Idle # CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_IDLE_GOV_TEO=y CONFIG_CPU_IDLE_GOV_HALTPOLL=y CONFIG_HALTPOLL_CPUIDLE=y # end of CPU Idle CONFIG_INTEL_IDLE=y # end of Power management and ACPI options # # Bus options (PCI etc.) # # CONFIG_PCI_GOBIOS is not set # CONFIG_PCI_GOMMCONFIG is not set # CONFIG_PCI_GODIRECT is not set # CONFIG_PCI_GOOLPC is not set CONFIG_PCI_GOANY=y CONFIG_PCI_BIOS=y CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y CONFIG_PCI_OLPC=y CONFIG_PCI_CNB20LE_QUIRK=y CONFIG_ISA_BUS=y CONFIG_ISA_DMA_API=y CONFIG_ISA=y CONFIG_SCx200=y CONFIG_SCx200HR_TIMER=y CONFIG_OLPC=y CONFIG_OLPC_XO1_PM=y CONFIG_OLPC_XO1_RTC=y CONFIG_OLPC_XO1_SCI=y CONFIG_OLPC_XO15_SCI=y CONFIG_ALIX=y CONFIG_NET5501=y CONFIG_GEOS=y # end of Bus options (PCI etc.) # # Binary Emulations # CONFIG_COMPAT_32=y # end of Binary Emulations CONFIG_HAVE_ATOMIC_IOMAP=y CONFIG_HAVE_KVM=y CONFIG_HAVE_KVM_PFNCACHE=y CONFIG_HAVE_KVM_IRQCHIP=y CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y CONFIG_HAVE_KVM_DIRTY_RING=y CONFIG_HAVE_KVM_DIRTY_RING_TSO=y CONFIG_HAVE_KVM_DIRTY_RING_ACQ_REL=y CONFIG_HAVE_KVM_EVENTFD=y CONFIG_KVM_MMIO=y CONFIG_KVM_ASYNC_PF=y CONFIG_HAVE_KVM_MSI=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_NO_POLL=y CONFIG_KVM_XFER_TO_GUEST_WORK=y CONFIG_HAVE_KVM_PM_NOTIFIER=y CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y # CONFIG_KVM_WERROR is not set CONFIG_KVM_INTEL=y # CONFIG_KVM_AMD is not set CONFIG_KVM_SMM=y CONFIG_KVM_XEN=y CONFIG_AS_AVX512=y CONFIG_AS_SHA1_NI=y CONFIG_AS_SHA256_NI=y CONFIG_AS_TPAUSE=y CONFIG_AS_GFNI=y # # General architecture-dependent options # CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y CONFIG_HOTPLUG_SMT=y CONFIG_GENERIC_ENTRY=y CONFIG_KPROBES=y CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set # CONFIG_STATIC_CALL_SELFTEST is not set CONFIG_OPTPROBES=y CONFIG_KPROBES_ON_FTRACE=y CONFIG_UPROBES=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_KRETPROBES=y CONFIG_KRETPROBE_ON_RETHOOK=y CONFIG_USER_RETURN_NOTIFIER=y CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_OPTPROBES=y CONFIG_HAVE_KPROBES_ON_FTRACE=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SET_DIRECT_MAP=y CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y CONFIG_HAVE_USER_RETURN_NOTIFIER=y CONFIG_HAVE_PERF_EVENTS_NMI=y CONFIG_HAVE_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y CONFIG_MMU_GATHER_TABLE_FREE=y CONFIG_MMU_GATHER_RCU_TABLE_FREE=y CONFIG_MMU_GATHER_MERGE_VMAS=y CONFIG_MMU_LAZY_TLB_REFCOUNT=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_ARCH_HAS_NMI_SAFE_THIS_CPU_OPS=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_HAVE_ARCH_SECCOMP=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_SECCOMP=y CONFIG_SECCOMP_FILTER=y CONFIG_SECCOMP_CACHE_DEBUG=y CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_REL=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_HAVE_EXIT_THREAD=y CONFIG_ARCH_MMAP_RND_BITS=8 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_ISA_BUS_API=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y CONFIG_OLD_SIGACTION=y CONFIG_COMPAT_32BIT_TIME=y CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=y CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y CONFIG_STRICT_KERNEL_RWX=y CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_STRICT_MODULE_RWX=y CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y CONFIG_ARCH_USE_MEMREMAP_PROT=y CONFIG_LOCK_EVENT_COUNTS=y CONFIG_ARCH_HAS_MEM_ENCRYPT=y CONFIG_HAVE_STATIC_CALL=y CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_CALL=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SPLIT_ARG64=y CONFIG_ARCH_HAS_PARANOID_L1D_FLUSH=y CONFIG_DYNAMIC_SIGFRAME=y # # GCOV-based kernel profiling # CONFIG_GCOV_KERNEL=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y # CONFIG_GCOV_PROFILE_ALL is not set # end of GCOV-based kernel profiling CONFIG_HAVE_GCC_PLUGINS=y CONFIG_FUNCTION_ALIGNMENT_4B=y CONFIG_FUNCTION_ALIGNMENT=4 # end of General architecture-dependent options CONFIG_RT_MUTEXES=y CONFIG_BASE_SMALL=0 CONFIG_MODULE_SIG_FORMAT=y CONFIG_MODULES=y CONFIG_MODULE_DEBUGFS=y CONFIG_MODULE_DEBUG=y CONFIG_MODULE_STATS=y CONFIG_MODULE_DEBUG_AUTOLOAD_DUPS=y CONFIG_MODULE_DEBUG_AUTOLOAD_DUPS_TRACE=y CONFIG_MODULE_FORCE_LOAD=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y CONFIG_MODULE_UNLOAD_TAINT_TRACKING=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_MODULE_SIG=y CONFIG_MODULE_SIG_FORCE=y CONFIG_MODULE_SIG_ALL=y CONFIG_MODULE_SIG_SHA1=y # CONFIG_MODULE_SIG_SHA224 is not set # CONFIG_MODULE_SIG_SHA256 is not set # CONFIG_MODULE_SIG_SHA384 is not set # CONFIG_MODULE_SIG_SHA512 is not set CONFIG_MODULE_SIG_HASH="sha1" CONFIG_MODULE_COMPRESS_NONE=y # CONFIG_MODULE_COMPRESS_GZIP is not set # CONFIG_MODULE_COMPRESS_XZ is not set # CONFIG_MODULE_COMPRESS_ZSTD is not set CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y CONFIG_MODPROBE_PATH="/sbin/modprobe" # CONFIG_TRIM_UNUSED_KSYMS is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_BLOCK=y CONFIG_BLOCK_LEGACY_AUTOLOAD=y CONFIG_BLK_RQ_ALLOC_TIME=y CONFIG_BLK_CGROUP_RWSTAT=y CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_ICQ=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y CONFIG_BLK_DEV_INTEGRITY_T10=y CONFIG_BLK_DEV_ZONED=y CONFIG_BLK_DEV_THROTTLING=y CONFIG_BLK_DEV_THROTTLING_LOW=y CONFIG_BLK_WBT=y CONFIG_BLK_WBT_MQ=y CONFIG_BLK_CGROUP_IOLATENCY=y CONFIG_BLK_CGROUP_FC_APPID=y CONFIG_BLK_CGROUP_IOCOST=y CONFIG_BLK_CGROUP_IOPRIO=y CONFIG_BLK_DEBUG_FS=y CONFIG_BLK_DEBUG_FS_ZONED=y CONFIG_BLK_SED_OPAL=y CONFIG_BLK_INLINE_ENCRYPTION=y CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y # # Partition Types # CONFIG_PARTITION_ADVANCED=y CONFIG_ACORN_PARTITION=y CONFIG_ACORN_PARTITION_CUMANA=y CONFIG_ACORN_PARTITION_EESOX=y CONFIG_ACORN_PARTITION_ICS=y CONFIG_ACORN_PARTITION_ADFS=y CONFIG_ACORN_PARTITION_POWERTEC=y CONFIG_ACORN_PARTITION_RISCIX=y CONFIG_AIX_PARTITION=y CONFIG_OSF_PARTITION=y CONFIG_AMIGA_PARTITION=y CONFIG_ATARI_PARTITION=y CONFIG_MAC_PARTITION=y CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y CONFIG_MINIX_SUBPARTITION=y CONFIG_SOLARIS_X86_PARTITION=y CONFIG_UNIXWARE_DISKLABEL=y CONFIG_LDM_PARTITION=y CONFIG_LDM_DEBUG=y CONFIG_SGI_PARTITION=y CONFIG_ULTRIX_PARTITION=y CONFIG_SUN_PARTITION=y CONFIG_KARMA_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_SYSV68_PARTITION=y CONFIG_CMDLINE_PARTITION=y # end of Partition Types CONFIG_BLK_MQ_PCI=y CONFIG_BLK_MQ_VIRTIO=y CONFIG_BLK_PM=y CONFIG_BLOCK_HOLDER_DEPRECATED=y CONFIG_BLK_MQ_STACKING=y # # IO Schedulers # CONFIG_MQ_IOSCHED_DEADLINE=y CONFIG_MQ_IOSCHED_KYBER=y CONFIG_IOSCHED_BFQ=y CONFIG_BFQ_GROUP_IOSCHED=y CONFIG_BFQ_CGROUP_DEBUG=y # end of IO Schedulers CONFIG_PREEMPT_NOTIFIERS=y CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y CONFIG_QUEUED_SPINLOCKS=y CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_QUEUED_RWLOCKS=y CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y CONFIG_ARCH_HAS_SYNC_CORE_BEFORE_USERMODE=y CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y CONFIG_FREEZER=y # # Executable file formats # CONFIG_BINFMT_ELF=y CONFIG_ELFCORE=y CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y CONFIG_BINFMT_SCRIPT=y CONFIG_BINFMT_MISC=y CONFIG_COREDUMP=y # end of Executable file formats # # Memory Management options # CONFIG_ZPOOL=y CONFIG_SWAP=y CONFIG_ZSWAP=y CONFIG_ZSWAP_DEFAULT_ON=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set # CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y # CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set # CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" CONFIG_ZBUD=y CONFIG_Z3FOLD=y CONFIG_ZSMALLOC=y CONFIG_ZSMALLOC_STAT=y CONFIG_ZSMALLOC_CHAIN_SIZE=8 # # SLAB allocator options # # CONFIG_SLAB is not set CONFIG_SLUB=y CONFIG_SLUB_TINY=y CONFIG_SLAB_MERGE_DEFAULT=y # end of SLAB allocator options CONFIG_SHUFFLE_PAGE_ALLOCATOR=y CONFIG_COMPAT_BRK=y CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_SPARSEMEM_STATIC=y CONFIG_HAVE_FAST_GUP=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_CONTIG_ALLOC=y CONFIG_BOUNCE=y CONFIG_MMU_NOTIFIER=y CONFIG_KSM=y CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y CONFIG_HWPOISON_INJECT=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set CONFIG_READ_ONLY_THP_FOR_FS=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_FRONTSWAP=y CONFIG_CMA=y CONFIG_CMA_DEBUG=y CONFIG_CMA_DEBUGFS=y CONFIG_CMA_SYSFS=y CONFIG_CMA_AREAS=7 CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_PAGE_IDLE_FLAG=y CONFIG_IDLE_PAGE_TRACKING=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CURRENT_STACK_POINTER=y CONFIG_ARCH_HAS_ZONE_DMA_SET=y CONFIG_ZONE_DMA=y CONFIG_HMM_MIRROR=y CONFIG_VMAP_PFN=y CONFIG_VM_EVENT_COUNTERS=y CONFIG_PERCPU_STATS=y # CONFIG_GUP_TEST is not set CONFIG_DMAPOOL_TEST=y CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_MAPPING_DIRTY_HELPERS=y CONFIG_KMAP_LOCAL=y CONFIG_SECRETMEM=y CONFIG_ANON_VMA_NAME=y CONFIG_USERFAULTFD=y CONFIG_LRU_GEN=y CONFIG_LRU_GEN_ENABLED=y CONFIG_LRU_GEN_STATS=y # # Data Access Monitoring # CONFIG_DAMON=y CONFIG_DAMON_VADDR=y CONFIG_DAMON_PADDR=y CONFIG_DAMON_SYSFS=y CONFIG_DAMON_DBGFS=y CONFIG_DAMON_RECLAIM=y CONFIG_DAMON_LRU_SORT=y # end of Data Access Monitoring # end of Memory Management options CONFIG_NET=y CONFIG_NET_INGRESS=y CONFIG_NET_EGRESS=y CONFIG_NET_REDIRECT=y CONFIG_SKB_EXTENSIONS=y # # Networking options # CONFIG_PACKET=y CONFIG_PACKET_DIAG=y CONFIG_UNIX=y CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y CONFIG_UNIX_DIAG=y CONFIG_TLS=y CONFIG_TLS_DEVICE=y CONFIG_TLS_TOE=y CONFIG_XFRM=y CONFIG_XFRM_OFFLOAD=y CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y CONFIG_XFRM_INTERFACE=y CONFIG_XFRM_SUB_POLICY=y CONFIG_XFRM_MIGRATE=y CONFIG_XFRM_STATISTICS=y CONFIG_XFRM_AH=y CONFIG_XFRM_ESP=y CONFIG_XFRM_IPCOMP=y CONFIG_NET_KEY=y CONFIG_NET_KEY_MIGRATE=y CONFIG_XFRM_ESPINTCP=y CONFIG_SMC=y CONFIG_SMC_DIAG=y CONFIG_XDP_SOCKETS=y CONFIG_XDP_SOCKETS_DIAG=y CONFIG_NET_HANDSHAKE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y CONFIG_IP_ADVANCED_ROUTER=y CONFIG_IP_FIB_TRIE_STATS=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_ROUTE_CLASSID=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y CONFIG_NET_IPIP=y CONFIG_NET_IPGRE_DEMUX=y CONFIG_NET_IP_TUNNEL=y CONFIG_NET_IPGRE=y CONFIG_NET_IPGRE_BROADCAST=y CONFIG_IP_MROUTE_COMMON=y CONFIG_IP_MROUTE=y CONFIG_IP_MROUTE_MULTIPLE_TABLES=y CONFIG_IP_PIMSM_V1=y CONFIG_IP_PIMSM_V2=y CONFIG_SYN_COOKIES=y CONFIG_NET_IPVTI=y CONFIG_NET_UDP_TUNNEL=y CONFIG_NET_FOU=y CONFIG_NET_FOU_IP_TUNNELS=y CONFIG_INET_AH=y CONFIG_INET_ESP=y CONFIG_INET_ESP_OFFLOAD=y CONFIG_INET_ESPINTCP=y CONFIG_INET_IPCOMP=y CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_XFRM_TUNNEL=y CONFIG_INET_TUNNEL=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y CONFIG_INET_UDP_DIAG=y CONFIG_INET_RAW_DIAG=y CONFIG_INET_DIAG_DESTROY=y CONFIG_TCP_CONG_ADVANCED=y CONFIG_TCP_CONG_BIC=y CONFIG_TCP_CONG_CUBIC=y CONFIG_TCP_CONG_WESTWOOD=y CONFIG_TCP_CONG_HTCP=y CONFIG_TCP_CONG_HSTCP=y CONFIG_TCP_CONG_HYBLA=y CONFIG_TCP_CONG_VEGAS=y CONFIG_TCP_CONG_NV=y CONFIG_TCP_CONG_SCALABLE=y CONFIG_TCP_CONG_LP=y CONFIG_TCP_CONG_VENO=y CONFIG_TCP_CONG_YEAH=y CONFIG_TCP_CONG_ILLINOIS=y CONFIG_TCP_CONG_DCTCP=y CONFIG_TCP_CONG_CDG=y CONFIG_TCP_CONG_BBR=y # CONFIG_DEFAULT_BIC is not set CONFIG_DEFAULT_CUBIC=y # CONFIG_DEFAULT_HTCP is not set # CONFIG_DEFAULT_HYBLA is not set # CONFIG_DEFAULT_VEGAS is not set # CONFIG_DEFAULT_VENO is not set # CONFIG_DEFAULT_WESTWOOD is not set # CONFIG_DEFAULT_DCTCP is not set # CONFIG_DEFAULT_CDG is not set # CONFIG_DEFAULT_BBR is not set # CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y CONFIG_INET6_AH=y CONFIG_INET6_ESP=y CONFIG_INET6_ESP_OFFLOAD=y CONFIG_INET6_ESPINTCP=y CONFIG_INET6_IPCOMP=y CONFIG_IPV6_MIP6=y CONFIG_IPV6_ILA=y CONFIG_INET6_XFRM_TUNNEL=y CONFIG_INET6_TUNNEL=y CONFIG_IPV6_VTI=y CONFIG_IPV6_SIT=y CONFIG_IPV6_SIT_6RD=y CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=y CONFIG_IPV6_GRE=y CONFIG_IPV6_FOU=y CONFIG_IPV6_FOU_TUNNEL=y CONFIG_IPV6_MULTIPLE_TABLES=y CONFIG_IPV6_SUBTREES=y CONFIG_IPV6_MROUTE=y CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y CONFIG_IPV6_PIMSM_V2=y CONFIG_IPV6_SEG6_LWTUNNEL=y CONFIG_IPV6_SEG6_HMAC=y CONFIG_IPV6_SEG6_BPF=y CONFIG_IPV6_RPL_LWTUNNEL=y CONFIG_IPV6_IOAM6_LWTUNNEL=y CONFIG_NETLABEL=y CONFIG_MPTCP=y CONFIG_INET_MPTCP_DIAG=y CONFIG_MPTCP_IPV6=y CONFIG_NETWORK_SECMARK=y CONFIG_NET_PTP_CLASSIFY=y CONFIG_NETWORK_PHY_TIMESTAMPING=y CONFIG_NETFILTER=y CONFIG_NETFILTER_ADVANCED=y CONFIG_BRIDGE_NETFILTER=y # # Core Netfilter Configuration # CONFIG_NETFILTER_INGRESS=y CONFIG_NETFILTER_EGRESS=y CONFIG_NETFILTER_SKIP_EGRESS=y CONFIG_NETFILTER_NETLINK=y CONFIG_NETFILTER_FAMILY_BRIDGE=y CONFIG_NETFILTER_FAMILY_ARP=y CONFIG_NETFILTER_BPF_LINK=y CONFIG_NETFILTER_NETLINK_HOOK=y CONFIG_NETFILTER_NETLINK_ACCT=y CONFIG_NETFILTER_NETLINK_QUEUE=y CONFIG_NETFILTER_NETLINK_LOG=y CONFIG_NETFILTER_NETLINK_OSF=y CONFIG_NF_CONNTRACK=y CONFIG_NF_LOG_SYSLOG=y CONFIG_NETFILTER_CONNCOUNT=y CONFIG_NF_CONNTRACK_MARK=y CONFIG_NF_CONNTRACK_SECMARK=y CONFIG_NF_CONNTRACK_ZONES=y CONFIG_NF_CONNTRACK_PROCFS=y CONFIG_NF_CONNTRACK_EVENTS=y CONFIG_NF_CONNTRACK_TIMEOUT=y CONFIG_NF_CONNTRACK_TIMESTAMP=y CONFIG_NF_CONNTRACK_LABELS=y CONFIG_NF_CONNTRACK_OVS=y CONFIG_NF_CT_PROTO_DCCP=y CONFIG_NF_CT_PROTO_GRE=y CONFIG_NF_CT_PROTO_SCTP=y CONFIG_NF_CT_PROTO_UDPLITE=y CONFIG_NF_CONNTRACK_AMANDA=y CONFIG_NF_CONNTRACK_FTP=y CONFIG_NF_CONNTRACK_H323=y CONFIG_NF_CONNTRACK_IRC=y CONFIG_NF_CONNTRACK_BROADCAST=y CONFIG_NF_CONNTRACK_NETBIOS_NS=y CONFIG_NF_CONNTRACK_SNMP=y CONFIG_NF_CONNTRACK_PPTP=y CONFIG_NF_CONNTRACK_SANE=y CONFIG_NF_CONNTRACK_SIP=y CONFIG_NF_CONNTRACK_TFTP=y CONFIG_NF_CT_NETLINK=y CONFIG_NF_CT_NETLINK_TIMEOUT=y CONFIG_NF_CT_NETLINK_HELPER=y CONFIG_NETFILTER_NETLINK_GLUE_CT=y CONFIG_NF_NAT=y CONFIG_NF_NAT_AMANDA=y CONFIG_NF_NAT_FTP=y CONFIG_NF_NAT_IRC=y CONFIG_NF_NAT_SIP=y CONFIG_NF_NAT_TFTP=y CONFIG_NF_NAT_REDIRECT=y CONFIG_NF_NAT_MASQUERADE=y CONFIG_NF_NAT_OVS=y CONFIG_NETFILTER_SYNPROXY=y CONFIG_NF_TABLES=y CONFIG_NF_TABLES_INET=y CONFIG_NF_TABLES_NETDEV=y CONFIG_NFT_NUMGEN=y CONFIG_NFT_CT=y CONFIG_NFT_CONNLIMIT=y CONFIG_NFT_LOG=y CONFIG_NFT_LIMIT=y CONFIG_NFT_MASQ=y CONFIG_NFT_REDIR=y CONFIG_NFT_NAT=y CONFIG_NFT_TUNNEL=y CONFIG_NFT_QUEUE=y CONFIG_NFT_QUOTA=y CONFIG_NFT_REJECT=y CONFIG_NFT_REJECT_INET=y CONFIG_NFT_COMPAT=y CONFIG_NFT_HASH=y CONFIG_NFT_FIB=y CONFIG_NFT_FIB_INET=y CONFIG_NFT_XFRM=y CONFIG_NFT_SOCKET=y CONFIG_NFT_OSF=y CONFIG_NFT_TPROXY=y CONFIG_NFT_SYNPROXY=y CONFIG_NF_DUP_NETDEV=y CONFIG_NFT_DUP_NETDEV=y CONFIG_NFT_FWD_NETDEV=y CONFIG_NFT_FIB_NETDEV=y CONFIG_NFT_REJECT_NETDEV=y # CONFIG_NF_FLOW_TABLE is not set CONFIG_NETFILTER_XTABLES=y # # Xtables combined modules # CONFIG_NETFILTER_XT_MARK=y CONFIG_NETFILTER_XT_CONNMARK=y CONFIG_NETFILTER_XT_SET=y # # Xtables targets # CONFIG_NETFILTER_XT_TARGET_AUDIT=y CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y CONFIG_NETFILTER_XT_TARGET_CONNMARK=y CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y CONFIG_NETFILTER_XT_TARGET_CT=y CONFIG_NETFILTER_XT_TARGET_DSCP=y CONFIG_NETFILTER_XT_TARGET_HL=y CONFIG_NETFILTER_XT_TARGET_HMARK=y CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y CONFIG_NETFILTER_XT_TARGET_LED=y CONFIG_NETFILTER_XT_TARGET_LOG=y CONFIG_NETFILTER_XT_TARGET_MARK=y CONFIG_NETFILTER_XT_NAT=y CONFIG_NETFILTER_XT_TARGET_NETMAP=y CONFIG_NETFILTER_XT_TARGET_NFLOG=y CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y CONFIG_NETFILTER_XT_TARGET_NOTRACK=y CONFIG_NETFILTER_XT_TARGET_RATEEST=y CONFIG_NETFILTER_XT_TARGET_REDIRECT=y CONFIG_NETFILTER_XT_TARGET_MASQUERADE=y CONFIG_NETFILTER_XT_TARGET_TEE=y CONFIG_NETFILTER_XT_TARGET_TPROXY=y CONFIG_NETFILTER_XT_TARGET_TRACE=y CONFIG_NETFILTER_XT_TARGET_SECMARK=y CONFIG_NETFILTER_XT_TARGET_TCPMSS=y CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=y # # Xtables matches # CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y CONFIG_NETFILTER_XT_MATCH_BPF=y CONFIG_NETFILTER_XT_MATCH_CGROUP=y CONFIG_NETFILTER_XT_MATCH_CLUSTER=y CONFIG_NETFILTER_XT_MATCH_COMMENT=y CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y CONFIG_NETFILTER_XT_MATCH_CONNLABEL=y CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y CONFIG_NETFILTER_XT_MATCH_CONNMARK=y CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y CONFIG_NETFILTER_XT_MATCH_CPU=y CONFIG_NETFILTER_XT_MATCH_DCCP=y CONFIG_NETFILTER_XT_MATCH_DEVGROUP=y CONFIG_NETFILTER_XT_MATCH_DSCP=y CONFIG_NETFILTER_XT_MATCH_ECN=y CONFIG_NETFILTER_XT_MATCH_ESP=y CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y CONFIG_NETFILTER_XT_MATCH_HELPER=y CONFIG_NETFILTER_XT_MATCH_HL=y CONFIG_NETFILTER_XT_MATCH_IPCOMP=y CONFIG_NETFILTER_XT_MATCH_IPRANGE=y CONFIG_NETFILTER_XT_MATCH_IPVS=y CONFIG_NETFILTER_XT_MATCH_L2TP=y CONFIG_NETFILTER_XT_MATCH_LENGTH=y CONFIG_NETFILTER_XT_MATCH_LIMIT=y CONFIG_NETFILTER_XT_MATCH_MAC=y CONFIG_NETFILTER_XT_MATCH_MARK=y CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y CONFIG_NETFILTER_XT_MATCH_NFACCT=y CONFIG_NETFILTER_XT_MATCH_OSF=y CONFIG_NETFILTER_XT_MATCH_OWNER=y CONFIG_NETFILTER_XT_MATCH_POLICY=y CONFIG_NETFILTER_XT_MATCH_PHYSDEV=y CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y CONFIG_NETFILTER_XT_MATCH_QUOTA=y CONFIG_NETFILTER_XT_MATCH_RATEEST=y CONFIG_NETFILTER_XT_MATCH_REALM=y CONFIG_NETFILTER_XT_MATCH_RECENT=y CONFIG_NETFILTER_XT_MATCH_SCTP=y CONFIG_NETFILTER_XT_MATCH_SOCKET=y CONFIG_NETFILTER_XT_MATCH_STATE=y CONFIG_NETFILTER_XT_MATCH_STATISTIC=y CONFIG_NETFILTER_XT_MATCH_STRING=y CONFIG_NETFILTER_XT_MATCH_TCPMSS=y CONFIG_NETFILTER_XT_MATCH_TIME=y CONFIG_NETFILTER_XT_MATCH_U32=y # end of Core Netfilter Configuration CONFIG_IP_SET=y CONFIG_IP_SET_MAX=256 CONFIG_IP_SET_BITMAP_IP=y CONFIG_IP_SET_BITMAP_IPMAC=y CONFIG_IP_SET_BITMAP_PORT=y CONFIG_IP_SET_HASH_IP=y CONFIG_IP_SET_HASH_IPMARK=y CONFIG_IP_SET_HASH_IPPORT=y CONFIG_IP_SET_HASH_IPPORTIP=y CONFIG_IP_SET_HASH_IPPORTNET=y CONFIG_IP_SET_HASH_IPMAC=y CONFIG_IP_SET_HASH_MAC=y CONFIG_IP_SET_HASH_NETPORTNET=y CONFIG_IP_SET_HASH_NET=y CONFIG_IP_SET_HASH_NETNET=y CONFIG_IP_SET_HASH_NETPORT=y CONFIG_IP_SET_HASH_NETIFACE=y CONFIG_IP_SET_LIST_SET=y CONFIG_IP_VS=y CONFIG_IP_VS_IPV6=y CONFIG_IP_VS_DEBUG=y CONFIG_IP_VS_TAB_BITS=12 # # IPVS transport protocol load balancing support # CONFIG_IP_VS_PROTO_TCP=y CONFIG_IP_VS_PROTO_UDP=y CONFIG_IP_VS_PROTO_AH_ESP=y CONFIG_IP_VS_PROTO_ESP=y CONFIG_IP_VS_PROTO_AH=y CONFIG_IP_VS_PROTO_SCTP=y # # IPVS scheduler # CONFIG_IP_VS_RR=y CONFIG_IP_VS_WRR=y CONFIG_IP_VS_LC=y CONFIG_IP_VS_WLC=y CONFIG_IP_VS_FO=y CONFIG_IP_VS_OVF=y CONFIG_IP_VS_LBLC=y CONFIG_IP_VS_LBLCR=y CONFIG_IP_VS_DH=y CONFIG_IP_VS_SH=y CONFIG_IP_VS_MH=y CONFIG_IP_VS_SED=y CONFIG_IP_VS_NQ=y CONFIG_IP_VS_TWOS=y # # IPVS SH scheduler # CONFIG_IP_VS_SH_TAB_BITS=8 # # IPVS MH scheduler # CONFIG_IP_VS_MH_TAB_INDEX=12 # # IPVS application helper # CONFIG_IP_VS_FTP=y CONFIG_IP_VS_NFCT=y CONFIG_IP_VS_PE_SIP=y # # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=y CONFIG_NF_SOCKET_IPV4=y CONFIG_NF_TPROXY_IPV4=y CONFIG_NF_TABLES_IPV4=y CONFIG_NFT_REJECT_IPV4=y CONFIG_NFT_DUP_IPV4=y CONFIG_NFT_FIB_IPV4=y CONFIG_NF_TABLES_ARP=y CONFIG_NF_DUP_IPV4=y CONFIG_NF_LOG_ARP=y CONFIG_NF_LOG_IPV4=y CONFIG_NF_REJECT_IPV4=y CONFIG_NF_NAT_SNMP_BASIC=y CONFIG_NF_NAT_PPTP=y CONFIG_NF_NAT_H323=y CONFIG_IP_NF_IPTABLES=y CONFIG_IP_NF_MATCH_AH=y CONFIG_IP_NF_MATCH_ECN=y CONFIG_IP_NF_MATCH_RPFILTER=y CONFIG_IP_NF_MATCH_TTL=y CONFIG_IP_NF_FILTER=y CONFIG_IP_NF_TARGET_REJECT=y CONFIG_IP_NF_TARGET_SYNPROXY=y CONFIG_IP_NF_NAT=y CONFIG_IP_NF_TARGET_MASQUERADE=y CONFIG_IP_NF_TARGET_NETMAP=y CONFIG_IP_NF_TARGET_REDIRECT=y CONFIG_IP_NF_MANGLE=y CONFIG_IP_NF_TARGET_ECN=y CONFIG_IP_NF_TARGET_TTL=y CONFIG_IP_NF_RAW=y CONFIG_IP_NF_SECURITY=y CONFIG_IP_NF_ARPTABLES=y CONFIG_IP_NF_ARPFILTER=y CONFIG_IP_NF_ARP_MANGLE=y # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # CONFIG_NF_SOCKET_IPV6=y CONFIG_NF_TPROXY_IPV6=y CONFIG_NF_TABLES_IPV6=y CONFIG_NFT_REJECT_IPV6=y CONFIG_NFT_DUP_IPV6=y CONFIG_NFT_FIB_IPV6=y CONFIG_NF_DUP_IPV6=y CONFIG_NF_REJECT_IPV6=y CONFIG_NF_LOG_IPV6=y CONFIG_IP6_NF_IPTABLES=y CONFIG_IP6_NF_MATCH_AH=y CONFIG_IP6_NF_MATCH_EUI64=y CONFIG_IP6_NF_MATCH_FRAG=y CONFIG_IP6_NF_MATCH_OPTS=y CONFIG_IP6_NF_MATCH_HL=y CONFIG_IP6_NF_MATCH_IPV6HEADER=y CONFIG_IP6_NF_MATCH_MH=y CONFIG_IP6_NF_MATCH_RPFILTER=y CONFIG_IP6_NF_MATCH_RT=y CONFIG_IP6_NF_MATCH_SRH=y CONFIG_IP6_NF_TARGET_HL=y CONFIG_IP6_NF_FILTER=y CONFIG_IP6_NF_TARGET_REJECT=y CONFIG_IP6_NF_TARGET_SYNPROXY=y CONFIG_IP6_NF_MANGLE=y CONFIG_IP6_NF_RAW=y CONFIG_IP6_NF_SECURITY=y CONFIG_IP6_NF_NAT=y CONFIG_IP6_NF_TARGET_MASQUERADE=y CONFIG_IP6_NF_TARGET_NPT=y # end of IPv6: Netfilter Configuration CONFIG_NF_DEFRAG_IPV6=y CONFIG_NF_TABLES_BRIDGE=y CONFIG_NFT_BRIDGE_META=y CONFIG_NFT_BRIDGE_REJECT=y CONFIG_NF_CONNTRACK_BRIDGE=y CONFIG_BRIDGE_NF_EBTABLES=y CONFIG_BRIDGE_EBT_BROUTE=y CONFIG_BRIDGE_EBT_T_FILTER=y CONFIG_BRIDGE_EBT_T_NAT=y CONFIG_BRIDGE_EBT_802_3=y CONFIG_BRIDGE_EBT_AMONG=y CONFIG_BRIDGE_EBT_ARP=y CONFIG_BRIDGE_EBT_IP=y CONFIG_BRIDGE_EBT_IP6=y CONFIG_BRIDGE_EBT_LIMIT=y CONFIG_BRIDGE_EBT_MARK=y CONFIG_BRIDGE_EBT_PKTTYPE=y CONFIG_BRIDGE_EBT_STP=y CONFIG_BRIDGE_EBT_VLAN=y CONFIG_BRIDGE_EBT_ARPREPLY=y CONFIG_BRIDGE_EBT_DNAT=y CONFIG_BRIDGE_EBT_MARK_T=y CONFIG_BRIDGE_EBT_REDIRECT=y CONFIG_BRIDGE_EBT_SNAT=y CONFIG_BRIDGE_EBT_LOG=y CONFIG_BRIDGE_EBT_NFLOG=y CONFIG_BPFILTER=y CONFIG_BPFILTER_UMH=y CONFIG_IP_DCCP=y CONFIG_INET_DCCP_DIAG=y # # DCCP CCIDs Configuration # CONFIG_IP_DCCP_CCID2_DEBUG=y CONFIG_IP_DCCP_CCID3=y CONFIG_IP_DCCP_CCID3_DEBUG=y CONFIG_IP_DCCP_TFRC_LIB=y CONFIG_IP_DCCP_TFRC_DEBUG=y # end of DCCP CCIDs Configuration # # DCCP Kernel Hacking # CONFIG_IP_DCCP_DEBUG=y # end of DCCP Kernel Hacking CONFIG_IP_SCTP=y CONFIG_SCTP_DBG_OBJCNT=y CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1 is not set # CONFIG_SCTP_DEFAULT_COOKIE_HMAC_NONE is not set CONFIG_SCTP_COOKIE_HMAC_MD5=y CONFIG_SCTP_COOKIE_HMAC_SHA1=y CONFIG_INET_SCTP_DIAG=y # CONFIG_RDS is not set CONFIG_TIPC=y CONFIG_TIPC_MEDIA_IB=y CONFIG_TIPC_MEDIA_UDP=y CONFIG_TIPC_CRYPTO=y CONFIG_TIPC_DIAG=y CONFIG_ATM=y CONFIG_ATM_CLIP=y CONFIG_ATM_CLIP_NO_ICMP=y CONFIG_ATM_LANE=y CONFIG_ATM_MPOA=y CONFIG_ATM_BR2684=y CONFIG_ATM_BR2684_IPFILTER=y CONFIG_L2TP=y CONFIG_L2TP_DEBUGFS=y CONFIG_L2TP_V3=y CONFIG_L2TP_IP=y CONFIG_L2TP_ETH=y CONFIG_STP=y CONFIG_GARP=y CONFIG_MRP=y CONFIG_BRIDGE=y CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_BRIDGE_MRP=y CONFIG_BRIDGE_CFM=y CONFIG_NET_DSA=y CONFIG_NET_DSA_TAG_NONE=y CONFIG_NET_DSA_TAG_AR9331=y CONFIG_NET_DSA_TAG_BRCM_COMMON=y CONFIG_NET_DSA_TAG_BRCM=y CONFIG_NET_DSA_TAG_BRCM_LEGACY=y CONFIG_NET_DSA_TAG_BRCM_PREPEND=y CONFIG_NET_DSA_TAG_HELLCREEK=y CONFIG_NET_DSA_TAG_GSWIP=y CONFIG_NET_DSA_TAG_DSA_COMMON=y CONFIG_NET_DSA_TAG_DSA=y CONFIG_NET_DSA_TAG_EDSA=y CONFIG_NET_DSA_TAG_MTK=y CONFIG_NET_DSA_TAG_KSZ=y CONFIG_NET_DSA_TAG_OCELOT=y CONFIG_NET_DSA_TAG_OCELOT_8021Q=y CONFIG_NET_DSA_TAG_QCA=y CONFIG_NET_DSA_TAG_RTL4_A=y CONFIG_NET_DSA_TAG_RTL8_4=y CONFIG_NET_DSA_TAG_RZN1_A5PSW=y CONFIG_NET_DSA_TAG_LAN9303=y CONFIG_NET_DSA_TAG_SJA1105=y CONFIG_NET_DSA_TAG_TRAILER=y CONFIG_NET_DSA_TAG_XRS700X=y CONFIG_VLAN_8021Q=y CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y CONFIG_LLC=y CONFIG_LLC2=y CONFIG_ATALK=y CONFIG_DEV_APPLETALK=y # CONFIG_COPS is not set CONFIG_IPDDP=y CONFIG_IPDDP_ENCAP=y CONFIG_X25=y CONFIG_LAPB=y CONFIG_PHONET=y CONFIG_6LOWPAN=y CONFIG_6LOWPAN_DEBUGFS=y CONFIG_6LOWPAN_NHC=y CONFIG_6LOWPAN_NHC_DEST=y CONFIG_6LOWPAN_NHC_FRAGMENT=y CONFIG_6LOWPAN_NHC_HOP=y CONFIG_6LOWPAN_NHC_IPV6=y CONFIG_6LOWPAN_NHC_MOBILITY=y CONFIG_6LOWPAN_NHC_ROUTING=y CONFIG_6LOWPAN_NHC_UDP=y CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=y CONFIG_6LOWPAN_GHC_UDP=y CONFIG_6LOWPAN_GHC_ICMPV6=y CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=y CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=y CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=y CONFIG_IEEE802154=y CONFIG_IEEE802154_NL802154_EXPERIMENTAL=y CONFIG_IEEE802154_SOCKET=y CONFIG_IEEE802154_6LOWPAN=y CONFIG_MAC802154=y CONFIG_NET_SCHED=y # # Queueing/Scheduling # CONFIG_NET_SCH_HTB=y CONFIG_NET_SCH_HFSC=y CONFIG_NET_SCH_PRIO=y CONFIG_NET_SCH_MULTIQ=y CONFIG_NET_SCH_RED=y CONFIG_NET_SCH_SFB=y CONFIG_NET_SCH_SFQ=y CONFIG_NET_SCH_TEQL=y CONFIG_NET_SCH_TBF=y CONFIG_NET_SCH_CBS=y CONFIG_NET_SCH_ETF=y CONFIG_NET_SCH_MQPRIO_LIB=y CONFIG_NET_SCH_TAPRIO=y CONFIG_NET_SCH_GRED=y CONFIG_NET_SCH_NETEM=y CONFIG_NET_SCH_DRR=y CONFIG_NET_SCH_MQPRIO=y CONFIG_NET_SCH_SKBPRIO=y CONFIG_NET_SCH_CHOKE=y CONFIG_NET_SCH_QFQ=y CONFIG_NET_SCH_CODEL=y CONFIG_NET_SCH_FQ_CODEL=y CONFIG_NET_SCH_CAKE=y CONFIG_NET_SCH_FQ=y CONFIG_NET_SCH_HHF=y CONFIG_NET_SCH_PIE=y CONFIG_NET_SCH_FQ_PIE=y CONFIG_NET_SCH_INGRESS=y CONFIG_NET_SCH_PLUG=y CONFIG_NET_SCH_ETS=y CONFIG_NET_SCH_DEFAULT=y # CONFIG_DEFAULT_FQ is not set # CONFIG_DEFAULT_CODEL is not set # CONFIG_DEFAULT_FQ_CODEL is not set # CONFIG_DEFAULT_FQ_PIE is not set # CONFIG_DEFAULT_SFQ is not set CONFIG_DEFAULT_PFIFO_FAST=y CONFIG_DEFAULT_NET_SCH="pfifo_fast" # # Classification # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=y CONFIG_NET_CLS_ROUTE4=y CONFIG_NET_CLS_FW=y CONFIG_NET_CLS_U32=y CONFIG_CLS_U32_PERF=y CONFIG_CLS_U32_MARK=y CONFIG_NET_CLS_FLOW=y CONFIG_NET_CLS_CGROUP=y CONFIG_NET_CLS_BPF=y CONFIG_NET_CLS_FLOWER=y CONFIG_NET_CLS_MATCHALL=y CONFIG_NET_EMATCH=y CONFIG_NET_EMATCH_STACK=32 CONFIG_NET_EMATCH_CMP=y CONFIG_NET_EMATCH_NBYTE=y CONFIG_NET_EMATCH_U32=y CONFIG_NET_EMATCH_META=y CONFIG_NET_EMATCH_TEXT=y CONFIG_NET_EMATCH_CANID=y CONFIG_NET_EMATCH_IPSET=y CONFIG_NET_EMATCH_IPT=y CONFIG_NET_CLS_ACT=y CONFIG_NET_ACT_POLICE=y CONFIG_NET_ACT_GACT=y CONFIG_GACT_PROB=y CONFIG_NET_ACT_MIRRED=y CONFIG_NET_ACT_SAMPLE=y CONFIG_NET_ACT_IPT=y CONFIG_NET_ACT_NAT=y CONFIG_NET_ACT_PEDIT=y CONFIG_NET_ACT_SIMP=y CONFIG_NET_ACT_SKBEDIT=y CONFIG_NET_ACT_CSUM=y CONFIG_NET_ACT_MPLS=y CONFIG_NET_ACT_VLAN=y CONFIG_NET_ACT_BPF=y CONFIG_NET_ACT_CONNMARK=y CONFIG_NET_ACT_CTINFO=y CONFIG_NET_ACT_SKBMOD=y CONFIG_NET_ACT_IFE=y CONFIG_NET_ACT_TUNNEL_KEY=y CONFIG_NET_ACT_GATE=y CONFIG_NET_IFE_SKBMARK=y CONFIG_NET_IFE_SKBPRIO=y CONFIG_NET_IFE_SKBTCINDEX=y CONFIG_NET_TC_SKB_EXT=y CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=y CONFIG_BATMAN_ADV=y CONFIG_BATMAN_ADV_BATMAN_V=y CONFIG_BATMAN_ADV_BLA=y CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_NC=y CONFIG_BATMAN_ADV_MCAST=y CONFIG_BATMAN_ADV_DEBUG=y CONFIG_BATMAN_ADV_TRACING=y CONFIG_OPENVSWITCH=y CONFIG_OPENVSWITCH_GRE=y CONFIG_OPENVSWITCH_VXLAN=y CONFIG_OPENVSWITCH_GENEVE=y CONFIG_VSOCKETS=y CONFIG_VSOCKETS_DIAG=y CONFIG_VSOCKETS_LOOPBACK=y CONFIG_VMWARE_VMCI_VSOCKETS=y CONFIG_VIRTIO_VSOCKETS=y CONFIG_VIRTIO_VSOCKETS_COMMON=y CONFIG_HYPERV_VSOCKETS=y CONFIG_NETLINK_DIAG=y CONFIG_MPLS=y CONFIG_NET_MPLS_GSO=y CONFIG_MPLS_ROUTING=y CONFIG_MPLS_IPTUNNEL=y CONFIG_NET_NSH=y CONFIG_HSR=y CONFIG_NET_SWITCHDEV=y CONFIG_NET_L3_MASTER_DEV=y CONFIG_QRTR=y CONFIG_QRTR_SMD=y CONFIG_QRTR_TUN=y CONFIG_QRTR_MHI=y CONFIG_NET_NCSI=y CONFIG_NCSI_OEM_CMD_GET_MAC=y CONFIG_NCSI_OEM_CMD_KEEP_PHY=y CONFIG_PCPU_DEV_REFCNT=y CONFIG_MAX_SKB_FRAGS=17 CONFIG_RPS=y CONFIG_RFS_ACCEL=y CONFIG_SOCK_RX_QUEUE_MAPPING=y CONFIG_XPS=y CONFIG_CGROUP_NET_PRIO=y CONFIG_CGROUP_NET_CLASSID=y CONFIG_NET_RX_BUSY_POLL=y CONFIG_BQL=y CONFIG_NET_FLOW_LIMIT=y # # Network testing # CONFIG_NET_PKTGEN=y CONFIG_NET_DROP_MONITOR=y # end of Network testing # end of Networking options CONFIG_HAMRADIO=y # # Packet Radio protocols # CONFIG_AX25=y CONFIG_AX25_DAMA_SLAVE=y CONFIG_NETROM=y CONFIG_ROSE=y # # AX.25 network device drivers # CONFIG_MKISS=y CONFIG_6PACK=y CONFIG_BPQETHER=y CONFIG_SCC=y CONFIG_SCC_DELAY=y CONFIG_SCC_TRXECHO=y CONFIG_BAYCOM_SER_FDX=y CONFIG_BAYCOM_SER_HDX=y CONFIG_BAYCOM_PAR=y CONFIG_BAYCOM_EPP=y CONFIG_YAM=y # end of AX.25 network device drivers CONFIG_CAN=y CONFIG_CAN_RAW=y CONFIG_CAN_BCM=y CONFIG_CAN_GW=y CONFIG_CAN_J1939=y CONFIG_CAN_ISOTP=y CONFIG_BT=y CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=y CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y CONFIG_BT_CMTP=y CONFIG_BT_HIDP=y CONFIG_BT_HS=y CONFIG_BT_LE=y CONFIG_BT_LE_L2CAP_ECRED=y CONFIG_BT_6LOWPAN=y CONFIG_BT_LEDS=y CONFIG_BT_MSFTEXT=y CONFIG_BT_AOSPEXT=y CONFIG_BT_DEBUGFS=y # CONFIG_BT_SELFTEST is not set # # Bluetooth device drivers # CONFIG_BT_INTEL=y CONFIG_BT_BCM=y CONFIG_BT_RTL=y CONFIG_BT_QCA=y CONFIG_BT_MTK=y CONFIG_BT_HCIBTUSB=y CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y CONFIG_BT_HCIBTUSB_POLL_SYNC=y CONFIG_BT_HCIBTUSB_BCM=y CONFIG_BT_HCIBTUSB_MTK=y CONFIG_BT_HCIBTUSB_RTL=y CONFIG_BT_HCIBTSDIO=y CONFIG_BT_HCIUART=y CONFIG_BT_HCIUART_SERDEV=y CONFIG_BT_HCIUART_H4=y CONFIG_BT_HCIUART_NOKIA=y CONFIG_BT_HCIUART_BCSP=y CONFIG_BT_HCIUART_ATH3K=y CONFIG_BT_HCIUART_LL=y CONFIG_BT_HCIUART_3WIRE=y CONFIG_BT_HCIUART_INTEL=y CONFIG_BT_HCIUART_BCM=y CONFIG_BT_HCIUART_RTL=y CONFIG_BT_HCIUART_QCA=y CONFIG_BT_HCIUART_AG6XX=y CONFIG_BT_HCIUART_MRVL=y CONFIG_BT_HCIBCM203X=y CONFIG_BT_HCIBCM4377=y CONFIG_BT_HCIBPA10X=y CONFIG_BT_HCIBFUSB=y CONFIG_BT_HCIDTL1=y CONFIG_BT_HCIBT3C=y CONFIG_BT_HCIBLUECARD=y CONFIG_BT_HCIVHCI=y CONFIG_BT_MRVL=y CONFIG_BT_MRVL_SDIO=y CONFIG_BT_ATH3K=y CONFIG_BT_MTKSDIO=y CONFIG_BT_MTKUART=y CONFIG_BT_HCIRSI=y CONFIG_BT_VIRTIO=y CONFIG_BT_NXPUART=y # end of Bluetooth device drivers CONFIG_AF_RXRPC=y CONFIG_AF_RXRPC_IPV6=y CONFIG_AF_RXRPC_INJECT_LOSS=y CONFIG_AF_RXRPC_INJECT_RX_DELAY=y CONFIG_AF_RXRPC_DEBUG=y CONFIG_RXKAD=y CONFIG_RXPERF=y CONFIG_AF_KCM=y CONFIG_STREAM_PARSER=y CONFIG_MCTP=y CONFIG_MCTP_FLOWS=y CONFIG_FIB_RULES=y CONFIG_WIRELESS=y CONFIG_WIRELESS_EXT=y CONFIG_WEXT_CORE=y CONFIG_WEXT_PROC=y CONFIG_WEXT_SPY=y CONFIG_WEXT_PRIV=y CONFIG_CFG80211=y CONFIG_NL80211_TESTMODE=y CONFIG_CFG80211_DEVELOPER_WARNINGS=y CONFIG_CFG80211_CERTIFICATION_ONUS=y CONFIG_CFG80211_REQUIRE_SIGNED_REGDB=y CONFIG_CFG80211_USE_KERNEL_REGDB_KEYS=y CONFIG_CFG80211_EXTRA_REGDB_KEYDIR="" CONFIG_CFG80211_REG_CELLULAR_HINTS=y CONFIG_CFG80211_REG_RELAX_NO_IR=y CONFIG_CFG80211_DEFAULT_PS=y CONFIG_CFG80211_DEBUGFS=y CONFIG_CFG80211_CRDA_SUPPORT=y CONFIG_CFG80211_WEXT=y CONFIG_CFG80211_WEXT_EXPORT=y CONFIG_LIB80211=y CONFIG_LIB80211_CRYPT_WEP=y CONFIG_LIB80211_CRYPT_CCMP=y CONFIG_LIB80211_CRYPT_TKIP=y CONFIG_LIB80211_DEBUG=y CONFIG_MAC80211=y CONFIG_MAC80211_HAS_RC=y CONFIG_MAC80211_RC_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" CONFIG_MAC80211_MESH=y CONFIG_MAC80211_LEDS=y CONFIG_MAC80211_DEBUGFS=y CONFIG_MAC80211_MESSAGE_TRACING=y CONFIG_MAC80211_DEBUG_MENU=y CONFIG_MAC80211_NOINLINE=y CONFIG_MAC80211_VERBOSE_DEBUG=y CONFIG_MAC80211_MLME_DEBUG=y CONFIG_MAC80211_STA_DEBUG=y CONFIG_MAC80211_HT_DEBUG=y CONFIG_MAC80211_OCB_DEBUG=y CONFIG_MAC80211_IBSS_DEBUG=y CONFIG_MAC80211_PS_DEBUG=y CONFIG_MAC80211_MPL_DEBUG=y CONFIG_MAC80211_MPATH_DEBUG=y CONFIG_MAC80211_MHWMP_DEBUG=y CONFIG_MAC80211_MESH_SYNC_DEBUG=y CONFIG_MAC80211_MESH_CSA_DEBUG=y CONFIG_MAC80211_MESH_PS_DEBUG=y CONFIG_MAC80211_TDLS_DEBUG=y CONFIG_MAC80211_DEBUG_COUNTERS=y CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 CONFIG_RFKILL=y CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y CONFIG_RFKILL_GPIO=y CONFIG_NET_9P=y CONFIG_NET_9P_FD=y CONFIG_NET_9P_VIRTIO=y CONFIG_NET_9P_RDMA=y CONFIG_NET_9P_DEBUG=y CONFIG_CAIF=y CONFIG_CAIF_DEBUG=y CONFIG_CAIF_NETDEV=y CONFIG_CAIF_USB=y CONFIG_CEPH_LIB=y CONFIG_CEPH_LIB_PRETTYDEBUG=y CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y CONFIG_NFC=y CONFIG_NFC_DIGITAL=y CONFIG_NFC_NCI=y CONFIG_NFC_NCI_SPI=y CONFIG_NFC_NCI_UART=y CONFIG_NFC_HCI=y CONFIG_NFC_SHDLC=y # # Near Field Communication (NFC) devices # CONFIG_NFC_TRF7970A=y CONFIG_NFC_MEI_PHY=y CONFIG_NFC_SIM=y CONFIG_NFC_PORT100=y CONFIG_NFC_VIRTUAL_NCI=y CONFIG_NFC_FDP=y CONFIG_NFC_FDP_I2C=y CONFIG_NFC_PN544=y CONFIG_NFC_PN544_I2C=y CONFIG_NFC_PN544_MEI=y CONFIG_NFC_PN533=y CONFIG_NFC_PN533_USB=y CONFIG_NFC_PN533_I2C=y CONFIG_NFC_PN532_UART=y CONFIG_NFC_MICROREAD=y CONFIG_NFC_MICROREAD_I2C=y CONFIG_NFC_MICROREAD_MEI=y CONFIG_NFC_MRVL=y CONFIG_NFC_MRVL_USB=y CONFIG_NFC_MRVL_UART=y CONFIG_NFC_MRVL_I2C=y CONFIG_NFC_MRVL_SPI=y CONFIG_NFC_ST21NFCA=y CONFIG_NFC_ST21NFCA_I2C=y CONFIG_NFC_ST_NCI=y CONFIG_NFC_ST_NCI_I2C=y CONFIG_NFC_ST_NCI_SPI=y CONFIG_NFC_NXP_NCI=y CONFIG_NFC_NXP_NCI_I2C=y CONFIG_NFC_S3FWRN5=y CONFIG_NFC_S3FWRN5_I2C=y CONFIG_NFC_S3FWRN82_UART=y CONFIG_NFC_ST95HF=y # end of Near Field Communication (NFC) devices CONFIG_PSAMPLE=y CONFIG_NET_IFE=y CONFIG_LWTUNNEL=y CONFIG_LWTUNNEL_BPF=y CONFIG_DST_CACHE=y CONFIG_GRO_CELLS=y CONFIG_SOCK_VALIDATE_XMIT=y CONFIG_NET_SELFTESTS=y CONFIG_NET_SOCK_MSG=y CONFIG_NET_DEVLINK=y CONFIG_PAGE_POOL=y CONFIG_PAGE_POOL_STATS=y CONFIG_FAILOVER=y CONFIG_ETHTOOL_NETLINK=y # # Device Drivers # CONFIG_HAVE_EISA=y CONFIG_EISA=y CONFIG_EISA_VLB_PRIMING=y CONFIG_EISA_PCI_EISA=y CONFIG_EISA_VIRTUAL_ROOT=y CONFIG_EISA_NAMES=y CONFIG_HAVE_PCI=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCIEPORTBUS=y CONFIG_HOTPLUG_PCI_PCIE=y CONFIG_PCIEAER=y CONFIG_PCIEAER_INJECT=y CONFIG_PCIE_ECRC=y CONFIG_PCIEASPM=y CONFIG_PCIEASPM_DEFAULT=y # CONFIG_PCIEASPM_POWERSAVE is not set # CONFIG_PCIEASPM_POWER_SUPERSAVE is not set # CONFIG_PCIEASPM_PERFORMANCE is not set CONFIG_PCIE_PME=y CONFIG_PCIE_DPC=y CONFIG_PCIE_PTM=y CONFIG_PCIE_EDR=y CONFIG_PCI_MSI=y CONFIG_PCI_QUIRKS=y # CONFIG_PCI_DEBUG is not set CONFIG_PCI_REALLOC_ENABLE_AUTO=y CONFIG_PCI_STUB=y CONFIG_PCI_PF_STUB=y CONFIG_PCI_ATS=y CONFIG_PCI_DOE=y CONFIG_PCI_ECAM=y CONFIG_PCI_LOCKLESS_CONFIG=y CONFIG_PCI_IOV=y CONFIG_PCI_PRI=y CONFIG_PCI_PASID=y CONFIG_PCI_LABEL=y # CONFIG_PCIE_BUS_TUNE_OFF is not set CONFIG_PCIE_BUS_DEFAULT=y # CONFIG_PCIE_BUS_SAFE is not set # CONFIG_PCIE_BUS_PERFORMANCE is not set # CONFIG_PCIE_BUS_PEER2PEER is not set CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_HOTPLUG_PCI=y CONFIG_HOTPLUG_PCI_COMPAQ=y CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM=y CONFIG_HOTPLUG_PCI_IBM=y CONFIG_HOTPLUG_PCI_ACPI=y CONFIG_HOTPLUG_PCI_ACPI_IBM=y CONFIG_HOTPLUG_PCI_CPCI=y CONFIG_HOTPLUG_PCI_CPCI_ZT5550=y CONFIG_HOTPLUG_PCI_CPCI_GENERIC=y CONFIG_HOTPLUG_PCI_SHPC=y # # PCI controller drivers # CONFIG_PCI_FTPCI100=y CONFIG_PCI_HOST_COMMON=y CONFIG_PCI_HOST_GENERIC=y CONFIG_PCIE_MICROCHIP_HOST=y CONFIG_PCIE_XILINX=y # # Cadence-based PCIe controllers # CONFIG_PCIE_CADENCE=y CONFIG_PCIE_CADENCE_HOST=y CONFIG_PCIE_CADENCE_EP=y CONFIG_PCIE_CADENCE_PLAT=y CONFIG_PCIE_CADENCE_PLAT_HOST=y CONFIG_PCIE_CADENCE_PLAT_EP=y CONFIG_PCI_J721E=y CONFIG_PCI_J721E_HOST=y CONFIG_PCI_J721E_EP=y # end of Cadence-based PCIe controllers # # DesignWare-based PCIe controllers # CONFIG_PCIE_DW=y CONFIG_PCIE_DW_HOST=y CONFIG_PCIE_DW_EP=y CONFIG_PCI_MESON=y CONFIG_PCIE_INTEL_GW=y CONFIG_PCIE_DW_PLAT=y CONFIG_PCIE_DW_PLAT_HOST=y CONFIG_PCIE_DW_PLAT_EP=y # end of DesignWare-based PCIe controllers # # Mobiveil-based PCIe controllers # # end of Mobiveil-based PCIe controllers # end of PCI controller drivers # # PCI Endpoint # CONFIG_PCI_ENDPOINT=y CONFIG_PCI_ENDPOINT_CONFIGFS=y # CONFIG_PCI_EPF_TEST is not set CONFIG_PCI_EPF_NTB=y CONFIG_PCI_EPF_VNTB=y # end of PCI Endpoint # # PCI switch controller drivers # CONFIG_PCI_SW_SWITCHTEC=y # end of PCI switch controller drivers CONFIG_CXL_BUS=y CONFIG_CXL_PCI=y CONFIG_CXL_MEM_RAW_COMMANDS=y CONFIG_CXL_ACPI=y CONFIG_CXL_MEM=y CONFIG_CXL_PORT=y CONFIG_CXL_SUSPEND=y CONFIG_PCCARD=y CONFIG_PCMCIA=y CONFIG_PCMCIA_LOAD_CIS=y CONFIG_CARDBUS=y # # PC-card bridges # CONFIG_YENTA=y CONFIG_YENTA_O2=y CONFIG_YENTA_RICOH=y CONFIG_YENTA_TI=y CONFIG_YENTA_ENE_TUNE=y CONFIG_YENTA_TOSHIBA=y CONFIG_PD6729=y CONFIG_I82092=y CONFIG_I82365=y CONFIG_TCIC=y CONFIG_PCMCIA_PROBE=y CONFIG_PCCARD_NONSTATIC=y CONFIG_RAPIDIO=y CONFIG_RAPIDIO_TSI721=y CONFIG_RAPIDIO_DISC_TIMEOUT=30 CONFIG_RAPIDIO_ENABLE_RX_TX_PORTS=y CONFIG_RAPIDIO_DMA_ENGINE=y CONFIG_RAPIDIO_DEBUG=y CONFIG_RAPIDIO_ENUM_BASIC=y CONFIG_RAPIDIO_CHMAN=y CONFIG_RAPIDIO_MPORT_CDEV=y # # RapidIO Switch drivers # CONFIG_RAPIDIO_CPS_XX=y CONFIG_RAPIDIO_CPS_GEN2=y CONFIG_RAPIDIO_RXS_GEN3=y # end of RapidIO Switch drivers # # Generic Driver Options # CONFIG_AUXILIARY_BUS=y CONFIG_UEVENT_HELPER=y CONFIG_UEVENT_HELPER_PATH="" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_DEVTMPFS_SAFE=y CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y # # Firmware loader # CONFIG_FW_LOADER=y CONFIG_FW_LOADER_DEBUG=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y CONFIG_EXTRA_FIRMWARE="" CONFIG_FW_LOADER_USER_HELPER=y CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y CONFIG_FW_LOADER_COMPRESS=y CONFIG_FW_LOADER_COMPRESS_XZ=y CONFIG_FW_LOADER_COMPRESS_ZSTD=y CONFIG_FW_CACHE=y CONFIG_FW_UPLOAD=y # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y CONFIG_ALLOW_DEV_COREDUMP=y CONFIG_DEV_COREDUMP=y # CONFIG_DEBUG_DRIVER is not set CONFIG_DEBUG_DEVRES=y # CONFIG_DEBUG_TEST_DRIVER_REMOVE is not set # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SLIMBUS=y CONFIG_REGMAP_SPI=y CONFIG_REGMAP_SPMI=y CONFIG_REGMAP_W1=y CONFIG_REGMAP_MMIO=y CONFIG_REGMAP_IRQ=y CONFIG_REGMAP_SOUNDWIRE=y CONFIG_REGMAP_SOUNDWIRE_MBQ=y CONFIG_REGMAP_SCCB=y CONFIG_REGMAP_I3C=y CONFIG_REGMAP_SPI_AVMM=y CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_FENCE_TRACE=y CONFIG_FW_DEVLINK_SYNC_STATE_TIMEOUT=y # end of Generic Driver Options # # Bus devices # CONFIG_MOXTET=y CONFIG_MHI_BUS=y CONFIG_MHI_BUS_DEBUG=y CONFIG_MHI_BUS_PCI_GENERIC=y CONFIG_MHI_BUS_EP=y # end of Bus devices CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y # # Firmware Drivers # # # ARM System Control and Management Interface Protocol # # end of ARM System Control and Management Interface Protocol CONFIG_EDD=y CONFIG_EDD_OFF=y CONFIG_FIRMWARE_MEMMAP=y CONFIG_DMIID=y CONFIG_DMI_SYSFS=y CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_ISCSI_IBFT_FIND=y CONFIG_ISCSI_IBFT=y CONFIG_FW_CFG_SYSFS=y CONFIG_FW_CFG_SYSFS_CMDLINE=y CONFIG_SYSFB=y CONFIG_SYSFB_SIMPLEFB=y CONFIG_FW_CS_DSP=y CONFIG_GOOGLE_FIRMWARE=y CONFIG_GOOGLE_SMI=y CONFIG_GOOGLE_CBMEM=y CONFIG_GOOGLE_COREBOOT_TABLE=y CONFIG_GOOGLE_MEMCONSOLE=y CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY=y CONFIG_GOOGLE_MEMCONSOLE_COREBOOT=y CONFIG_GOOGLE_VPD=y # # EFI (Extensible Firmware Interface) Support # CONFIG_EFI_ESRT=y CONFIG_EFI_VARS_PSTORE=y CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE=y CONFIG_EFI_DXE_MEM_ATTRIBUTES=y CONFIG_EFI_RUNTIME_WRAPPERS=y CONFIG_EFI_BOOTLOADER_CONTROL=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y # CONFIG_EFI_TEST is not set CONFIG_EFI_DEV_PATH_PARSER=y CONFIG_APPLE_PROPERTIES=y CONFIG_RESET_ATTACK_MITIGATION=y CONFIG_EFI_RCI2_TABLE=y CONFIG_EFI_DISABLE_PCI_DMA=y CONFIG_EFI_EARLYCON=y CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y CONFIG_EFI_DISABLE_RUNTIME=y CONFIG_EFI_COCO_SECRET=y CONFIG_EFI_EMBEDDED_FIRMWARE=y # end of EFI (Extensible Firmware Interface) Support CONFIG_UEFI_CPER=y CONFIG_UEFI_CPER_X86=y # # Tegra firmware driver # # end of Tegra firmware driver # end of Firmware Drivers CONFIG_GNSS=y CONFIG_GNSS_SERIAL=y CONFIG_GNSS_MTK_SERIAL=y CONFIG_GNSS_SIRF_SERIAL=y CONFIG_GNSS_UBX_SERIAL=y CONFIG_GNSS_USB=y CONFIG_MTD=y # CONFIG_MTD_TESTS is not set # # Partition parsers # CONFIG_MTD_AR7_PARTS=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_OF_PARTS=y CONFIG_MTD_REDBOOT_PARTS=y CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y CONFIG_MTD_REDBOOT_PARTS_READONLY=y # end of Partition parsers # # User Modules And Translation Layers # CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # # Note that in some cases UBI block is preferred. See MTD_UBI_BLOCK. # CONFIG_FTL=y CONFIG_NFTL=y CONFIG_NFTL_RW=y CONFIG_INFTL=y CONFIG_RFD_FTL=y CONFIG_SSFDC=y CONFIG_SM_FTL=y CONFIG_MTD_OOPS=y CONFIG_MTD_PSTORE=y CONFIG_MTD_SWAP=y CONFIG_MTD_PARTITIONED_MASTER=y # # RAM/ROM/Flash chip drivers # CONFIG_MTD_CFI=y CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_GEN_PROBE=y CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_NOSWAP=y # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set CONFIG_MTD_CFI_GEOMETRY=y CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y CONFIG_MTD_MAP_BANK_WIDTH_4=y CONFIG_MTD_MAP_BANK_WIDTH_8=y CONFIG_MTD_MAP_BANK_WIDTH_16=y CONFIG_MTD_MAP_BANK_WIDTH_32=y CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y CONFIG_MTD_CFI_I4=y CONFIG_MTD_CFI_I8=y CONFIG_MTD_OTP=y CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_CFI_STAA=y CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_RAM=y CONFIG_MTD_ROM=y CONFIG_MTD_ABSENT=y # end of RAM/ROM/Flash chip drivers # # Mapping drivers for chip access # CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_COMPAT=y CONFIG_MTD_PHYSMAP_START=0x8000000 CONFIG_MTD_PHYSMAP_LEN=0 CONFIG_MTD_PHYSMAP_BANKWIDTH=2 CONFIG_MTD_PHYSMAP_OF=y CONFIG_MTD_PHYSMAP_VERSATILE=y CONFIG_MTD_PHYSMAP_GEMINI=y CONFIG_MTD_PHYSMAP_GPIO_ADDR=y CONFIG_MTD_SBC_GXX=y CONFIG_MTD_SCx200_DOCFLASH=y # CONFIG_MTD_AMD76XROM is not set CONFIG_MTD_ICHXROM=y CONFIG_MTD_ESB2ROM=y CONFIG_MTD_CK804XROM=y CONFIG_MTD_SCB2_FLASH=y # CONFIG_MTD_NETtel is not set CONFIG_MTD_L440GX=y CONFIG_MTD_PCI=y CONFIG_MTD_PCMCIA=y CONFIG_MTD_PCMCIA_ANONYMOUS=y CONFIG_MTD_INTEL_VR_NOR=y CONFIG_MTD_PLATRAM=y # end of Mapping drivers for chip access # # Self-contained MTD device drivers # CONFIG_MTD_PMC551=y CONFIG_MTD_PMC551_BUGFIX=y CONFIG_MTD_PMC551_DEBUG=y CONFIG_MTD_DATAFLASH=y CONFIG_MTD_DATAFLASH_WRITE_VERIFY=y CONFIG_MTD_DATAFLASH_OTP=y CONFIG_MTD_MCHP23K256=y CONFIG_MTD_MCHP48L640=y CONFIG_MTD_SST25L=y CONFIG_MTD_SLRAM=y CONFIG_MTD_PHRAM=y CONFIG_MTD_MTDRAM=y CONFIG_MTDRAM_TOTAL_SIZE=4096 CONFIG_MTDRAM_ERASE_SIZE=128 CONFIG_MTD_BLOCK2MTD=y # # Disk-On-Chip Device Drivers # CONFIG_MTD_DOCG3=y CONFIG_BCH_CONST_M=14 CONFIG_BCH_CONST_T=4 # end of Self-contained MTD device drivers # # NAND # CONFIG_MTD_NAND_CORE=y CONFIG_MTD_ONENAND=y CONFIG_MTD_ONENAND_VERIFY_WRITE=y CONFIG_MTD_ONENAND_GENERIC=y CONFIG_MTD_ONENAND_OTP=y CONFIG_MTD_ONENAND_2X_PROGRAM=y CONFIG_MTD_RAW_NAND=y # # Raw/parallel NAND flash controllers # CONFIG_MTD_NAND_DENALI=y CONFIG_MTD_NAND_DENALI_PCI=y CONFIG_MTD_NAND_DENALI_DT=y CONFIG_MTD_NAND_CAFE=y CONFIG_MTD_NAND_CS553X=y CONFIG_MTD_NAND_MXIC=y CONFIG_MTD_NAND_GPIO=y CONFIG_MTD_NAND_PLATFORM=y CONFIG_MTD_NAND_CADENCE=y CONFIG_MTD_NAND_ARASAN=y CONFIG_MTD_NAND_INTEL_LGM=y # # Misc # CONFIG_MTD_SM_COMMON=y CONFIG_MTD_NAND_NANDSIM=y CONFIG_MTD_NAND_RICOH=y CONFIG_MTD_NAND_DISKONCHIP=y CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y CONFIG_MTD_SPI_NAND=y # # ECC engine support # CONFIG_MTD_NAND_ECC=y CONFIG_MTD_NAND_ECC_SW_HAMMING=y CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC=y CONFIG_MTD_NAND_ECC_SW_BCH=y CONFIG_MTD_NAND_ECC_MXIC=y # end of ECC engine support # end of NAND # # LPDDR & LPDDR2 PCM memory drivers # CONFIG_MTD_LPDDR=y CONFIG_MTD_QINFO_PROBE=y # end of LPDDR & LPDDR2 PCM memory drivers CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y # CONFIG_MTD_SPI_NOR_SWP_DISABLE is not set CONFIG_MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE=y # CONFIG_MTD_SPI_NOR_SWP_KEEP is not set CONFIG_MTD_UBI=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_FASTMAP=y CONFIG_MTD_UBI_GLUEBI=y CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_HYPERBUS=y CONFIG_DTC=y CONFIG_OF=y # CONFIG_OF_UNITTEST is not set CONFIG_OF_FLATTREE=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_PROMTREE=y CONFIG_OF_KOBJ=y CONFIG_OF_DYNAMIC=y CONFIG_OF_ADDRESS=y CONFIG_OF_IRQ=y CONFIG_OF_RESERVED_MEM=y CONFIG_OF_RESOLVE=y CONFIG_OF_OVERLAY=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_PARPORT=y CONFIG_PARPORT_PC=y CONFIG_PARPORT_SERIAL=y CONFIG_PARPORT_PC_FIFO=y CONFIG_PARPORT_PC_SUPERIO=y CONFIG_PARPORT_PC_PCMCIA=y CONFIG_PARPORT_1284=y CONFIG_PARPORT_NOT_PC=y CONFIG_PNP=y CONFIG_PNP_DEBUG_MESSAGES=y # # Protocols # CONFIG_ISAPNP=y CONFIG_PNPBIOS=y CONFIG_PNPBIOS_PROC_FS=y CONFIG_PNPACPI=y CONFIG_BLK_DEV=y CONFIG_BLK_DEV_NULL_BLK=y CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION=y CONFIG_BLK_DEV_FD=y CONFIG_BLK_DEV_FD_RAWCMD=y CONFIG_CDROM=y CONFIG_BLK_DEV_PCIESSD_MTIP32XX=y CONFIG_ZRAM=y CONFIG_ZRAM_DEF_COMP_LZORLE=y # CONFIG_ZRAM_DEF_COMP_ZSTD is not set # CONFIG_ZRAM_DEF_COMP_LZ4 is not set # CONFIG_ZRAM_DEF_COMP_LZO is not set # CONFIG_ZRAM_DEF_COMP_LZ4HC is not set # CONFIG_ZRAM_DEF_COMP_842 is not set CONFIG_ZRAM_DEF_COMP="lzo-rle" CONFIG_ZRAM_WRITEBACK=y CONFIG_ZRAM_MEMORY_TRACKING=y CONFIG_ZRAM_MULTI_COMP=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 CONFIG_BLK_DEV_DRBD=y CONFIG_DRBD_FAULT_INJECTION=y CONFIG_BLK_DEV_NBD=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 CONFIG_CDROM_PKTCDVD=y CONFIG_CDROM_PKTCDVD_BUFFERS=8 CONFIG_CDROM_PKTCDVD_WCACHE=y CONFIG_ATA_OVER_ETH=y CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_RBD=y CONFIG_BLK_DEV_UBLK=y CONFIG_BLKDEV_UBLK_LEGACY_OPCODES=y CONFIG_BLK_DEV_RNBD=y CONFIG_BLK_DEV_RNBD_CLIENT=y CONFIG_BLK_DEV_RNBD_SERVER=y # # NVME Support # CONFIG_NVME_COMMON=y CONFIG_NVME_CORE=y CONFIG_BLK_DEV_NVME=y CONFIG_NVME_MULTIPATH=y CONFIG_NVME_VERBOSE_ERRORS=y CONFIG_NVME_HWMON=y CONFIG_NVME_FABRICS=y CONFIG_NVME_RDMA=y CONFIG_NVME_FC=y CONFIG_NVME_TCP=y CONFIG_NVME_AUTH=y CONFIG_NVME_TARGET=y CONFIG_NVME_TARGET_PASSTHRU=y CONFIG_NVME_TARGET_LOOP=y CONFIG_NVME_TARGET_RDMA=y CONFIG_NVME_TARGET_FC=y CONFIG_NVME_TARGET_FCLOOP=y CONFIG_NVME_TARGET_TCP=y CONFIG_NVME_TARGET_AUTH=y # end of NVME Support # # Misc devices # CONFIG_SENSORS_LIS3LV02D=y CONFIG_AD525X_DPOT=y CONFIG_AD525X_DPOT_I2C=y CONFIG_AD525X_DPOT_SPI=y CONFIG_DUMMY_IRQ=y CONFIG_IBM_ASM=y CONFIG_PHANTOM=y CONFIG_TIFM_CORE=y CONFIG_TIFM_7XX1=y CONFIG_ICS932S401=y CONFIG_ENCLOSURE_SERVICES=y CONFIG_SMPRO_ERRMON=y CONFIG_SMPRO_MISC=y CONFIG_CS5535_MFGPT=y CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 CONFIG_CS5535_CLOCK_EVENT_SRC=y CONFIG_HI6421V600_IRQ=y CONFIG_HP_ILO=y CONFIG_APDS9802ALS=y CONFIG_ISL29003=y CONFIG_ISL29020=y CONFIG_SENSORS_TSL2550=y CONFIG_SENSORS_BH1770=y CONFIG_SENSORS_APDS990X=y CONFIG_HMC6352=y CONFIG_DS1682=y CONFIG_VMWARE_BALLOON=y CONFIG_PCH_PHUB=y CONFIG_LATTICE_ECP3_CONFIG=y CONFIG_SRAM=y CONFIG_DW_XDATA_PCIE=y # CONFIG_PCI_ENDPOINT_TEST is not set CONFIG_XILINX_SDFEC=y CONFIG_MISC_RTSX=y CONFIG_HISI_HIKEY_USB=y CONFIG_OPEN_DICE=y CONFIG_VCPU_STALL_DETECTOR=y CONFIG_C2PORT=y CONFIG_C2PORT_DURAMAR_2150=y # # EEPROM support # CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y CONFIG_EEPROM_LEGACY=y CONFIG_EEPROM_MAX6875=y CONFIG_EEPROM_93CX6=y CONFIG_EEPROM_93XX46=y CONFIG_EEPROM_IDT_89HPESX=y CONFIG_EEPROM_EE1004=y # end of EEPROM support CONFIG_CB710_CORE=y CONFIG_CB710_DEBUG=y CONFIG_CB710_DEBUG_ASSUMPTIONS=y # # Texas Instruments shared transport line discipline # CONFIG_TI_ST=y # end of Texas Instruments shared transport line discipline CONFIG_SENSORS_LIS3_I2C=y CONFIG_ALTERA_STAPL=y CONFIG_INTEL_MEI=y CONFIG_INTEL_MEI_ME=y CONFIG_INTEL_MEI_TXE=y CONFIG_INTEL_MEI_GSC=y CONFIG_INTEL_MEI_HDCP=y CONFIG_INTEL_MEI_PXP=y CONFIG_VMWARE_VMCI=y CONFIG_ECHO=y CONFIG_BCM_VK=y CONFIG_BCM_VK_TTY=y CONFIG_MISC_ALCOR_PCI=y CONFIG_MISC_RTSX_PCI=y CONFIG_MISC_RTSX_USB=y CONFIG_UACCE=y CONFIG_PVPANIC=y CONFIG_PVPANIC_MMIO=y CONFIG_PVPANIC_PCI=y CONFIG_GP_PCI1XXXX=y # end of Misc devices # # SCSI device support # CONFIG_SCSI_MOD=y CONFIG_RAID_ATTRS=y CONFIG_SCSI_COMMON=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_ST=y CONFIG_BLK_DEV_SR=y CONFIG_CHR_DEV_SG=y CONFIG_BLK_DEV_BSG=y CONFIG_CHR_DEV_SCH=y CONFIG_SCSI_ENCLOSURE=y CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y CONFIG_SCSI_SCAN_ASYNC=y # # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=y CONFIG_SCSI_FC_ATTRS=y CONFIG_SCSI_ISCSI_ATTRS=y CONFIG_SCSI_SAS_ATTRS=y CONFIG_SCSI_SAS_LIBSAS=y CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_SAS_HOST_SMP=y CONFIG_SCSI_SRP_ATTRS=y # end of SCSI Transports CONFIG_SCSI_LOWLEVEL=y CONFIG_ISCSI_TCP=y CONFIG_ISCSI_BOOT_SYSFS=y CONFIG_SCSI_CXGB3_ISCSI=y CONFIG_SCSI_CXGB4_ISCSI=y CONFIG_SCSI_BNX2_ISCSI=y CONFIG_SCSI_BNX2X_FCOE=y CONFIG_BE2ISCSI=y CONFIG_BLK_DEV_3W_XXXX_RAID=y CONFIG_SCSI_HPSA=y CONFIG_SCSI_3W_9XXX=y CONFIG_SCSI_3W_SAS=y CONFIG_SCSI_ACARD=y CONFIG_SCSI_AHA152X=y CONFIG_SCSI_AHA1542=y CONFIG_SCSI_AHA1740=y CONFIG_SCSI_AACRAID=y CONFIG_SCSI_AIC7XXX=y CONFIG_AIC7XXX_CMDS_PER_DEVICE=32 CONFIG_AIC7XXX_RESET_DELAY_MS=5000 CONFIG_AIC7XXX_DEBUG_ENABLE=y CONFIG_AIC7XXX_DEBUG_MASK=0 CONFIG_AIC7XXX_REG_PRETTY_PRINT=y CONFIG_SCSI_AIC79XX=y CONFIG_AIC79XX_CMDS_PER_DEVICE=32 CONFIG_AIC79XX_RESET_DELAY_MS=5000 CONFIG_AIC79XX_DEBUG_ENABLE=y CONFIG_AIC79XX_DEBUG_MASK=0 CONFIG_AIC79XX_REG_PRETTY_PRINT=y CONFIG_SCSI_AIC94XX=y CONFIG_AIC94XX_DEBUG=y CONFIG_SCSI_MVSAS=y CONFIG_SCSI_MVSAS_DEBUG=y CONFIG_SCSI_MVSAS_TASKLET=y CONFIG_SCSI_MVUMI=y CONFIG_SCSI_ADVANSYS=y CONFIG_SCSI_ARCMSR=y CONFIG_SCSI_ESAS2R=y CONFIG_MEGARAID_NEWGEN=y CONFIG_MEGARAID_MM=y CONFIG_MEGARAID_MAILBOX=y CONFIG_MEGARAID_LEGACY=y CONFIG_MEGARAID_SAS=y CONFIG_SCSI_MPT3SAS=y CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT3SAS_MAX_SGE=128 CONFIG_SCSI_MPT2SAS=y CONFIG_SCSI_MPI3MR=y CONFIG_SCSI_SMARTPQI=y CONFIG_SCSI_HPTIOP=y CONFIG_SCSI_BUSLOGIC=y CONFIG_SCSI_FLASHPOINT=y CONFIG_SCSI_MYRB=y CONFIG_SCSI_MYRS=y CONFIG_VMWARE_PVSCSI=y CONFIG_HYPERV_STORAGE=y CONFIG_LIBFC=y CONFIG_LIBFCOE=y CONFIG_FCOE=y CONFIG_FCOE_FNIC=y CONFIG_SCSI_SNIC=y CONFIG_SCSI_SNIC_DEBUG_FS=y CONFIG_SCSI_DMX3191D=y CONFIG_SCSI_FDOMAIN=y CONFIG_SCSI_FDOMAIN_PCI=y CONFIG_SCSI_FDOMAIN_ISA=y CONFIG_SCSI_ISCI=y CONFIG_SCSI_GENERIC_NCR5380=y CONFIG_SCSI_IPS=y CONFIG_SCSI_INITIO=y CONFIG_SCSI_INIA100=y CONFIG_SCSI_PPA=y CONFIG_SCSI_IMM=y CONFIG_SCSI_IZIP_EPP16=y CONFIG_SCSI_IZIP_SLOW_CTR=y CONFIG_SCSI_STEX=y CONFIG_SCSI_SYM53C8XX_2=y CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 CONFIG_SCSI_SYM53C8XX_MMIO=y CONFIG_SCSI_IPR=y CONFIG_SCSI_IPR_TRACE=y CONFIG_SCSI_IPR_DUMP=y CONFIG_SCSI_QLOGIC_FAS=y CONFIG_SCSI_QLOGIC_1280=y CONFIG_SCSI_QLA_FC=y CONFIG_TCM_QLA2XXX=y CONFIG_TCM_QLA2XXX_DEBUG=y CONFIG_SCSI_QLA_ISCSI=y CONFIG_QEDI=y CONFIG_QEDF=y CONFIG_SCSI_LPFC=y CONFIG_SCSI_LPFC_DEBUG_FS=y CONFIG_SCSI_EFCT=y CONFIG_SCSI_SIM710=y CONFIG_SCSI_DC395x=y CONFIG_SCSI_AM53C974=y CONFIG_SCSI_NSP32=y CONFIG_SCSI_WD719X=y CONFIG_SCSI_DEBUG=y CONFIG_SCSI_PMCRAID=y CONFIG_SCSI_PM8001=y CONFIG_SCSI_BFA_FC=y CONFIG_SCSI_VIRTIO=y CONFIG_SCSI_CHELSIO_FCOE=y CONFIG_SCSI_LOWLEVEL_PCMCIA=y CONFIG_PCMCIA_AHA152X=m CONFIG_PCMCIA_FDOMAIN=m CONFIG_PCMCIA_NINJA_SCSI=m CONFIG_PCMCIA_QLOGIC=m CONFIG_PCMCIA_SYM53C500=m CONFIG_SCSI_DH=y CONFIG_SCSI_DH_RDAC=y CONFIG_SCSI_DH_HP_SW=y CONFIG_SCSI_DH_EMC=y CONFIG_SCSI_DH_ALUA=y # end of SCSI device support CONFIG_ATA=y CONFIG_SATA_HOST=y CONFIG_PATA_TIMINGS=y CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_FORCE=y CONFIG_ATA_ACPI=y CONFIG_SATA_ZPODD=y CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # CONFIG_SATA_AHCI=y CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=y CONFIG_AHCI_DWC=y CONFIG_AHCI_CEVA=y CONFIG_SATA_INIC162X=y CONFIG_SATA_ACARD_AHCI=y CONFIG_SATA_SIL24=y CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # CONFIG_PDC_ADMA=y CONFIG_SATA_QSTOR=y CONFIG_SATA_SX4=y CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # CONFIG_ATA_PIIX=y CONFIG_SATA_DWC=y CONFIG_SATA_DWC_OLD_DMA=y CONFIG_SATA_MV=y CONFIG_SATA_NV=y CONFIG_SATA_PROMISE=y CONFIG_SATA_SIL=y CONFIG_SATA_SIS=y CONFIG_SATA_SVW=y CONFIG_SATA_ULI=y CONFIG_SATA_VIA=y CONFIG_SATA_VITESSE=y # # PATA SFF controllers with BMDMA # CONFIG_PATA_ALI=y # CONFIG_PATA_AMD is not set CONFIG_PATA_ARTOP=y CONFIG_PATA_ATIIXP=y CONFIG_PATA_ATP867X=y CONFIG_PATA_CMD64X=y CONFIG_PATA_CS5520=y CONFIG_PATA_CS5530=y CONFIG_PATA_CS5535=y CONFIG_PATA_CS5536=y CONFIG_PATA_CYPRESS=y CONFIG_PATA_EFAR=y CONFIG_PATA_HPT366=y CONFIG_PATA_HPT37X=y CONFIG_PATA_HPT3X2N=y CONFIG_PATA_HPT3X3=y CONFIG_PATA_HPT3X3_DMA=y CONFIG_PATA_IT8213=y CONFIG_PATA_IT821X=y CONFIG_PATA_JMICRON=y CONFIG_PATA_MARVELL=y CONFIG_PATA_NETCELL=y CONFIG_PATA_NINJA32=y CONFIG_PATA_NS87415=y CONFIG_PATA_OLDPIIX=y CONFIG_PATA_OPTIDMA=y CONFIG_PATA_PDC2027X=y CONFIG_PATA_PDC_OLD=y CONFIG_PATA_RADISYS=y CONFIG_PATA_RDC=y CONFIG_PATA_SC1200=y CONFIG_PATA_SCH=y CONFIG_PATA_SERVERWORKS=y CONFIG_PATA_SIL680=y CONFIG_PATA_SIS=y CONFIG_PATA_TOSHIBA=y CONFIG_PATA_TRIFLEX=y CONFIG_PATA_VIA=y CONFIG_PATA_WINBOND=y # # PIO-only SFF controllers # CONFIG_PATA_CMD640_PCI=y CONFIG_PATA_ISAPNP=y CONFIG_PATA_MPIIX=y CONFIG_PATA_NS87410=y CONFIG_PATA_OPTI=y CONFIG_PATA_PCMCIA=y CONFIG_PATA_PLATFORM=y CONFIG_PATA_OF_PLATFORM=y CONFIG_PATA_QDI=y CONFIG_PATA_RZ1000=y CONFIG_PATA_WINBOND_VLB=y CONFIG_PATA_PARPORT=y # # Parallel IDE protocol modules # CONFIG_PATA_PARPORT_ATEN=y CONFIG_PATA_PARPORT_BPCK=y CONFIG_PATA_PARPORT_BPCK6=y CONFIG_PATA_PARPORT_COMM=y CONFIG_PATA_PARPORT_DSTR=y CONFIG_PATA_PARPORT_FIT2=y CONFIG_PATA_PARPORT_FIT3=y CONFIG_PATA_PARPORT_EPAT=y CONFIG_PATA_PARPORT_EPATC8=y CONFIG_PATA_PARPORT_EPIA=y CONFIG_PATA_PARPORT_FRIQ=y CONFIG_PATA_PARPORT_FRPW=y CONFIG_PATA_PARPORT_KBIC=y CONFIG_PATA_PARPORT_KTTI=y CONFIG_PATA_PARPORT_ON20=y CONFIG_PATA_PARPORT_ON26=y # # Generic fallback / legacy drivers # CONFIG_PATA_ACPI=y CONFIG_ATA_GENERIC=y CONFIG_PATA_LEGACY=y CONFIG_MD=y CONFIG_BLK_DEV_MD=y CONFIG_MD_AUTODETECT=y CONFIG_MD_LINEAR=y CONFIG_MD_RAID0=y CONFIG_MD_RAID1=y CONFIG_MD_RAID10=y CONFIG_MD_RAID456=y CONFIG_MD_MULTIPATH=y CONFIG_MD_FAULTY=y CONFIG_MD_CLUSTER=y CONFIG_BCACHE=y CONFIG_BCACHE_DEBUG=y CONFIG_BCACHE_CLOSURES_DEBUG=y CONFIG_BCACHE_ASYNC_REGISTRATION=y CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=y CONFIG_DM_DEBUG=y CONFIG_DM_BUFIO=y CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING=y CONFIG_DM_DEBUG_BLOCK_STACK_TRACING=y CONFIG_DM_BIO_PRISON=y CONFIG_DM_PERSISTENT_DATA=y CONFIG_DM_UNSTRIPED=y CONFIG_DM_CRYPT=y CONFIG_DM_SNAPSHOT=y CONFIG_DM_THIN_PROVISIONING=y CONFIG_DM_CACHE=y CONFIG_DM_CACHE_SMQ=y CONFIG_DM_WRITECACHE=y CONFIG_DM_ERA=y CONFIG_DM_CLONE=y CONFIG_DM_MIRROR=y CONFIG_DM_LOG_USERSPACE=y CONFIG_DM_RAID=y CONFIG_DM_ZERO=y CONFIG_DM_MULTIPATH=y CONFIG_DM_MULTIPATH_QL=y CONFIG_DM_MULTIPATH_ST=y CONFIG_DM_MULTIPATH_HST=y CONFIG_DM_MULTIPATH_IOA=y CONFIG_DM_DELAY=y CONFIG_DM_DUST=y CONFIG_DM_INIT=y CONFIG_DM_UEVENT=y CONFIG_DM_FLAKEY=y CONFIG_DM_VERITY=y CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG_SECONDARY_KEYRING=y CONFIG_DM_VERITY_FEC=y CONFIG_DM_SWITCH=y CONFIG_DM_LOG_WRITES=y CONFIG_DM_INTEGRITY=y CONFIG_DM_ZONED=y CONFIG_DM_AUDIT=y CONFIG_TARGET_CORE=y CONFIG_TCM_IBLOCK=y CONFIG_TCM_FILEIO=y CONFIG_TCM_PSCSI=y CONFIG_TCM_USER2=y CONFIG_LOOPBACK_TARGET=y CONFIG_TCM_FC=y CONFIG_ISCSI_TARGET=y CONFIG_ISCSI_TARGET_CXGB4=y CONFIG_SBP_TARGET=y CONFIG_REMOTE_TARGET=y CONFIG_FUSION=y CONFIG_FUSION_SPI=y CONFIG_FUSION_FC=y CONFIG_FUSION_SAS=y CONFIG_FUSION_MAX_SGE=128 CONFIG_FUSION_CTL=y CONFIG_FUSION_LAN=y CONFIG_FUSION_LOGGING=y # # IEEE 1394 (FireWire) support # CONFIG_FIREWIRE=y CONFIG_FIREWIRE_OHCI=y CONFIG_FIREWIRE_SBP2=y CONFIG_FIREWIRE_NET=y CONFIG_FIREWIRE_NOSY=y # end of IEEE 1394 (FireWire) support CONFIG_MACINTOSH_DRIVERS=y CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y CONFIG_MII=y CONFIG_NET_CORE=y CONFIG_BONDING=y CONFIG_DUMMY=y CONFIG_WIREGUARD=y CONFIG_WIREGUARD_DEBUG=y CONFIG_EQUALIZER=y CONFIG_NET_FC=y CONFIG_IFB=y CONFIG_NET_TEAM=y CONFIG_NET_TEAM_MODE_BROADCAST=y CONFIG_NET_TEAM_MODE_ROUNDROBIN=y CONFIG_NET_TEAM_MODE_RANDOM=y CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=y CONFIG_NET_TEAM_MODE_LOADBALANCE=y CONFIG_MACVLAN=y CONFIG_MACVTAP=y CONFIG_IPVLAN_L3S=y CONFIG_IPVLAN=y CONFIG_IPVTAP=y CONFIG_VXLAN=y CONFIG_GENEVE=y CONFIG_BAREUDP=y CONFIG_GTP=y CONFIG_AMT=y CONFIG_MACSEC=y CONFIG_NETCONSOLE=y CONFIG_NETCONSOLE_DYNAMIC=y CONFIG_NETPOLL=y CONFIG_NET_POLL_CONTROLLER=y CONFIG_NTB_NETDEV=y CONFIG_RIONET=y CONFIG_RIONET_TX_SIZE=128 CONFIG_RIONET_RX_SIZE=128 CONFIG_TUN=y CONFIG_TAP=y CONFIG_TUN_VNET_CROSS_LE=y CONFIG_VETH=y CONFIG_VIRTIO_NET=y CONFIG_NLMON=y CONFIG_NET_VRF=y CONFIG_VSOCKMON=y CONFIG_MHI_NET=y CONFIG_SUNGEM_PHY=y CONFIG_ARCNET=y CONFIG_ARCNET_1201=y CONFIG_ARCNET_1051=y CONFIG_ARCNET_RAW=y CONFIG_ARCNET_CAP=y CONFIG_ARCNET_COM90xx=y CONFIG_ARCNET_COM90xxIO=y CONFIG_ARCNET_RIM_I=y CONFIG_ARCNET_COM20020=y CONFIG_ARCNET_COM20020_ISA=y CONFIG_ARCNET_COM20020_PCI=y CONFIG_ARCNET_COM20020_CS=y CONFIG_ATM_DRIVERS=y CONFIG_ATM_DUMMY=y CONFIG_ATM_TCP=y CONFIG_ATM_LANAI=y CONFIG_ATM_ENI=y CONFIG_ATM_ENI_DEBUG=y CONFIG_ATM_ENI_TUNE_BURST=y CONFIG_ATM_ENI_BURST_TX_16W=y CONFIG_ATM_ENI_BURST_TX_8W=y CONFIG_ATM_ENI_BURST_TX_4W=y CONFIG_ATM_ENI_BURST_TX_2W=y CONFIG_ATM_ENI_BURST_RX_16W=y CONFIG_ATM_ENI_BURST_RX_8W=y CONFIG_ATM_ENI_BURST_RX_4W=y CONFIG_ATM_ENI_BURST_RX_2W=y CONFIG_ATM_NICSTAR=y CONFIG_ATM_NICSTAR_USE_SUNI=y CONFIG_ATM_NICSTAR_USE_IDT77105=y CONFIG_ATM_IDT77252=y CONFIG_ATM_IDT77252_DEBUG=y CONFIG_ATM_IDT77252_RCV_ALL=y CONFIG_ATM_IDT77252_USE_SUNI=y CONFIG_ATM_IA=y CONFIG_ATM_IA_DEBUG=y CONFIG_ATM_FORE200E=y CONFIG_ATM_FORE200E_USE_TASKLET=y CONFIG_ATM_FORE200E_TX_RETRY=16 CONFIG_ATM_FORE200E_DEBUG=0 CONFIG_ATM_HE=y CONFIG_ATM_HE_USE_SUNI=y CONFIG_ATM_SOLOS=y CONFIG_CAIF_DRIVERS=y CONFIG_CAIF_TTY=y CONFIG_CAIF_VIRTIO=y # # Distributed Switch Architecture drivers # CONFIG_B53=y CONFIG_B53_SPI_DRIVER=y CONFIG_B53_MDIO_DRIVER=y CONFIG_B53_MMAP_DRIVER=y CONFIG_B53_SRAB_DRIVER=y CONFIG_B53_SERDES=y CONFIG_NET_DSA_BCM_SF2=y CONFIG_NET_DSA_LOOP=y CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK=y CONFIG_NET_DSA_LANTIQ_GSWIP=y CONFIG_NET_DSA_MT7530=y CONFIG_NET_DSA_MT7530_MDIO=y CONFIG_NET_DSA_MT7530_MMIO=y CONFIG_NET_DSA_MV88E6060=y CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=y CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C=y CONFIG_NET_DSA_MICROCHIP_KSZ_SPI=y CONFIG_NET_DSA_MICROCHIP_KSZ_PTP=y CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI=y CONFIG_NET_DSA_MV88E6XXX=y CONFIG_NET_DSA_MV88E6XXX_PTP=y CONFIG_NET_DSA_MSCC_FELIX_DSA_LIB=y CONFIG_NET_DSA_MSCC_OCELOT_EXT=y CONFIG_NET_DSA_MSCC_SEVILLE=y CONFIG_NET_DSA_AR9331=y CONFIG_NET_DSA_QCA8K=y CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT=y CONFIG_NET_DSA_SJA1105=y CONFIG_NET_DSA_SJA1105_PTP=y CONFIG_NET_DSA_SJA1105_TAS=y CONFIG_NET_DSA_SJA1105_VL=y CONFIG_NET_DSA_XRS700X=y CONFIG_NET_DSA_XRS700X_I2C=y CONFIG_NET_DSA_XRS700X_MDIO=y CONFIG_NET_DSA_REALTEK=y CONFIG_NET_DSA_REALTEK_MDIO=y CONFIG_NET_DSA_REALTEK_SMI=y CONFIG_NET_DSA_REALTEK_RTL8365MB=y CONFIG_NET_DSA_REALTEK_RTL8366RB=y CONFIG_NET_DSA_SMSC_LAN9303=y CONFIG_NET_DSA_SMSC_LAN9303_I2C=y CONFIG_NET_DSA_SMSC_LAN9303_MDIO=y CONFIG_NET_DSA_VITESSE_VSC73XX=y CONFIG_NET_DSA_VITESSE_VSC73XX_SPI=y CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM=y # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y CONFIG_MDIO=y CONFIG_NET_VENDOR_3COM=y CONFIG_EL3=y CONFIG_3C515=y CONFIG_PCMCIA_3C574=y CONFIG_PCMCIA_3C589=y CONFIG_VORTEX=y CONFIG_TYPHOON=y CONFIG_NET_VENDOR_ADAPTEC=y CONFIG_ADAPTEC_STARFIRE=y CONFIG_NET_VENDOR_AGERE=y CONFIG_ET131X=y CONFIG_NET_VENDOR_ALACRITECH=y CONFIG_SLICOSS=y CONFIG_NET_VENDOR_ALTEON=y CONFIG_ACENIC=y CONFIG_ACENIC_OMIT_TIGON_I=y CONFIG_ALTERA_TSE=y CONFIG_NET_VENDOR_AMAZON=y CONFIG_ENA_ETHERNET=y # CONFIG_NET_VENDOR_AMD is not set CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_AQTION=y CONFIG_NET_VENDOR_ARC=y CONFIG_NET_VENDOR_ASIX=y CONFIG_SPI_AX88796C=y CONFIG_SPI_AX88796C_COMPRESSION=y CONFIG_NET_VENDOR_ATHEROS=y CONFIG_ATL2=y CONFIG_ATL1=y CONFIG_ATL1E=y CONFIG_ATL1C=y CONFIG_ALX=y CONFIG_CX_ECAT=y CONFIG_NET_VENDOR_BROADCOM=y CONFIG_B44=y CONFIG_B44_PCI_AUTOSELECT=y CONFIG_B44_PCICORE_AUTOSELECT=y CONFIG_B44_PCI=y CONFIG_BCMGENET=y CONFIG_BNX2=y CONFIG_CNIC=y CONFIG_TIGON3=y CONFIG_TIGON3_HWMON=y CONFIG_BNX2X=y CONFIG_BNX2X_SRIOV=y CONFIG_SYSTEMPORT=y CONFIG_BNXT=y CONFIG_BNXT_SRIOV=y CONFIG_BNXT_FLOWER_OFFLOAD=y CONFIG_BNXT_DCB=y CONFIG_BNXT_HWMON=y CONFIG_NET_VENDOR_CADENCE=y CONFIG_MACB=y CONFIG_MACB_USE_HWSTAMP=y CONFIG_MACB_PCI=y CONFIG_NET_VENDOR_CAVIUM=y CONFIG_NET_VENDOR_CHELSIO=y CONFIG_CHELSIO_T1=y CONFIG_CHELSIO_T1_1G=y CONFIG_CHELSIO_T3=y CONFIG_CHELSIO_T4=y CONFIG_CHELSIO_T4_DCB=y CONFIG_CHELSIO_T4_FCOE=y CONFIG_CHELSIO_T4VF=y CONFIG_CHELSIO_LIB=y CONFIG_CHELSIO_INLINE_CRYPTO=y CONFIG_CRYPTO_DEV_CHELSIO_TLS=y CONFIG_CHELSIO_IPSEC_INLINE=y CONFIG_CHELSIO_TLS_DEVICE=y CONFIG_NET_VENDOR_CIRRUS=y # CONFIG_CS89x0_ISA is not set CONFIG_NET_VENDOR_CISCO=y CONFIG_ENIC=y CONFIG_NET_VENDOR_CORTINA=y CONFIG_GEMINI_ETHERNET=y CONFIG_NET_VENDOR_DAVICOM=y CONFIG_DM9051=y CONFIG_DNET=y CONFIG_NET_VENDOR_DEC=y CONFIG_NET_TULIP=y CONFIG_DE2104X=y CONFIG_DE2104X_DSL=0 CONFIG_TULIP=y CONFIG_TULIP_MWI=y CONFIG_TULIP_MMIO=y CONFIG_TULIP_NAPI=y CONFIG_TULIP_NAPI_HW_MITIGATION=y CONFIG_WINBOND_840=y CONFIG_DM9102=y CONFIG_ULI526X=y CONFIG_PCMCIA_XIRCOM=y CONFIG_NET_VENDOR_DLINK=y CONFIG_DL2K=y CONFIG_SUNDANCE=y CONFIG_SUNDANCE_MMIO=y CONFIG_NET_VENDOR_EMULEX=y CONFIG_BE2NET=y CONFIG_BE2NET_HWMON=y CONFIG_BE2NET_BE2=y CONFIG_BE2NET_BE3=y CONFIG_BE2NET_LANCER=y CONFIG_BE2NET_SKYHAWK=y CONFIG_NET_VENDOR_ENGLEDER=y CONFIG_TSNEP=y # CONFIG_TSNEP_SELFTESTS is not set CONFIG_NET_VENDOR_EZCHIP=y CONFIG_EZCHIP_NPS_MANAGEMENT_ENET=y CONFIG_NET_VENDOR_FUJITSU=y CONFIG_PCMCIA_FMVJ18X=y CONFIG_NET_VENDOR_FUNGIBLE=y CONFIG_FUN_CORE=y CONFIG_FUN_ETH=y CONFIG_NET_VENDOR_GOOGLE=y CONFIG_GVE=y CONFIG_NET_VENDOR_HUAWEI=y CONFIG_HINIC=y CONFIG_NET_VENDOR_I825XX=y CONFIG_NET_VENDOR_INTEL=y CONFIG_E100=y CONFIG_E1000=y CONFIG_E1000E=y CONFIG_E1000E_HWTS=y CONFIG_IGB=y CONFIG_IGB_HWMON=y CONFIG_IGBVF=y CONFIG_IXGBE=y CONFIG_IXGBE_HWMON=y CONFIG_IXGBE_DCB=y CONFIG_IXGBE_IPSEC=y CONFIG_IXGBEVF=y CONFIG_IXGBEVF_IPSEC=y CONFIG_I40E=y CONFIG_I40E_DCB=y CONFIG_IAVF=y CONFIG_I40EVF=y CONFIG_ICE=y CONFIG_ICE_SWITCHDEV=y CONFIG_ICE_HWTS=y CONFIG_FM10K=y CONFIG_IGC=y CONFIG_JME=y CONFIG_NET_VENDOR_ADI=y CONFIG_ADIN1110=y CONFIG_NET_VENDOR_LITEX=y CONFIG_LITEX_LITEETH=y CONFIG_NET_VENDOR_MARVELL=y CONFIG_MVMDIO=y CONFIG_SKGE=y CONFIG_SKGE_DEBUG=y CONFIG_SKGE_GENESIS=y CONFIG_SKY2=y CONFIG_SKY2_DEBUG=y CONFIG_PRESTERA=y CONFIG_PRESTERA_PCI=y CONFIG_NET_VENDOR_MELLANOX=y CONFIG_MLX4_EN=y CONFIG_MLX4_EN_DCB=y CONFIG_MLX4_CORE=y CONFIG_MLX4_DEBUG=y CONFIG_MLX4_CORE_GEN2=y CONFIG_MLX5_CORE=y CONFIG_MLX5_FPGA=y CONFIG_MLX5_CORE_EN=y CONFIG_MLX5_EN_ARFS=y CONFIG_MLX5_EN_RXNFC=y CONFIG_MLX5_MPFS=y CONFIG_MLX5_ESWITCH=y CONFIG_MLX5_BRIDGE=y CONFIG_MLX5_CLS_ACT=y CONFIG_MLX5_TC_SAMPLE=y CONFIG_MLX5_CORE_EN_DCB=y CONFIG_MLX5_CORE_IPOIB=y CONFIG_MLX5_EN_MACSEC=y CONFIG_MLX5_EN_IPSEC=y CONFIG_MLX5_EN_TLS=y CONFIG_MLX5_SW_STEERING=y CONFIG_MLX5_SF=y CONFIG_MLX5_SF_MANAGER=y CONFIG_MLXSW_CORE=y CONFIG_MLXSW_CORE_HWMON=y CONFIG_MLXSW_CORE_THERMAL=y CONFIG_MLXSW_PCI=y CONFIG_MLXSW_I2C=y CONFIG_MLXSW_SPECTRUM=y CONFIG_MLXSW_SPECTRUM_DCB=y CONFIG_MLXSW_MINIMAL=y CONFIG_MLXFW=y CONFIG_NET_VENDOR_MICREL=y CONFIG_KS8842=y CONFIG_KS8851=y CONFIG_KS8851_MLL=y CONFIG_KSZ884X_PCI=y CONFIG_NET_VENDOR_MICROCHIP=y CONFIG_ENC28J60=y CONFIG_ENC28J60_WRITEVERIFY=y CONFIG_ENCX24J600=y CONFIG_LAN743X=y CONFIG_LAN966X_SWITCH=y CONFIG_VCAP=y CONFIG_NET_VENDOR_MICROSEMI=y CONFIG_MSCC_OCELOT_SWITCH_LIB=y CONFIG_MSCC_OCELOT_SWITCH=y CONFIG_NET_VENDOR_MICROSOFT=y CONFIG_NET_VENDOR_MYRI=y CONFIG_MYRI10GE=y CONFIG_FEALNX=y CONFIG_NET_VENDOR_NI=y CONFIG_NI_XGE_MANAGEMENT_ENET=y CONFIG_NET_VENDOR_NATSEMI=y CONFIG_NATSEMI=y CONFIG_NS83820=y CONFIG_NET_VENDOR_NETERION=y CONFIG_S2IO=y CONFIG_NET_VENDOR_NETRONOME=y CONFIG_NFP=y CONFIG_NFP_APP_FLOWER=y CONFIG_NFP_APP_ABM_NIC=y CONFIG_NFP_NET_IPSEC=y CONFIG_NFP_DEBUG=y CONFIG_NET_VENDOR_8390=y CONFIG_PCMCIA_AXNET=y CONFIG_NE2000=y CONFIG_NE2K_PCI=y CONFIG_PCMCIA_PCNET=y CONFIG_ULTRA=y CONFIG_WD80x3=y CONFIG_NET_VENDOR_NVIDIA=y CONFIG_FORCEDETH=y CONFIG_NET_VENDOR_OKI=y CONFIG_PCH_GBE=y CONFIG_ETHOC=y CONFIG_NET_VENDOR_PACKET_ENGINES=y CONFIG_HAMACHI=y CONFIG_YELLOWFIN=y CONFIG_NET_VENDOR_PENSANDO=y CONFIG_NET_VENDOR_QLOGIC=y CONFIG_QLA3XXX=y CONFIG_QLCNIC=y CONFIG_QLCNIC_SRIOV=y CONFIG_QLCNIC_DCB=y CONFIG_QLCNIC_HWMON=y CONFIG_NETXEN_NIC=y CONFIG_QED=y CONFIG_QED_LL2=y CONFIG_QED_SRIOV=y CONFIG_QEDE=y CONFIG_QED_ISCSI=y CONFIG_QED_FCOE=y CONFIG_QED_OOO=y CONFIG_NET_VENDOR_BROCADE=y CONFIG_BNA=y CONFIG_NET_VENDOR_QUALCOMM=y CONFIG_QCA7000=y CONFIG_QCA7000_SPI=y CONFIG_QCA7000_UART=y CONFIG_QCOM_EMAC=y CONFIG_RMNET=y CONFIG_NET_VENDOR_RDC=y CONFIG_R6040=y CONFIG_NET_VENDOR_REALTEK=y CONFIG_ATP=y CONFIG_8139CP=y CONFIG_8139TOO=y CONFIG_8139TOO_PIO=y CONFIG_8139TOO_TUNE_TWISTER=y CONFIG_8139TOO_8129=y CONFIG_8139_OLD_RX_RESET=y CONFIG_R8169=y CONFIG_NET_VENDOR_RENESAS=y CONFIG_NET_VENDOR_ROCKER=y CONFIG_ROCKER=y CONFIG_NET_VENDOR_SAMSUNG=y CONFIG_SXGBE_ETH=y CONFIG_NET_VENDOR_SEEQ=y CONFIG_NET_VENDOR_SILAN=y CONFIG_SC92031=y CONFIG_NET_VENDOR_SIS=y CONFIG_SIS900=y CONFIG_SIS190=y CONFIG_NET_VENDOR_SOLARFLARE=y CONFIG_SFC=y CONFIG_SFC_MTD=y CONFIG_SFC_MCDI_MON=y CONFIG_SFC_SRIOV=y CONFIG_SFC_MCDI_LOGGING=y CONFIG_SFC_FALCON=y CONFIG_SFC_FALCON_MTD=y CONFIG_SFC_SIENA=y CONFIG_SFC_SIENA_MTD=y CONFIG_SFC_SIENA_MCDI_MON=y CONFIG_SFC_SIENA_SRIOV=y CONFIG_SFC_SIENA_MCDI_LOGGING=y CONFIG_NET_VENDOR_SMSC=y CONFIG_SMC9194=y CONFIG_PCMCIA_SMC91C92=y CONFIG_EPIC100=y CONFIG_SMSC911X=y CONFIG_SMSC9420=y CONFIG_NET_VENDOR_SOCIONEXT=y CONFIG_NET_VENDOR_STMICRO=y CONFIG_STMMAC_ETH=y # CONFIG_STMMAC_SELFTESTS is not set CONFIG_STMMAC_PLATFORM=y CONFIG_DWMAC_DWC_QOS_ETH=y CONFIG_DWMAC_GENERIC=y CONFIG_DWMAC_INTEL_PLAT=y CONFIG_DWMAC_INTEL=y CONFIG_DWMAC_LOONGSON=y CONFIG_STMMAC_PCI=y CONFIG_NET_VENDOR_SUN=y CONFIG_HAPPYMEAL=y CONFIG_SUNGEM=y CONFIG_CASSINI=y CONFIG_NIU=y CONFIG_NET_VENDOR_SYNOPSYS=y CONFIG_DWC_XLGMAC=y CONFIG_DWC_XLGMAC_PCI=y CONFIG_NET_VENDOR_TEHUTI=y CONFIG_TEHUTI=y CONFIG_NET_VENDOR_TI=y CONFIG_TI_CPSW_PHY_SEL=y CONFIG_TLAN=y CONFIG_NET_VENDOR_VERTEXCOM=y CONFIG_MSE102X=y CONFIG_NET_VENDOR_VIA=y CONFIG_VIA_RHINE=y CONFIG_VIA_RHINE_MMIO=y CONFIG_VIA_VELOCITY=y CONFIG_NET_VENDOR_WANGXUN=y CONFIG_LIBWX=y CONFIG_NGBE=y CONFIG_TXGBE=y CONFIG_NET_VENDOR_WIZNET=y CONFIG_WIZNET_W5100=y CONFIG_WIZNET_W5300=y # CONFIG_WIZNET_BUS_DIRECT is not set # CONFIG_WIZNET_BUS_INDIRECT is not set CONFIG_WIZNET_BUS_ANY=y CONFIG_WIZNET_W5100_SPI=y CONFIG_NET_VENDOR_XILINX=y CONFIG_XILINX_EMACLITE=y CONFIG_XILINX_AXI_EMAC=y CONFIG_XILINX_LL_TEMAC=y CONFIG_NET_VENDOR_XIRCOM=y CONFIG_PCMCIA_XIRC2PS=y CONFIG_FDDI=y CONFIG_DEFXX=y CONFIG_SKFP=y CONFIG_HIPPI=y CONFIG_ROADRUNNER=y CONFIG_ROADRUNNER_LARGE_RINGS=y CONFIG_NET_SB1000=y CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y CONFIG_LED_TRIGGER_PHY=y CONFIG_PHYLIB_LEDS=y CONFIG_FIXED_PHY=y CONFIG_SFP=y # # MII PHY device drivers # # CONFIG_AMD_PHY is not set CONFIG_ADIN_PHY=y CONFIG_ADIN1100_PHY=y CONFIG_AQUANTIA_PHY=y CONFIG_AX88796B_PHY=y CONFIG_BROADCOM_PHY=y CONFIG_BCM54140_PHY=y CONFIG_BCM7XXX_PHY=y CONFIG_BCM84881_PHY=y CONFIG_BCM87XX_PHY=y CONFIG_BCM_NET_PHYLIB=y CONFIG_BCM_NET_PHYPTP=y CONFIG_CICADA_PHY=y CONFIG_CORTINA_PHY=y CONFIG_DAVICOM_PHY=y CONFIG_ICPLUS_PHY=y CONFIG_LXT_PHY=y CONFIG_INTEL_XWAY_PHY=y CONFIG_LSI_ET1011C_PHY=y CONFIG_MARVELL_PHY=y CONFIG_MARVELL_10G_PHY=y CONFIG_MARVELL_88X2222_PHY=y CONFIG_MAXLINEAR_GPHY=y CONFIG_MEDIATEK_GE_PHY=y CONFIG_MICREL_PHY=y CONFIG_MICROCHIP_T1S_PHY=y CONFIG_MICROCHIP_PHY=y CONFIG_MICROCHIP_T1_PHY=y CONFIG_MICROSEMI_PHY=y CONFIG_MOTORCOMM_PHY=y CONFIG_NATIONAL_PHY=y CONFIG_NXP_CBTX_PHY=y CONFIG_NXP_C45_TJA11XX_PHY=y CONFIG_NXP_TJA11XX_PHY=y CONFIG_NCN26000_PHY=y CONFIG_AT803X_PHY=y CONFIG_QSEMI_PHY=y CONFIG_REALTEK_PHY=y CONFIG_RENESAS_PHY=y CONFIG_ROCKCHIP_PHY=y CONFIG_SMSC_PHY=y CONFIG_STE10XP=y CONFIG_TERANETICS_PHY=y CONFIG_DP83822_PHY=y CONFIG_DP83TC811_PHY=y CONFIG_DP83848_PHY=y CONFIG_DP83867_PHY=y CONFIG_DP83869_PHY=y CONFIG_DP83TD510_PHY=y CONFIG_VITESSE_PHY=y CONFIG_XILINX_GMII2RGMII=y CONFIG_MICREL_KS8995MA=y CONFIG_PSE_CONTROLLER=y CONFIG_PSE_REGULATOR=y CONFIG_CAN_DEV=y CONFIG_CAN_VCAN=y CONFIG_CAN_VXCAN=y CONFIG_CAN_NETLINK=y CONFIG_CAN_CALC_BITTIMING=y CONFIG_CAN_RX_OFFLOAD=y # CONFIG_CAN_BXCAN is not set CONFIG_CAN_CAN327=y CONFIG_CAN_FLEXCAN=y CONFIG_CAN_GRCAN=y CONFIG_CAN_JANZ_ICAN3=y CONFIG_CAN_KVASER_PCIEFD=y CONFIG_CAN_SLCAN=y CONFIG_CAN_C_CAN=y CONFIG_CAN_C_CAN_PLATFORM=y CONFIG_CAN_C_CAN_PCI=y CONFIG_CAN_CC770=y CONFIG_CAN_CC770_ISA=y CONFIG_CAN_CC770_PLATFORM=y CONFIG_CAN_CTUCANFD=y CONFIG_CAN_CTUCANFD_PCI=y CONFIG_CAN_CTUCANFD_PLATFORM=y CONFIG_CAN_IFI_CANFD=y CONFIG_CAN_M_CAN=y CONFIG_CAN_M_CAN_PCI=y CONFIG_CAN_M_CAN_PLATFORM=y CONFIG_CAN_M_CAN_TCAN4X5X=y CONFIG_CAN_PEAK_PCIEFD=y CONFIG_CAN_SJA1000=y CONFIG_CAN_EMS_PCI=y CONFIG_CAN_EMS_PCMCIA=y CONFIG_CAN_F81601=y CONFIG_CAN_KVASER_PCI=y CONFIG_CAN_PEAK_PCI=y CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_PEAK_PCMCIA=y CONFIG_CAN_PLX_PCI=y CONFIG_CAN_SJA1000_ISA=y CONFIG_CAN_SJA1000_PLATFORM=y CONFIG_CAN_TSCAN1=y CONFIG_CAN_SOFTING=y CONFIG_CAN_SOFTING_CS=y # # CAN SPI interfaces # CONFIG_CAN_HI311X=y CONFIG_CAN_MCP251X=y CONFIG_CAN_MCP251XFD=y CONFIG_CAN_MCP251XFD_SANITY=y # end of CAN SPI interfaces # # CAN USB interfaces # CONFIG_CAN_8DEV_USB=y CONFIG_CAN_EMS_USB=y CONFIG_CAN_ESD_USB=y CONFIG_CAN_ETAS_ES58X=y CONFIG_CAN_GS_USB=y CONFIG_CAN_KVASER_USB=y CONFIG_CAN_MCBA_USB=y CONFIG_CAN_PEAK_USB=y CONFIG_CAN_UCAN=y # end of CAN USB interfaces # CONFIG_CAN_DEBUG_DEVICES is not set # # MCTP Device Drivers # CONFIG_MCTP_SERIAL=y CONFIG_MCTP_TRANSPORT_I2C=y # end of MCTP Device Drivers CONFIG_MDIO_DEVICE=y CONFIG_MDIO_BUS=y CONFIG_FWNODE_MDIO=y CONFIG_OF_MDIO=y CONFIG_ACPI_MDIO=y CONFIG_MDIO_DEVRES=y CONFIG_MDIO_BITBANG=y CONFIG_MDIO_BCM_UNIMAC=y CONFIG_MDIO_GPIO=y CONFIG_MDIO_HISI_FEMAC=y CONFIG_MDIO_I2C=y CONFIG_MDIO_MVUSB=y CONFIG_MDIO_MSCC_MIIM=y CONFIG_MDIO_IPQ4019=y CONFIG_MDIO_IPQ8064=y # # MDIO Multiplexers # CONFIG_MDIO_BUS_MUX=y CONFIG_MDIO_BUS_MUX_GPIO=y CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y CONFIG_MDIO_BUS_MUX_MMIOREG=y # # PCS device drivers # CONFIG_PCS_XPCS=y CONFIG_PCS_LYNX=y CONFIG_PCS_MTK_LYNXI=y CONFIG_PCS_ALTERA_TSE=y # end of PCS device drivers CONFIG_PLIP=y CONFIG_PPP=y CONFIG_PPP_BSDCOMP=y CONFIG_PPP_DEFLATE=y CONFIG_PPP_FILTER=y CONFIG_PPP_MPPE=y CONFIG_PPP_MULTILINK=y CONFIG_PPPOATM=y CONFIG_PPPOE=y CONFIG_PPTP=y CONFIG_PPPOL2TP=y CONFIG_PPP_ASYNC=y CONFIG_PPP_SYNC_TTY=y CONFIG_SLIP=y CONFIG_SLHC=y CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y CONFIG_SLIP_MODE_SLIP6=y CONFIG_USB_NET_DRIVERS=y CONFIG_USB_CATC=y CONFIG_USB_KAWETH=y CONFIG_USB_PEGASUS=y CONFIG_USB_RTL8150=y CONFIG_USB_RTL8152=y CONFIG_USB_LAN78XX=y CONFIG_USB_USBNET=y CONFIG_USB_NET_AX8817X=y CONFIG_USB_NET_AX88179_178A=y CONFIG_USB_NET_CDCETHER=y CONFIG_USB_NET_CDC_EEM=y CONFIG_USB_NET_CDC_NCM=y CONFIG_USB_NET_HUAWEI_CDC_NCM=y CONFIG_USB_NET_CDC_MBIM=y CONFIG_USB_NET_DM9601=y CONFIG_USB_NET_SR9700=y CONFIG_USB_NET_SR9800=y CONFIG_USB_NET_SMSC75XX=y CONFIG_USB_NET_SMSC95XX=y CONFIG_USB_NET_GL620A=y CONFIG_USB_NET_NET1080=y CONFIG_USB_NET_PLUSB=y CONFIG_USB_NET_MCS7830=y CONFIG_USB_NET_RNDIS_HOST=y CONFIG_USB_NET_CDC_SUBSET_ENABLE=y CONFIG_USB_NET_CDC_SUBSET=y CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y CONFIG_USB_BELKIN=y CONFIG_USB_ARMLINUX=y CONFIG_USB_EPSON2888=y CONFIG_USB_KC2190=y CONFIG_USB_NET_ZAURUS=y CONFIG_USB_NET_CX82310_ETH=y CONFIG_USB_NET_KALMIA=y CONFIG_USB_NET_QMI_WWAN=y CONFIG_USB_HSO=y CONFIG_USB_NET_INT51X1=y CONFIG_USB_CDC_PHONET=y CONFIG_USB_IPHETH=y CONFIG_USB_SIERRA_NET=y CONFIG_USB_VL600=y CONFIG_USB_NET_CH9200=y CONFIG_USB_NET_AQC111=y CONFIG_USB_RTL8153_ECM=y CONFIG_WLAN=y CONFIG_WLAN_VENDOR_ADMTEK=y CONFIG_ADM8211=y CONFIG_ATH_COMMON=y CONFIG_WLAN_VENDOR_ATH=y CONFIG_ATH_DEBUG=y CONFIG_ATH_TRACEPOINTS=y CONFIG_ATH_REG_DYNAMIC_USER_REG_HINTS=y CONFIG_ATH_REG_DYNAMIC_USER_CERT_TESTING=y CONFIG_ATH5K=y CONFIG_ATH5K_DEBUG=y CONFIG_ATH5K_TRACER=y CONFIG_ATH5K_PCI=y # CONFIG_ATH5K_TEST_CHANNELS is not set CONFIG_ATH9K_HW=y CONFIG_ATH9K_COMMON=y CONFIG_ATH9K_COMMON_DEBUG=y CONFIG_ATH9K_DFS_DEBUGFS=y CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=y CONFIG_ATH9K_PCI=y CONFIG_ATH9K_AHB=y CONFIG_ATH9K_DEBUGFS=y CONFIG_ATH9K_STATION_STATISTICS=y CONFIG_ATH9K_TX99=y CONFIG_ATH9K_DFS_CERTIFIED=y CONFIG_ATH9K_DYNACK=y CONFIG_ATH9K_WOW=y CONFIG_ATH9K_RFKILL=y CONFIG_ATH9K_CHANNEL_CONTEXT=y CONFIG_ATH9K_PCOEM=y CONFIG_ATH9K_PCI_NO_EEPROM=y CONFIG_ATH9K_HTC=y CONFIG_ATH9K_HTC_DEBUGFS=y CONFIG_ATH9K_HWRNG=y CONFIG_ATH9K_COMMON_SPECTRAL=y CONFIG_CARL9170=y CONFIG_CARL9170_LEDS=y CONFIG_CARL9170_DEBUGFS=y CONFIG_CARL9170_WPC=y CONFIG_CARL9170_HWRNG=y CONFIG_ATH6KL=y CONFIG_ATH6KL_SDIO=y CONFIG_ATH6KL_USB=y CONFIG_ATH6KL_DEBUG=y CONFIG_ATH6KL_TRACING=y CONFIG_ATH6KL_REGDOMAIN=y CONFIG_AR5523=y CONFIG_WIL6210=y CONFIG_WIL6210_ISR_COR=y CONFIG_WIL6210_TRACING=y CONFIG_WIL6210_DEBUGFS=y CONFIG_ATH10K=y CONFIG_ATH10K_CE=y CONFIG_ATH10K_PCI=y CONFIG_ATH10K_AHB=y CONFIG_ATH10K_SDIO=y CONFIG_ATH10K_USB=y CONFIG_ATH10K_DEBUG=y CONFIG_ATH10K_DEBUGFS=y CONFIG_ATH10K_SPECTRAL=y CONFIG_ATH10K_TRACING=y CONFIG_ATH10K_DFS_CERTIFIED=y CONFIG_WCN36XX=y CONFIG_WCN36XX_DEBUGFS=y CONFIG_ATH11K=y CONFIG_ATH11K_AHB=y CONFIG_ATH11K_PCI=y CONFIG_ATH11K_DEBUG=y CONFIG_ATH11K_DEBUGFS=y CONFIG_ATH11K_TRACING=y CONFIG_ATH11K_SPECTRAL=y CONFIG_ATH12K=y CONFIG_ATH12K_DEBUG=y CONFIG_ATH12K_TRACING=y CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_ATMEL=y CONFIG_PCI_ATMEL=y CONFIG_PCMCIA_ATMEL=y CONFIG_AT76C50X_USB=y CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_B43=y CONFIG_B43_BCMA=y CONFIG_B43_SSB=y CONFIG_B43_BUSES_BCMA_AND_SSB=y # CONFIG_B43_BUSES_BCMA is not set # CONFIG_B43_BUSES_SSB is not set CONFIG_B43_PCI_AUTOSELECT=y CONFIG_B43_PCICORE_AUTOSELECT=y CONFIG_B43_SDIO=y CONFIG_B43_BCMA_PIO=y CONFIG_B43_PIO=y CONFIG_B43_PHY_G=y CONFIG_B43_PHY_N=y CONFIG_B43_PHY_LP=y CONFIG_B43_PHY_HT=y CONFIG_B43_LEDS=y CONFIG_B43_HWRNG=y CONFIG_B43_DEBUG=y CONFIG_B43LEGACY=y CONFIG_B43LEGACY_PCI_AUTOSELECT=y CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y CONFIG_B43LEGACY_LEDS=y CONFIG_B43LEGACY_HWRNG=y CONFIG_B43LEGACY_DEBUG=y CONFIG_B43LEGACY_DMA=y CONFIG_B43LEGACY_PIO=y CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y # CONFIG_B43LEGACY_DMA_MODE is not set # CONFIG_B43LEGACY_PIO_MODE is not set CONFIG_BRCMUTIL=y CONFIG_BRCMSMAC=y CONFIG_BRCMSMAC_LEDS=y CONFIG_BRCMFMAC=y CONFIG_BRCMFMAC_PROTO_BCDC=y CONFIG_BRCMFMAC_PROTO_MSGBUF=y CONFIG_BRCMFMAC_SDIO=y CONFIG_BRCMFMAC_USB=y CONFIG_BRCMFMAC_PCIE=y CONFIG_BRCM_TRACING=y CONFIG_BRCMDBG=y CONFIG_WLAN_VENDOR_CISCO=y CONFIG_AIRO=y CONFIG_AIRO_CS=y CONFIG_WLAN_VENDOR_INTEL=y CONFIG_IPW2100=y CONFIG_IPW2100_MONITOR=y CONFIG_IPW2100_DEBUG=y CONFIG_IPW2200=y CONFIG_IPW2200_MONITOR=y CONFIG_IPW2200_RADIOTAP=y CONFIG_IPW2200_PROMISCUOUS=y CONFIG_IPW2200_QOS=y CONFIG_IPW2200_DEBUG=y CONFIG_LIBIPW=y CONFIG_LIBIPW_DEBUG=y CONFIG_IWLEGACY=y CONFIG_IWL4965=y CONFIG_IWL3945=y # # iwl3945 / iwl4965 Debugging Options # CONFIG_IWLEGACY_DEBUG=y CONFIG_IWLEGACY_DEBUGFS=y # end of iwl3945 / iwl4965 Debugging Options CONFIG_IWLWIFI=y CONFIG_IWLWIFI_LEDS=y CONFIG_IWLDVM=y CONFIG_IWLMVM=y # # Debugging Options # CONFIG_IWLWIFI_DEBUG=y CONFIG_IWLWIFI_DEBUGFS=y CONFIG_IWLWIFI_DEVICE_TRACING=y # end of Debugging Options CONFIG_WLAN_VENDOR_INTERSIL=y CONFIG_HOSTAP=y CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=y CONFIG_HOSTAP_PCI=y CONFIG_HOSTAP_CS=y CONFIG_HERMES=y CONFIG_HERMES_PRISM=y CONFIG_HERMES_CACHE_FW_ON_INIT=y CONFIG_PLX_HERMES=y CONFIG_TMD_HERMES=y CONFIG_NORTEL_HERMES=y CONFIG_PCI_HERMES=y CONFIG_PCMCIA_HERMES=y CONFIG_PCMCIA_SPECTRUM=y CONFIG_ORINOCO_USB=y CONFIG_P54_COMMON=y CONFIG_P54_USB=y CONFIG_P54_PCI=y CONFIG_P54_SPI=y CONFIG_P54_SPI_DEFAULT_EEPROM=y CONFIG_P54_LEDS=y CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_LIBERTAS=y CONFIG_LIBERTAS_USB=y CONFIG_LIBERTAS_CS=y CONFIG_LIBERTAS_SDIO=y CONFIG_LIBERTAS_SPI=y CONFIG_LIBERTAS_DEBUG=y CONFIG_LIBERTAS_MESH=y CONFIG_LIBERTAS_THINFIRM=y CONFIG_LIBERTAS_THINFIRM_DEBUG=y CONFIG_LIBERTAS_THINFIRM_USB=y CONFIG_MWIFIEX=y CONFIG_MWIFIEX_SDIO=y CONFIG_MWIFIEX_PCIE=y CONFIG_MWIFIEX_USB=y CONFIG_MWL8K=y CONFIG_WLAN_VENDOR_MEDIATEK=y CONFIG_MT7601U=y CONFIG_MT76_CORE=y CONFIG_MT76_LEDS=y CONFIG_MT76_USB=y CONFIG_MT76_SDIO=y CONFIG_MT76x02_LIB=y CONFIG_MT76x02_USB=y CONFIG_MT76_CONNAC_LIB=y CONFIG_MT76x0_COMMON=y CONFIG_MT76x0U=y CONFIG_MT76x0E=y CONFIG_MT76x2_COMMON=y CONFIG_MT76x2E=y CONFIG_MT76x2U=y CONFIG_MT7603E=y CONFIG_MT7615_COMMON=y CONFIG_MT7615E=y CONFIG_MT7663_USB_SDIO_COMMON=y CONFIG_MT7663U=y CONFIG_MT7663S=y CONFIG_MT7915E=y CONFIG_MT7921_COMMON=y CONFIG_MT7921E=y CONFIG_MT7921S=y CONFIG_MT7921U=y CONFIG_MT7996E=y CONFIG_WLAN_VENDOR_MICROCHIP=y CONFIG_WILC1000=y CONFIG_WILC1000_SDIO=y CONFIG_WILC1000_SPI=y CONFIG_WILC1000_HW_OOB_INTR=y CONFIG_WLAN_VENDOR_PURELIFI=y CONFIG_PLFXLC=y CONFIG_WLAN_VENDOR_RALINK=y CONFIG_RT2X00=y CONFIG_RT2400PCI=y CONFIG_RT2500PCI=y CONFIG_RT61PCI=y CONFIG_RT2800PCI=y CONFIG_RT2800PCI_RT33XX=y CONFIG_RT2800PCI_RT35XX=y CONFIG_RT2800PCI_RT53XX=y CONFIG_RT2800PCI_RT3290=y CONFIG_RT2500USB=y CONFIG_RT73USB=y CONFIG_RT2800USB=y CONFIG_RT2800USB_RT33XX=y CONFIG_RT2800USB_RT35XX=y CONFIG_RT2800USB_RT3573=y CONFIG_RT2800USB_RT53XX=y CONFIG_RT2800USB_RT55XX=y CONFIG_RT2800USB_UNKNOWN=y CONFIG_RT2800_LIB=y CONFIG_RT2800_LIB_MMIO=y CONFIG_RT2X00_LIB_MMIO=y CONFIG_RT2X00_LIB_PCI=y CONFIG_RT2X00_LIB_USB=y CONFIG_RT2X00_LIB=y CONFIG_RT2X00_LIB_FIRMWARE=y CONFIG_RT2X00_LIB_CRYPTO=y CONFIG_RT2X00_LIB_LEDS=y CONFIG_RT2X00_LIB_DEBUGFS=y CONFIG_RT2X00_DEBUG=y CONFIG_WLAN_VENDOR_REALTEK=y CONFIG_RTL8180=y CONFIG_RTL8187=y CONFIG_RTL8187_LEDS=y CONFIG_RTL_CARDS=y CONFIG_RTL8192CE=y CONFIG_RTL8192SE=y CONFIG_RTL8192DE=y CONFIG_RTL8723AE=y CONFIG_RTL8723BE=y CONFIG_RTL8188EE=y CONFIG_RTL8192EE=y CONFIG_RTL8821AE=y CONFIG_RTL8192CU=y CONFIG_RTLWIFI=y CONFIG_RTLWIFI_PCI=y CONFIG_RTLWIFI_USB=y CONFIG_RTLWIFI_DEBUG=y CONFIG_RTL8192C_COMMON=y CONFIG_RTL8723_COMMON=y CONFIG_RTLBTCOEXIST=y CONFIG_RTL8XXXU=y CONFIG_RTL8XXXU_UNTESTED=y CONFIG_RTW88=y CONFIG_RTW88_CORE=y CONFIG_RTW88_PCI=y CONFIG_RTW88_SDIO=y CONFIG_RTW88_USB=y CONFIG_RTW88_8822B=y CONFIG_RTW88_8822C=y CONFIG_RTW88_8723D=y CONFIG_RTW88_8821C=y CONFIG_RTW88_8822BE=y CONFIG_RTW88_8822BS=y CONFIG_RTW88_8822BU=y CONFIG_RTW88_8822CE=y CONFIG_RTW88_8822CS=y CONFIG_RTW88_8822CU=y CONFIG_RTW88_8723DE=y CONFIG_RTW88_8723DU=y CONFIG_RTW88_8821CE=y CONFIG_RTW88_8821CS=y CONFIG_RTW88_8821CU=y CONFIG_RTW88_DEBUG=y CONFIG_RTW88_DEBUGFS=y CONFIG_RTW89=y CONFIG_RTW89_CORE=y CONFIG_RTW89_PCI=y CONFIG_RTW89_8852A=y CONFIG_RTW89_8852B=y CONFIG_RTW89_8852C=y CONFIG_RTW89_8852AE=y CONFIG_RTW89_8852BE=y CONFIG_RTW89_8852CE=y CONFIG_RTW89_DEBUG=y CONFIG_RTW89_DEBUGMSG=y CONFIG_RTW89_DEBUGFS=y CONFIG_WLAN_VENDOR_RSI=y CONFIG_RSI_91X=y CONFIG_RSI_DEBUGFS=y CONFIG_RSI_SDIO=y CONFIG_RSI_USB=y CONFIG_RSI_COEX=y CONFIG_WLAN_VENDOR_SILABS=y CONFIG_WFX=y CONFIG_WLAN_VENDOR_ST=y CONFIG_CW1200=y CONFIG_CW1200_WLAN_SDIO=y CONFIG_CW1200_WLAN_SPI=y CONFIG_WLAN_VENDOR_TI=y CONFIG_WL1251=y CONFIG_WL1251_SPI=y CONFIG_WL1251_SDIO=y CONFIG_WL12XX=y CONFIG_WL18XX=y CONFIG_WLCORE=y CONFIG_WLCORE_SPI=y CONFIG_WLCORE_SDIO=y CONFIG_WLAN_VENDOR_ZYDAS=y CONFIG_USB_ZD1201=y CONFIG_ZD1211RW=y CONFIG_ZD1211RW_DEBUG=y CONFIG_WLAN_VENDOR_QUANTENNA=y CONFIG_QTNFMAC=y CONFIG_QTNFMAC_PCIE=y CONFIG_PCMCIA_RAYCS=y CONFIG_PCMCIA_WL3501=y CONFIG_USB_NET_RNDIS_WLAN=y CONFIG_MAC80211_HWSIM=y CONFIG_VIRT_WIFI=y CONFIG_WAN=y CONFIG_HDLC=y CONFIG_HDLC_RAW=y CONFIG_HDLC_RAW_ETH=y CONFIG_HDLC_CISCO=y CONFIG_HDLC_FR=y CONFIG_HDLC_PPP=y CONFIG_HDLC_X25=y CONFIG_PCI200SYN=y CONFIG_WANXL=y CONFIG_PC300TOO=y CONFIG_N2=y CONFIG_C101=y CONFIG_FARSYNC=y CONFIG_LAPBETHER=y CONFIG_IEEE802154_DRIVERS=y CONFIG_IEEE802154_FAKELB=y CONFIG_IEEE802154_AT86RF230=y CONFIG_IEEE802154_MRF24J40=y CONFIG_IEEE802154_CC2520=y CONFIG_IEEE802154_ATUSB=y CONFIG_IEEE802154_ADF7242=y CONFIG_IEEE802154_CA8210=y CONFIG_IEEE802154_CA8210_DEBUGFS=y CONFIG_IEEE802154_MCR20A=y CONFIG_IEEE802154_HWSIM=y # # Wireless WAN # CONFIG_WWAN=y CONFIG_WWAN_DEBUGFS=y CONFIG_WWAN_HWSIM=y CONFIG_MHI_WWAN_CTRL=y CONFIG_MHI_WWAN_MBIM=y CONFIG_RPMSG_WWAN_CTRL=y CONFIG_IOSM=y CONFIG_MTK_T7XX=y # end of Wireless WAN CONFIG_VMXNET3=y CONFIG_FUJITSU_ES=y CONFIG_USB4_NET=y CONFIG_HYPERV_NET=y CONFIG_NETDEVSIM=y CONFIG_NET_FAILOVER=y CONFIG_NETDEV_LEGACY_INIT=y CONFIG_ISDN=y CONFIG_ISDN_CAPI=y CONFIG_CAPI_TRACE=y CONFIG_ISDN_CAPI_MIDDLEWARE=y CONFIG_MISDN=y CONFIG_MISDN_DSP=y CONFIG_MISDN_L1OIP=y # # mISDN hardware drivers # CONFIG_MISDN_HFCPCI=y CONFIG_MISDN_HFCMULTI=y CONFIG_MISDN_HFCUSB=y CONFIG_MISDN_AVMFRITZ=y CONFIG_MISDN_SPEEDFAX=y CONFIG_MISDN_INFINEON=y CONFIG_MISDN_W6692=y CONFIG_MISDN_NETJET=y CONFIG_MISDN_HDLC=y CONFIG_MISDN_IPAC=y CONFIG_MISDN_ISAR=y # # Input device support # CONFIG_INPUT=y CONFIG_INPUT_LEDS=y CONFIG_INPUT_FF_MEMLESS=y CONFIG_INPUT_SPARSEKMAP=y CONFIG_INPUT_MATRIXKMAP=y CONFIG_INPUT_VIVALDIFMAP=y # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 CONFIG_INPUT_JOYDEV=y CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVBUG=y # # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y CONFIG_KEYBOARD_ADC=y CONFIG_KEYBOARD_ADP5520=y CONFIG_KEYBOARD_ADP5588=y CONFIG_KEYBOARD_ADP5589=y CONFIG_KEYBOARD_APPLESPI=y CONFIG_KEYBOARD_ATKBD=y CONFIG_KEYBOARD_QT1050=y CONFIG_KEYBOARD_QT1070=y CONFIG_KEYBOARD_QT2160=y CONFIG_KEYBOARD_DLINK_DIR685=y CONFIG_KEYBOARD_LKKBD=y CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_GPIO_POLLED=y CONFIG_KEYBOARD_TCA6416=y CONFIG_KEYBOARD_TCA8418=y CONFIG_KEYBOARD_MATRIX=y CONFIG_KEYBOARD_LM8323=y CONFIG_KEYBOARD_LM8333=y CONFIG_KEYBOARD_MAX7359=y CONFIG_KEYBOARD_MCS=y CONFIG_KEYBOARD_MPR121=y CONFIG_KEYBOARD_NEWTON=y CONFIG_KEYBOARD_OPENCORES=y CONFIG_KEYBOARD_PINEPHONE=y CONFIG_KEYBOARD_SAMSUNG=y CONFIG_KEYBOARD_GOLDFISH_EVENTS=y CONFIG_KEYBOARD_STOWAWAY=y CONFIG_KEYBOARD_SUNKBD=y CONFIG_KEYBOARD_STMPE=y CONFIG_KEYBOARD_IQS62X=y CONFIG_KEYBOARD_OMAP4=y CONFIG_KEYBOARD_TC3589X=y CONFIG_KEYBOARD_TM2_TOUCHKEY=y CONFIG_KEYBOARD_TWL4030=y CONFIG_KEYBOARD_XTKBD=y CONFIG_KEYBOARD_CROS_EC=y CONFIG_KEYBOARD_CAP11XX=y CONFIG_KEYBOARD_BCM=y CONFIG_KEYBOARD_MTK_PMIC=y CONFIG_KEYBOARD_CYPRESS_SF=y CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y CONFIG_MOUSE_PS2_BYD=y CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y CONFIG_MOUSE_PS2_SYNAPTICS_SMBUS=y CONFIG_MOUSE_PS2_CYPRESS=y CONFIG_MOUSE_PS2_LIFEBOOK=y CONFIG_MOUSE_PS2_TRACKPOINT=y CONFIG_MOUSE_PS2_ELANTECH=y CONFIG_MOUSE_PS2_ELANTECH_SMBUS=y CONFIG_MOUSE_PS2_SENTELIC=y CONFIG_MOUSE_PS2_TOUCHKIT=y CONFIG_MOUSE_PS2_OLPC=y CONFIG_MOUSE_PS2_FOCALTECH=y CONFIG_MOUSE_PS2_VMMOUSE=y CONFIG_MOUSE_PS2_SMBUS=y CONFIG_MOUSE_SERIAL=y CONFIG_MOUSE_APPLETOUCH=y CONFIG_MOUSE_BCM5974=y CONFIG_MOUSE_CYAPA=y CONFIG_MOUSE_ELAN_I2C=y CONFIG_MOUSE_ELAN_I2C_I2C=y CONFIG_MOUSE_ELAN_I2C_SMBUS=y CONFIG_MOUSE_INPORT=y CONFIG_MOUSE_ATIXL=y CONFIG_MOUSE_LOGIBM=y CONFIG_MOUSE_PC110PAD=y CONFIG_MOUSE_VSXXXAA=y CONFIG_MOUSE_GPIO=y CONFIG_MOUSE_SYNAPTICS_I2C=y CONFIG_MOUSE_SYNAPTICS_USB=y CONFIG_INPUT_JOYSTICK=y CONFIG_JOYSTICK_ANALOG=y CONFIG_JOYSTICK_A3D=y CONFIG_JOYSTICK_ADC=y CONFIG_JOYSTICK_ADI=y CONFIG_JOYSTICK_COBRA=y CONFIG_JOYSTICK_GF2K=y CONFIG_JOYSTICK_GRIP=y CONFIG_JOYSTICK_GRIP_MP=y CONFIG_JOYSTICK_GUILLEMOT=y CONFIG_JOYSTICK_INTERACT=y CONFIG_JOYSTICK_SIDEWINDER=y CONFIG_JOYSTICK_TMDC=y CONFIG_JOYSTICK_IFORCE=y CONFIG_JOYSTICK_IFORCE_USB=y CONFIG_JOYSTICK_IFORCE_232=y CONFIG_JOYSTICK_WARRIOR=y CONFIG_JOYSTICK_MAGELLAN=y CONFIG_JOYSTICK_SPACEORB=y CONFIG_JOYSTICK_SPACEBALL=y CONFIG_JOYSTICK_STINGER=y CONFIG_JOYSTICK_TWIDJOY=y CONFIG_JOYSTICK_ZHENHUA=y CONFIG_JOYSTICK_DB9=y CONFIG_JOYSTICK_GAMECON=y CONFIG_JOYSTICK_TURBOGRAFX=y CONFIG_JOYSTICK_AS5011=y CONFIG_JOYSTICK_JOYDUMP=y CONFIG_JOYSTICK_XPAD=y CONFIG_JOYSTICK_XPAD_FF=y CONFIG_JOYSTICK_XPAD_LEDS=y CONFIG_JOYSTICK_WALKERA0701=y CONFIG_JOYSTICK_PSXPAD_SPI=y CONFIG_JOYSTICK_PSXPAD_SPI_FF=y CONFIG_JOYSTICK_PXRC=y CONFIG_JOYSTICK_QWIIC=y CONFIG_JOYSTICK_FSIA6B=y CONFIG_JOYSTICK_SENSEHAT=y CONFIG_INPUT_TABLET=y CONFIG_TABLET_USB_ACECAD=y CONFIG_TABLET_USB_AIPTEK=y CONFIG_TABLET_USB_HANWANG=y CONFIG_TABLET_USB_KBTAB=y CONFIG_TABLET_USB_PEGASUS=y CONFIG_TABLET_SERIAL_WACOM4=y CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_88PM860X=y CONFIG_TOUCHSCREEN_ADS7846=y CONFIG_TOUCHSCREEN_AD7877=y CONFIG_TOUCHSCREEN_AD7879=y CONFIG_TOUCHSCREEN_AD7879_I2C=y CONFIG_TOUCHSCREEN_AD7879_SPI=y CONFIG_TOUCHSCREEN_ADC=y CONFIG_TOUCHSCREEN_AR1021_I2C=y CONFIG_TOUCHSCREEN_ATMEL_MXT=y CONFIG_TOUCHSCREEN_ATMEL_MXT_T37=y CONFIG_TOUCHSCREEN_AUO_PIXCIR=y CONFIG_TOUCHSCREEN_BU21013=y CONFIG_TOUCHSCREEN_BU21029=y CONFIG_TOUCHSCREEN_CHIPONE_ICN8318=y CONFIG_TOUCHSCREEN_CHIPONE_ICN8505=y CONFIG_TOUCHSCREEN_CY8CTMA140=y CONFIG_TOUCHSCREEN_CY8CTMG110=y CONFIG_TOUCHSCREEN_CYTTSP_CORE=y CONFIG_TOUCHSCREEN_CYTTSP_I2C=y CONFIG_TOUCHSCREEN_CYTTSP_SPI=y CONFIG_TOUCHSCREEN_CYTTSP4_CORE=y CONFIG_TOUCHSCREEN_CYTTSP4_I2C=y CONFIG_TOUCHSCREEN_CYTTSP4_SPI=y CONFIG_TOUCHSCREEN_CYTTSP5=y CONFIG_TOUCHSCREEN_DA9034=y CONFIG_TOUCHSCREEN_DA9052=y CONFIG_TOUCHSCREEN_DYNAPRO=y CONFIG_TOUCHSCREEN_HAMPSHIRE=y CONFIG_TOUCHSCREEN_EETI=y CONFIG_TOUCHSCREEN_EGALAX=y CONFIG_TOUCHSCREEN_EGALAX_SERIAL=y CONFIG_TOUCHSCREEN_EXC3000=y CONFIG_TOUCHSCREEN_FUJITSU=y CONFIG_TOUCHSCREEN_GOODIX=y CONFIG_TOUCHSCREEN_HIDEEP=y CONFIG_TOUCHSCREEN_HYCON_HY46XX=y CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX=y CONFIG_TOUCHSCREEN_ILI210X=y CONFIG_TOUCHSCREEN_ILITEK=y CONFIG_TOUCHSCREEN_S6SY761=y CONFIG_TOUCHSCREEN_GUNZE=y CONFIG_TOUCHSCREEN_EKTF2127=y CONFIG_TOUCHSCREEN_ELAN=y CONFIG_TOUCHSCREEN_ELO=y CONFIG_TOUCHSCREEN_WACOM_W8001=y CONFIG_TOUCHSCREEN_WACOM_I2C=y CONFIG_TOUCHSCREEN_MAX11801=y CONFIG_TOUCHSCREEN_MCS5000=y CONFIG_TOUCHSCREEN_MMS114=y CONFIG_TOUCHSCREEN_MELFAS_MIP4=y CONFIG_TOUCHSCREEN_MSG2638=y CONFIG_TOUCHSCREEN_MTOUCH=y CONFIG_TOUCHSCREEN_NOVATEK_NVT_TS=y CONFIG_TOUCHSCREEN_IMAGIS=y CONFIG_TOUCHSCREEN_IMX6UL_TSC=y CONFIG_TOUCHSCREEN_INEXIO=y CONFIG_TOUCHSCREEN_MK712=y CONFIG_TOUCHSCREEN_HTCPEN=y CONFIG_TOUCHSCREEN_PENMOUNT=y CONFIG_TOUCHSCREEN_EDT_FT5X06=y CONFIG_TOUCHSCREEN_TOUCHRIGHT=y CONFIG_TOUCHSCREEN_TOUCHWIN=y CONFIG_TOUCHSCREEN_TI_AM335X_TSC=y CONFIG_TOUCHSCREEN_PIXCIR=y CONFIG_TOUCHSCREEN_WDT87XX_I2C=y CONFIG_TOUCHSCREEN_WM831X=y CONFIG_TOUCHSCREEN_WM97XX=y CONFIG_TOUCHSCREEN_WM9705=y CONFIG_TOUCHSCREEN_WM9712=y CONFIG_TOUCHSCREEN_WM9713=y CONFIG_TOUCHSCREEN_USB_COMPOSITE=y CONFIG_TOUCHSCREEN_MC13783=y CONFIG_TOUCHSCREEN_USB_EGALAX=y CONFIG_TOUCHSCREEN_USB_PANJIT=y CONFIG_TOUCHSCREEN_USB_3M=y CONFIG_TOUCHSCREEN_USB_ITM=y CONFIG_TOUCHSCREEN_USB_ETURBO=y CONFIG_TOUCHSCREEN_USB_GUNZE=y CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y CONFIG_TOUCHSCREEN_USB_IRTOUCH=y CONFIG_TOUCHSCREEN_USB_IDEALTEK=y CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y CONFIG_TOUCHSCREEN_USB_GOTOP=y CONFIG_TOUCHSCREEN_USB_JASTEC=y CONFIG_TOUCHSCREEN_USB_ELO=y CONFIG_TOUCHSCREEN_USB_E2I=y CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y CONFIG_TOUCHSCREEN_USB_NEXIO=y CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y CONFIG_TOUCHSCREEN_TOUCHIT213=y CONFIG_TOUCHSCREEN_TSC_SERIO=y CONFIG_TOUCHSCREEN_TSC200X_CORE=y CONFIG_TOUCHSCREEN_TSC2004=y CONFIG_TOUCHSCREEN_TSC2005=y CONFIG_TOUCHSCREEN_TSC2007=y CONFIG_TOUCHSCREEN_TSC2007_IIO=y CONFIG_TOUCHSCREEN_PCAP=y CONFIG_TOUCHSCREEN_RM_TS=y CONFIG_TOUCHSCREEN_SILEAD=y CONFIG_TOUCHSCREEN_SIS_I2C=y CONFIG_TOUCHSCREEN_ST1232=y CONFIG_TOUCHSCREEN_STMFTS=y CONFIG_TOUCHSCREEN_STMPE=y CONFIG_TOUCHSCREEN_SUR40=y CONFIG_TOUCHSCREEN_SURFACE3_SPI=y CONFIG_TOUCHSCREEN_SX8654=y CONFIG_TOUCHSCREEN_TPS6507X=y CONFIG_TOUCHSCREEN_ZET6223=y CONFIG_TOUCHSCREEN_ZFORCE=y CONFIG_TOUCHSCREEN_COLIBRI_VF50=y CONFIG_TOUCHSCREEN_ROHM_BU21023=y CONFIG_TOUCHSCREEN_IQS5XX=y CONFIG_TOUCHSCREEN_ZINITIX=y CONFIG_TOUCHSCREEN_HIMAX_HX83112B=y CONFIG_INPUT_MISC=y CONFIG_INPUT_88PM860X_ONKEY=y CONFIG_INPUT_88PM80X_ONKEY=y CONFIG_INPUT_AD714X=y CONFIG_INPUT_AD714X_I2C=y CONFIG_INPUT_AD714X_SPI=y CONFIG_INPUT_ARIZONA_HAPTICS=y CONFIG_INPUT_ATC260X_ONKEY=y CONFIG_INPUT_ATMEL_CAPTOUCH=y CONFIG_INPUT_BMA150=y CONFIG_INPUT_E3X0_BUTTON=y CONFIG_INPUT_PCSPKR=y CONFIG_INPUT_MAX77650_ONKEY=y CONFIG_INPUT_MAX77693_HAPTIC=y CONFIG_INPUT_MAX8925_ONKEY=y CONFIG_INPUT_MAX8997_HAPTIC=y CONFIG_INPUT_MC13783_PWRBUTTON=y CONFIG_INPUT_MMA8450=y CONFIG_INPUT_APANEL=y CONFIG_INPUT_GPIO_BEEPER=y CONFIG_INPUT_GPIO_DECODER=y CONFIG_INPUT_GPIO_VIBRA=y CONFIG_INPUT_CPCAP_PWRBUTTON=y CONFIG_INPUT_WISTRON_BTNS=y CONFIG_INPUT_ATLAS_BTNS=y CONFIG_INPUT_ATI_REMOTE2=y CONFIG_INPUT_KEYSPAN_REMOTE=y CONFIG_INPUT_KXTJ9=y CONFIG_INPUT_POWERMATE=y CONFIG_INPUT_YEALINK=y CONFIG_INPUT_CM109=y CONFIG_INPUT_REGULATOR_HAPTIC=y CONFIG_INPUT_RETU_PWRBUTTON=y CONFIG_INPUT_TPS65218_PWRBUTTON=y CONFIG_INPUT_TPS65219_PWRBUTTON=y CONFIG_INPUT_AXP20X_PEK=y CONFIG_INPUT_TWL4030_PWRBUTTON=y CONFIG_INPUT_TWL4030_VIBRA=y CONFIG_INPUT_TWL6040_VIBRA=y CONFIG_INPUT_UINPUT=y CONFIG_INPUT_PALMAS_PWRBUTTON=y CONFIG_INPUT_PCF50633_PMU=y CONFIG_INPUT_PCF8574=y CONFIG_INPUT_PWM_BEEPER=y CONFIG_INPUT_PWM_VIBRA=y CONFIG_INPUT_GPIO_ROTARY_ENCODER=y CONFIG_INPUT_DA7280_HAPTICS=y CONFIG_INPUT_DA9052_ONKEY=y CONFIG_INPUT_DA9055_ONKEY=y CONFIG_INPUT_DA9063_ONKEY=y CONFIG_INPUT_WM831X_ON=y CONFIG_INPUT_PCAP=y CONFIG_INPUT_ADXL34X=y CONFIG_INPUT_ADXL34X_I2C=y CONFIG_INPUT_ADXL34X_SPI=y CONFIG_INPUT_IBM_PANEL=y CONFIG_INPUT_IMS_PCU=y CONFIG_INPUT_IQS269A=y CONFIG_INPUT_IQS626A=y CONFIG_INPUT_IQS7222=y CONFIG_INPUT_CMA3000=y CONFIG_INPUT_CMA3000_I2C=y CONFIG_INPUT_IDEAPAD_SLIDEBAR=y CONFIG_INPUT_SOC_BUTTON_ARRAY=y CONFIG_INPUT_DRV260X_HAPTICS=y CONFIG_INPUT_DRV2665_HAPTICS=y CONFIG_INPUT_DRV2667_HAPTICS=y CONFIG_INPUT_RAVE_SP_PWRBUTTON=y CONFIG_INPUT_RT5120_PWRKEY=y CONFIG_INPUT_STPMIC1_ONKEY=y CONFIG_RMI4_CORE=y CONFIG_RMI4_I2C=y CONFIG_RMI4_SPI=y CONFIG_RMI4_SMB=y CONFIG_RMI4_F03=y CONFIG_RMI4_F03_SERIO=y CONFIG_RMI4_2D_SENSOR=y CONFIG_RMI4_F11=y CONFIG_RMI4_F12=y CONFIG_RMI4_F30=y CONFIG_RMI4_F34=y CONFIG_RMI4_F3A=y CONFIG_RMI4_F54=y CONFIG_RMI4_F55=y # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_SERPORT=y CONFIG_SERIO_CT82C710=y CONFIG_SERIO_PARKBD=y CONFIG_SERIO_PCIPS2=y CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_RAW=y CONFIG_SERIO_ALTERA_PS2=y CONFIG_SERIO_PS2MULT=y CONFIG_SERIO_ARC_PS2=y CONFIG_SERIO_APBPS2=y CONFIG_HYPERV_KEYBOARD=y CONFIG_SERIO_GPIO_PS2=y CONFIG_USERIO=y CONFIG_GAMEPORT=y CONFIG_GAMEPORT_NS558=y CONFIG_GAMEPORT_L4=y CONFIG_GAMEPORT_EMU10K1=y CONFIG_GAMEPORT_FM801=y # end of Hardware I/O ports # end of Input device support # # Character devices # CONFIG_TTY=y CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LEGACY_TIOCSTI=y CONFIG_LDISC_AUTOLOAD=y # # Serial drivers # CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y CONFIG_SERIAL_8250_PNP=y CONFIG_SERIAL_8250_16550A_VARIANTS=y CONFIG_SERIAL_8250_FINTEK=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y CONFIG_SERIAL_8250_PCILIB=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y CONFIG_SERIAL_8250_CS=y CONFIG_SERIAL_8250_MEN_MCB=y CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_FOURPORT=y CONFIG_SERIAL_8250_ACCENT=y CONFIG_SERIAL_8250_BOCA=y CONFIG_SERIAL_8250_EXAR_ST16C554=y CONFIG_SERIAL_8250_HUB6=y CONFIG_SERIAL_8250_PCI1XXXX=y CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_DETECT_IRQ=y CONFIG_SERIAL_8250_RSA=y CONFIG_SERIAL_8250_DWLIB=y CONFIG_SERIAL_8250_DFL=y CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_8250_RT288X=y CONFIG_SERIAL_8250_LPSS=y CONFIG_SERIAL_8250_MID=y CONFIG_SERIAL_8250_PERICOM=y CONFIG_SERIAL_OF_PLATFORM=y # # Non-8250 serial port support # CONFIG_SERIAL_MAX3100=y CONFIG_SERIAL_MAX310X=y CONFIG_SERIAL_UARTLITE=y CONFIG_SERIAL_UARTLITE_CONSOLE=y CONFIG_SERIAL_UARTLITE_NR_UARTS=1 CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_SERIAL_JSM=y CONFIG_SERIAL_SIFIVE=y CONFIG_SERIAL_SIFIVE_CONSOLE=y CONFIG_SERIAL_LANTIQ=y CONFIG_SERIAL_LANTIQ_CONSOLE=y CONFIG_SERIAL_SCCNXP=y CONFIG_SERIAL_SCCNXP_CONSOLE=y CONFIG_SERIAL_SC16IS7XX_CORE=y CONFIG_SERIAL_SC16IS7XX=y CONFIG_SERIAL_SC16IS7XX_I2C=y CONFIG_SERIAL_SC16IS7XX_SPI=y CONFIG_SERIAL_TIMBERDALE=y CONFIG_SERIAL_ALTERA_JTAGUART=y CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE=y CONFIG_SERIAL_ALTERA_JTAGUART_CONSOLE_BYPASS=y CONFIG_SERIAL_ALTERA_UART=y CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4 CONFIG_SERIAL_ALTERA_UART_BAUDRATE=115200 CONFIG_SERIAL_ALTERA_UART_CONSOLE=y CONFIG_SERIAL_PCH_UART=y CONFIG_SERIAL_PCH_UART_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y CONFIG_SERIAL_ARC=y CONFIG_SERIAL_ARC_CONSOLE=y CONFIG_SERIAL_ARC_NR_PORTS=1 CONFIG_SERIAL_RP2=y CONFIG_SERIAL_RP2_NR_UARTS=32 CONFIG_SERIAL_FSL_LPUART=y CONFIG_SERIAL_FSL_LPUART_CONSOLE=y CONFIG_SERIAL_FSL_LINFLEXUART=y CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y CONFIG_SERIAL_CONEXANT_DIGICOLOR=y CONFIG_SERIAL_CONEXANT_DIGICOLOR_CONSOLE=y CONFIG_SERIAL_MEN_Z135=y CONFIG_SERIAL_SPRD=y CONFIG_SERIAL_SPRD_CONSOLE=y CONFIG_SERIAL_LITEUART=y CONFIG_SERIAL_LITEUART_MAX_PORTS=1 CONFIG_SERIAL_LITEUART_CONSOLE=y # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_NONSTANDARD=y CONFIG_MOXA_INTELLIO=y CONFIG_MOXA_SMARTIO=y CONFIG_SYNCLINK_GT=y CONFIG_N_HDLC=y CONFIG_GOLDFISH_TTY=y CONFIG_GOLDFISH_TTY_EARLY_CONSOLE=y CONFIG_IPWIRELESS=y CONFIG_N_GSM=y CONFIG_NOZOMI=y CONFIG_NULL_TTY=y CONFIG_HVC_DRIVER=y CONFIG_RPMSG_TTY=y CONFIG_SERIAL_DEV_BUS=y CONFIG_SERIAL_DEV_CTRL_TTYPORT=y CONFIG_TTY_PRINTK=y CONFIG_TTY_PRINTK_LEVEL=6 CONFIG_PRINTER=y CONFIG_LP_CONSOLE=y CONFIG_PPDEV=y CONFIG_VIRTIO_CONSOLE=y CONFIG_IPMI_HANDLER=y CONFIG_IPMI_DMI_DECODE=y CONFIG_IPMI_PLAT_DATA=y CONFIG_IPMI_PANIC_EVENT=y CONFIG_IPMI_PANIC_STRING=y CONFIG_IPMI_DEVICE_INTERFACE=y CONFIG_IPMI_SI=y CONFIG_IPMI_SSIF=y CONFIG_IPMI_IPMB=y CONFIG_IPMI_WATCHDOG=y CONFIG_IPMI_POWEROFF=y CONFIG_SSIF_IPMI_BMC=y CONFIG_IPMB_DEVICE_INTERFACE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_TIMERIOMEM=y CONFIG_HW_RANDOM_INTEL=y # CONFIG_HW_RANDOM_AMD is not set CONFIG_HW_RANDOM_BA431=y CONFIG_HW_RANDOM_GEODE=y CONFIG_HW_RANDOM_VIA=y CONFIG_HW_RANDOM_VIRTIO=y CONFIG_HW_RANDOM_CCTRNG=y CONFIG_HW_RANDOM_XIPHERA=y CONFIG_DTLK=y CONFIG_APPLICOM=y CONFIG_SONYPI=y CONFIG_MWAVE=y CONFIG_SCx200_GPIO=y CONFIG_PC8736x_GPIO=y CONFIG_NSC_GPIO=y CONFIG_DEVMEM=y CONFIG_NVRAM=y CONFIG_DEVPORT=y CONFIG_HPET=y CONFIG_HPET_MMAP=y CONFIG_HPET_MMAP_DEFAULT=y CONFIG_HANGCHECK_TIMER=y CONFIG_TCG_TPM=y CONFIG_HW_RANDOM_TPM=y CONFIG_TCG_TIS_CORE=y CONFIG_TCG_TIS=y CONFIG_TCG_TIS_SPI=y CONFIG_TCG_TIS_SPI_CR50=y CONFIG_TCG_TIS_I2C=y CONFIG_TCG_TIS_I2C_CR50=y CONFIG_TCG_TIS_I2C_ATMEL=y CONFIG_TCG_TIS_I2C_INFINEON=y CONFIG_TCG_TIS_I2C_NUVOTON=y CONFIG_TCG_NSC=y CONFIG_TCG_ATMEL=y CONFIG_TCG_INFINEON=y CONFIG_TCG_CRB=y CONFIG_TCG_VTPM_PROXY=y CONFIG_TCG_TIS_ST33ZP24=y CONFIG_TCG_TIS_ST33ZP24_I2C=y CONFIG_TCG_TIS_ST33ZP24_SPI=y CONFIG_TELCLOCK=y CONFIG_XILLYBUS_CLASS=y CONFIG_XILLYBUS=y CONFIG_XILLYBUS_PCIE=y CONFIG_XILLYBUS_OF=y CONFIG_XILLYUSB=y # end of Character devices # # I2C support # CONFIG_I2C=y CONFIG_ACPI_I2C_OPREGION=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_COMPAT=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MUX=y # # Multiplexer I2C Chip support # CONFIG_I2C_ARB_GPIO_CHALLENGE=y CONFIG_I2C_MUX_GPIO=y CONFIG_I2C_MUX_GPMUX=y CONFIG_I2C_MUX_LTC4306=y CONFIG_I2C_MUX_PCA9541=y CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_MUX_REG=y CONFIG_I2C_DEMUX_PINCTRL=y CONFIG_I2C_MUX_MLXCPLD=y # end of Multiplexer I2C Chip support CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=y CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCA=y # # I2C Hardware Bus support # # # PC SMBus host controller drivers # CONFIG_I2C_CCGX_UCSI=y CONFIG_I2C_ALI1535=y CONFIG_I2C_ALI1563=y CONFIG_I2C_ALI15X3=y # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_AMD_MP2 is not set CONFIG_I2C_I801=y CONFIG_I2C_ISCH=y CONFIG_I2C_ISMT=y CONFIG_I2C_PIIX4=y CONFIG_I2C_CHT_WC=y CONFIG_I2C_NFORCE2=y CONFIG_I2C_NFORCE2_S4985=y CONFIG_I2C_NVIDIA_GPU=y CONFIG_I2C_SIS5595=y CONFIG_I2C_SIS630=y CONFIG_I2C_SIS96X=y CONFIG_I2C_VIA=y CONFIG_I2C_VIAPRO=y # # ACPI drivers # CONFIG_I2C_SCMI=y # # I2C system bus drivers (mostly embedded / system-on-chip) # CONFIG_I2C_CBUS_GPIO=y CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_DESIGNWARE_SLAVE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_DESIGNWARE_BAYTRAIL=y CONFIG_I2C_DESIGNWARE_PCI=y CONFIG_I2C_EG20T=y CONFIG_I2C_EMEV2=y CONFIG_I2C_GPIO=y CONFIG_I2C_GPIO_FAULT_INJECTOR=y CONFIG_I2C_KEMPLD=y CONFIG_I2C_OCORES=y CONFIG_I2C_PCA_PLATFORM=y CONFIG_I2C_PXA=y CONFIG_I2C_PXA_PCI=y CONFIG_I2C_RK3X=y CONFIG_I2C_SIMTEC=y CONFIG_I2C_XILINX=y # # External I2C/SMBus adapter drivers # CONFIG_I2C_DIOLAN_U2C=y CONFIG_I2C_DLN2=y CONFIG_I2C_CP2615=y CONFIG_I2C_PARPORT=y CONFIG_I2C_PCI1XXXX=y CONFIG_I2C_ROBOTFUZZ_OSIF=y CONFIG_I2C_TAOS_EVM=y CONFIG_I2C_TINY_USB=y CONFIG_I2C_VIPERBOARD=y # # Other I2C/SMBus bus drivers # CONFIG_I2C_PCA_ISA=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SCx200_ACB=y CONFIG_I2C_FSI=y CONFIG_I2C_VIRTIO=y # end of I2C Hardware Bus support CONFIG_I2C_STUB=m CONFIG_I2C_SLAVE=y CONFIG_I2C_SLAVE_EEPROM=y CONFIG_I2C_SLAVE_TESTUNIT=y # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # end of I2C support CONFIG_I3C=y CONFIG_CDNS_I3C_MASTER=y CONFIG_DW_I3C_MASTER=y CONFIG_SVC_I3C_MASTER=y CONFIG_MIPI_I3C_HCI=y CONFIG_SPI=y CONFIG_SPI_DEBUG=y CONFIG_SPI_MASTER=y CONFIG_SPI_MEM=y # # SPI Master Controller Drivers # CONFIG_SPI_ALTERA=y CONFIG_SPI_ALTERA_CORE=y CONFIG_SPI_ALTERA_DFL=y CONFIG_SPI_AXI_SPI_ENGINE=y CONFIG_SPI_BITBANG=y CONFIG_SPI_BUTTERFLY=y CONFIG_SPI_CADENCE=y CONFIG_SPI_CADENCE_QUADSPI=y CONFIG_SPI_CADENCE_XSPI=y CONFIG_SPI_DESIGNWARE=y CONFIG_SPI_DW_DMA=y CONFIG_SPI_DW_PCI=y CONFIG_SPI_DW_MMIO=y CONFIG_SPI_DLN2=y CONFIG_SPI_FSI=y CONFIG_SPI_GPIO=y CONFIG_SPI_INTEL=y CONFIG_SPI_INTEL_PCI=y CONFIG_SPI_INTEL_PLATFORM=y CONFIG_SPI_LM70_LLP=y CONFIG_SPI_FSL_LIB=y CONFIG_SPI_FSL_SPI=y CONFIG_SPI_MICROCHIP_CORE=y CONFIG_SPI_MICROCHIP_CORE_QSPI=y CONFIG_SPI_LANTIQ_SSC=y CONFIG_SPI_OC_TINY=y CONFIG_SPI_PCI1XXXX=y CONFIG_SPI_PXA2XX=y CONFIG_SPI_PXA2XX_PCI=y CONFIG_SPI_SC18IS602=y CONFIG_SPI_SIFIVE=y CONFIG_SPI_SN_F_OSPI=y CONFIG_SPI_MXIC=y CONFIG_SPI_TOPCLIFF_PCH=y CONFIG_SPI_XCOMM=y CONFIG_SPI_XILINX=y CONFIG_SPI_ZYNQMP_GQSPI=y # CONFIG_SPI_AMD is not set # # SPI Multiplexer support # CONFIG_SPI_MUX=y # # SPI Protocol Masters # CONFIG_SPI_SPIDEV=y # CONFIG_SPI_LOOPBACK_TEST is not set CONFIG_SPI_TLE62X0=y CONFIG_SPI_SLAVE=y CONFIG_SPI_SLAVE_TIME=y CONFIG_SPI_SLAVE_SYSTEM_CONTROL=y CONFIG_SPI_DYNAMIC=y CONFIG_SPMI=y CONFIG_SPMI_HISI3670=y CONFIG_HSI=y CONFIG_HSI_BOARDINFO=y # # HSI controllers # # # HSI clients # CONFIG_HSI_CHAR=y CONFIG_PPS=y # CONFIG_PPS_DEBUG is not set # # PPS clients support # CONFIG_PPS_CLIENT_KTIMER=y CONFIG_PPS_CLIENT_LDISC=y CONFIG_PPS_CLIENT_PARPORT=y CONFIG_PPS_CLIENT_GPIO=y # # PPS generators support # # # PTP clock support # CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_DP83640_PHY=y CONFIG_PTP_1588_CLOCK_INES=y CONFIG_PTP_1588_CLOCK_PCH=y CONFIG_PTP_1588_CLOCK_KVM=y CONFIG_PTP_1588_CLOCK_IDT82P33=y CONFIG_PTP_1588_CLOCK_IDTCM=y CONFIG_PTP_1588_CLOCK_VMW=y CONFIG_PTP_1588_CLOCK_OCP=y CONFIG_PTP_DFL_TOD=y # end of PTP clock support CONFIG_PINCTRL=y CONFIG_GENERIC_PINCTRL_GROUPS=y CONFIG_PINMUX=y CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y CONFIG_DEBUG_PINCTRL=y # CONFIG_PINCTRL_AMD is not set CONFIG_PINCTRL_AS3722=y CONFIG_PINCTRL_AXP209=y CONFIG_PINCTRL_CY8C95X0=y CONFIG_PINCTRL_DA9062=y CONFIG_PINCTRL_EQUILIBRIUM=y CONFIG_PINCTRL_MAX77620=y CONFIG_PINCTRL_MCP23S08_I2C=y CONFIG_PINCTRL_MCP23S08_SPI=y CONFIG_PINCTRL_MCP23S08=y CONFIG_PINCTRL_MICROCHIP_SGPIO=y CONFIG_PINCTRL_OCELOT=y CONFIG_PINCTRL_PALMAS=y CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_STMFX=y CONFIG_PINCTRL_SX150X=y CONFIG_PINCTRL_LOCHNAGAR=y CONFIG_PINCTRL_MADERA=y CONFIG_PINCTRL_CS47L15=y CONFIG_PINCTRL_CS47L35=y CONFIG_PINCTRL_CS47L85=y CONFIG_PINCTRL_CS47L90=y CONFIG_PINCTRL_CS47L92=y # # Intel pinctrl drivers # CONFIG_PINCTRL_BAYTRAIL=y CONFIG_PINCTRL_CHERRYVIEW=y CONFIG_PINCTRL_LYNXPOINT=y CONFIG_PINCTRL_MERRIFIELD=y CONFIG_PINCTRL_MOOREFIELD=y CONFIG_PINCTRL_INTEL=y CONFIG_PINCTRL_ALDERLAKE=y CONFIG_PINCTRL_BROXTON=y CONFIG_PINCTRL_CANNONLAKE=y CONFIG_PINCTRL_CEDARFORK=y CONFIG_PINCTRL_DENVERTON=y CONFIG_PINCTRL_ELKHARTLAKE=y CONFIG_PINCTRL_EMMITSBURG=y CONFIG_PINCTRL_GEMINILAKE=y CONFIG_PINCTRL_ICELAKE=y CONFIG_PINCTRL_JASPERLAKE=y CONFIG_PINCTRL_LAKEFIELD=y CONFIG_PINCTRL_LEWISBURG=y CONFIG_PINCTRL_METEORLAKE=y CONFIG_PINCTRL_SUNRISEPOINT=y CONFIG_PINCTRL_TIGERLAKE=y # end of Intel pinctrl drivers # # Renesas pinctrl drivers # # end of Renesas pinctrl drivers CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y CONFIG_GPIO_ACPI=y CONFIG_GPIOLIB_IRQCHIP=y CONFIG_OF_GPIO_MM_GPIOCHIP=y CONFIG_DEBUG_GPIO=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_CDEV=y CONFIG_GPIO_CDEV_V1=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_REGMAP=y CONFIG_GPIO_MAX730X=y CONFIG_GPIO_IDIO_16=y # # Memory mapped GPIO drivers # CONFIG_GPIO_74XX_MMIO=y CONFIG_GPIO_ALTERA=y # CONFIG_GPIO_AMDPT is not set CONFIG_GPIO_CADENCE=y CONFIG_GPIO_DWAPB=y CONFIG_GPIO_EXAR=y CONFIG_GPIO_FTGPIO010=y CONFIG_GPIO_GENERIC_PLATFORM=y CONFIG_GPIO_GRGPIO=y CONFIG_GPIO_HLWD=y CONFIG_GPIO_ICH=y CONFIG_GPIO_LOGICVC=y CONFIG_GPIO_MB86S7X=y CONFIG_GPIO_MENZ127=y CONFIG_GPIO_SIFIVE=y CONFIG_GPIO_SIOX=y CONFIG_GPIO_SYSCON=y CONFIG_GPIO_TANGIER=y CONFIG_GPIO_VX855=y CONFIG_GPIO_WCD934X=y CONFIG_GPIO_XILINX=y CONFIG_GPIO_AMD_FCH=y # end of Memory mapped GPIO drivers # # Port-mapped I/O GPIO drivers # CONFIG_GPIO_I8255=y CONFIG_GPIO_104_DIO_48E=y CONFIG_GPIO_104_IDIO_16=y CONFIG_GPIO_104_IDI_48=y CONFIG_GPIO_F7188X=y CONFIG_GPIO_GPIO_MM=y CONFIG_GPIO_IT87=y CONFIG_GPIO_SCH=y CONFIG_GPIO_SCH311X=y CONFIG_GPIO_WINBOND=y CONFIG_GPIO_WS16C48=y # end of Port-mapped I/O GPIO drivers # # I2C GPIO expanders # CONFIG_GPIO_ADNP=y CONFIG_GPIO_FXL6408=y CONFIG_GPIO_GW_PLD=y CONFIG_GPIO_MAX7300=y CONFIG_GPIO_MAX732X=y CONFIG_GPIO_MAX732X_IRQ=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PCA9570=y CONFIG_GPIO_PCF857X=y CONFIG_GPIO_TPIC2810=y # end of I2C GPIO expanders # # MFD GPIO expanders # CONFIG_GPIO_ADP5520=y CONFIG_GPIO_ARIZONA=y CONFIG_GPIO_BD71815=y CONFIG_GPIO_BD71828=y CONFIG_GPIO_BD9571MWV=y CONFIG_GPIO_CRYSTAL_COVE=y CONFIG_GPIO_CS5535=y CONFIG_GPIO_DA9052=y CONFIG_GPIO_DA9055=y CONFIG_GPIO_DLN2=y CONFIG_GPIO_ELKHARTLAKE=y CONFIG_GPIO_JANZ_TTL=y CONFIG_GPIO_KEMPLD=y CONFIG_GPIO_LP3943=y CONFIG_GPIO_LP873X=y CONFIG_GPIO_LP87565=y CONFIG_GPIO_MADERA=y CONFIG_GPIO_MAX77620=y CONFIG_GPIO_MAX77650=y CONFIG_GPIO_PALMAS=y CONFIG_GPIO_RC5T583=y CONFIG_GPIO_STMPE=y CONFIG_GPIO_TC3589X=y CONFIG_GPIO_TIMBERDALE=y CONFIG_GPIO_TPS65086=y CONFIG_GPIO_TPS65218=y CONFIG_GPIO_TPS6586X=y CONFIG_GPIO_TPS65910=y CONFIG_GPIO_TPS65912=y CONFIG_GPIO_TPS68470=y CONFIG_GPIO_TQMX86=y CONFIG_GPIO_TWL4030=y CONFIG_GPIO_TWL6040=y CONFIG_GPIO_WHISKEY_COVE=y CONFIG_GPIO_WM831X=y CONFIG_GPIO_WM8350=y CONFIG_GPIO_WM8994=y # end of MFD GPIO expanders # # PCI GPIO expanders # # CONFIG_GPIO_AMD8111 is not set CONFIG_GPIO_MERRIFIELD=y CONFIG_GPIO_ML_IOH=y CONFIG_GPIO_PCH=y CONFIG_GPIO_PCI_IDIO_16=y CONFIG_GPIO_PCIE_IDIO_24=y CONFIG_GPIO_RDC321X=y CONFIG_GPIO_SODAVILLE=y # end of PCI GPIO expanders # # SPI GPIO expanders # CONFIG_GPIO_74X164=y CONFIG_GPIO_MAX3191X=y CONFIG_GPIO_MAX7301=y CONFIG_GPIO_MC33880=y CONFIG_GPIO_PISOSR=y CONFIG_GPIO_XRA1403=y CONFIG_GPIO_MOXTET=y # end of SPI GPIO expanders # # USB GPIO expanders # CONFIG_GPIO_VIPERBOARD=y # end of USB GPIO expanders # # Virtual GPIO drivers # CONFIG_GPIO_AGGREGATOR=y CONFIG_GPIO_LATCH=y CONFIG_GPIO_MOCKUP=y CONFIG_GPIO_VIRTIO=y CONFIG_GPIO_SIM=y # end of Virtual GPIO drivers CONFIG_W1=y CONFIG_W1_CON=y # # 1-wire Bus Masters # CONFIG_W1_MASTER_MATROX=y CONFIG_W1_MASTER_DS2490=y CONFIG_W1_MASTER_DS2482=y CONFIG_W1_MASTER_GPIO=y CONFIG_W1_MASTER_SGI=y # end of 1-wire Bus Masters # # 1-wire Slaves # CONFIG_W1_SLAVE_THERM=y CONFIG_W1_SLAVE_SMEM=y CONFIG_W1_SLAVE_DS2405=y CONFIG_W1_SLAVE_DS2408=y CONFIG_W1_SLAVE_DS2408_READBACK=y CONFIG_W1_SLAVE_DS2413=y CONFIG_W1_SLAVE_DS2406=y CONFIG_W1_SLAVE_DS2423=y CONFIG_W1_SLAVE_DS2805=y CONFIG_W1_SLAVE_DS2430=y CONFIG_W1_SLAVE_DS2431=y CONFIG_W1_SLAVE_DS2433=y CONFIG_W1_SLAVE_DS2433_CRC=y CONFIG_W1_SLAVE_DS2438=y CONFIG_W1_SLAVE_DS250X=y CONFIG_W1_SLAVE_DS2780=y CONFIG_W1_SLAVE_DS2781=y CONFIG_W1_SLAVE_DS28E04=y CONFIG_W1_SLAVE_DS28E17=y # end of 1-wire Slaves CONFIG_POWER_RESET=y CONFIG_POWER_RESET_AS3722=y CONFIG_POWER_RESET_ATC260X=y CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_RESET_GPIO_RESTART=y # CONFIG_POWER_RESET_LTC2952 is not set CONFIG_POWER_RESET_MT6323=y CONFIG_POWER_RESET_REGULATOR=y CONFIG_POWER_RESET_RESTART=y CONFIG_POWER_RESET_TPS65086=y CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON_POWEROFF=y CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y CONFIG_NVMEM_REBOOT_MODE=y CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y CONFIG_GENERIC_ADC_BATTERY=y CONFIG_IP5XXX_POWER=y CONFIG_MAX8925_POWER=y CONFIG_WM831X_BACKUP=y CONFIG_WM831X_POWER=y CONFIG_WM8350_POWER=y # CONFIG_TEST_POWER is not set CONFIG_BATTERY_88PM860X=y CONFIG_CHARGER_ADP5061=y CONFIG_BATTERY_ACT8945A=y CONFIG_BATTERY_CPCAP=y CONFIG_BATTERY_CW2015=y CONFIG_BATTERY_DS2760=y CONFIG_BATTERY_DS2780=y CONFIG_BATTERY_DS2781=y CONFIG_BATTERY_DS2782=y CONFIG_BATTERY_QCOM_BATTMGR=y CONFIG_BATTERY_OLPC=y CONFIG_BATTERY_SAMSUNG_SDI=y CONFIG_BATTERY_WM97XX=y CONFIG_BATTERY_SBS=y CONFIG_CHARGER_SBS=y CONFIG_MANAGER_SBS=y CONFIG_BATTERY_BQ27XXX=y CONFIG_BATTERY_BQ27XXX_I2C=y CONFIG_BATTERY_BQ27XXX_HDQ=y CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM=y CONFIG_BATTERY_DA9030=y CONFIG_BATTERY_DA9052=y CONFIG_CHARGER_DA9150=y CONFIG_BATTERY_DA9150=y CONFIG_CHARGER_AXP20X=y CONFIG_BATTERY_AXP20X=y CONFIG_AXP20X_POWER=y CONFIG_AXP288_CHARGER=y CONFIG_AXP288_FUEL_GAUGE=y CONFIG_BATTERY_MAX17040=y CONFIG_BATTERY_MAX17042=y CONFIG_BATTERY_MAX1721X=y CONFIG_BATTERY_TWL4030_MADC=y CONFIG_CHARGER_88PM860X=y CONFIG_CHARGER_PCF50633=y CONFIG_BATTERY_RX51=y CONFIG_CHARGER_ISP1704=y CONFIG_CHARGER_MAX8903=y CONFIG_CHARGER_TWL4030=y CONFIG_CHARGER_LP8727=y CONFIG_CHARGER_LP8788=y CONFIG_CHARGER_GPIO=y CONFIG_CHARGER_MANAGER=y CONFIG_CHARGER_LT3651=y CONFIG_CHARGER_LTC4162L=y CONFIG_CHARGER_MAX14577=y CONFIG_CHARGER_DETECTOR_MAX14656=y CONFIG_CHARGER_MAX77650=y CONFIG_CHARGER_MAX77693=y CONFIG_CHARGER_MAX77976=y CONFIG_CHARGER_MAX8997=y CONFIG_CHARGER_MAX8998=y CONFIG_CHARGER_MP2629=y CONFIG_CHARGER_MT6360=y CONFIG_CHARGER_MT6370=y CONFIG_CHARGER_BQ2415X=y CONFIG_CHARGER_BQ24190=y CONFIG_CHARGER_BQ24257=y CONFIG_CHARGER_BQ24735=y CONFIG_CHARGER_BQ2515X=y CONFIG_CHARGER_BQ25890=y CONFIG_CHARGER_BQ25980=y CONFIG_CHARGER_BQ256XX=y CONFIG_CHARGER_SMB347=y CONFIG_CHARGER_TPS65090=y CONFIG_CHARGER_TPS65217=y CONFIG_BATTERY_GAUGE_LTC2941=y CONFIG_BATTERY_GOLDFISH=y CONFIG_BATTERY_RT5033=y CONFIG_CHARGER_RT9455=y CONFIG_CHARGER_RT9467=y CONFIG_CHARGER_RT9471=y CONFIG_CHARGER_CROS_USBPD=y CONFIG_CHARGER_CROS_PCHG=y CONFIG_CHARGER_UCS1002=y CONFIG_CHARGER_BD99954=y CONFIG_CHARGER_WILCO=y CONFIG_RN5T618_POWER=y CONFIG_BATTERY_SURFACE=y CONFIG_CHARGER_SURFACE=y CONFIG_BATTERY_UG3105=y CONFIG_HWMON=y CONFIG_HWMON_VID=y CONFIG_HWMON_DEBUG_CHIP=y # # Native drivers # CONFIG_SENSORS_ABITUGURU=y CONFIG_SENSORS_ABITUGURU3=y CONFIG_SENSORS_SMPRO=y CONFIG_SENSORS_AD7314=y CONFIG_SENSORS_AD7414=y CONFIG_SENSORS_AD7418=y CONFIG_SENSORS_ADM1025=y CONFIG_SENSORS_ADM1026=y CONFIG_SENSORS_ADM1029=y CONFIG_SENSORS_ADM1031=y CONFIG_SENSORS_ADM1177=y CONFIG_SENSORS_ADM9240=y CONFIG_SENSORS_ADT7X10=y CONFIG_SENSORS_ADT7310=y CONFIG_SENSORS_ADT7410=y CONFIG_SENSORS_ADT7411=y CONFIG_SENSORS_ADT7462=y CONFIG_SENSORS_ADT7470=y CONFIG_SENSORS_ADT7475=y CONFIG_SENSORS_AHT10=y CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=y CONFIG_SENSORS_AS370=y CONFIG_SENSORS_ASC7621=y CONFIG_SENSORS_AXI_FAN_CONTROL=y CONFIG_SENSORS_K8TEMP=y CONFIG_SENSORS_APPLESMC=y CONFIG_SENSORS_ASB100=y CONFIG_SENSORS_ATXP1=y CONFIG_SENSORS_CORSAIR_CPRO=y CONFIG_SENSORS_CORSAIR_PSU=y CONFIG_SENSORS_DRIVETEMP=y CONFIG_SENSORS_DS620=y CONFIG_SENSORS_DS1621=y CONFIG_SENSORS_DELL_SMM=y CONFIG_I8K=y CONFIG_SENSORS_DA9052_ADC=y CONFIG_SENSORS_DA9055=y CONFIG_SENSORS_I5K_AMB=y CONFIG_SENSORS_F71805F=y CONFIG_SENSORS_F71882FG=y CONFIG_SENSORS_F75375S=y CONFIG_SENSORS_GSC=y CONFIG_SENSORS_MC13783_ADC=y CONFIG_SENSORS_FSCHMD=y CONFIG_SENSORS_FTSTEUTATES=y CONFIG_SENSORS_GL518SM=y CONFIG_SENSORS_GL520SM=y CONFIG_SENSORS_G760A=y CONFIG_SENSORS_G762=y CONFIG_SENSORS_GPIO_FAN=y CONFIG_SENSORS_HIH6130=y CONFIG_SENSORS_IBMAEM=y CONFIG_SENSORS_IBMPEX=y CONFIG_SENSORS_IIO_HWMON=y CONFIG_SENSORS_I5500=y CONFIG_SENSORS_CORETEMP=y CONFIG_SENSORS_IT87=y CONFIG_SENSORS_JC42=y CONFIG_SENSORS_POWR1220=y CONFIG_SENSORS_LINEAGE=y CONFIG_SENSORS_LOCHNAGAR=y CONFIG_SENSORS_LTC2945=y CONFIG_SENSORS_LTC2947=y CONFIG_SENSORS_LTC2947_I2C=y CONFIG_SENSORS_LTC2947_SPI=y CONFIG_SENSORS_LTC2990=y CONFIG_SENSORS_LTC2992=y CONFIG_SENSORS_LTC4151=y CONFIG_SENSORS_LTC4215=y CONFIG_SENSORS_LTC4222=y CONFIG_SENSORS_LTC4245=y CONFIG_SENSORS_LTC4260=y CONFIG_SENSORS_LTC4261=y CONFIG_SENSORS_MAX1111=y CONFIG_SENSORS_MAX127=y CONFIG_SENSORS_MAX16065=y CONFIG_SENSORS_MAX1619=y CONFIG_SENSORS_MAX1668=y CONFIG_SENSORS_MAX197=y CONFIG_SENSORS_MAX31722=y CONFIG_SENSORS_MAX31730=y CONFIG_SENSORS_MAX31760=y CONFIG_SENSORS_MAX6620=y CONFIG_SENSORS_MAX6621=y CONFIG_SENSORS_MAX6639=y CONFIG_SENSORS_MAX6650=y CONFIG_SENSORS_MAX6697=y CONFIG_SENSORS_MAX31790=y CONFIG_SENSORS_MC34VR500=y CONFIG_SENSORS_MCP3021=y CONFIG_SENSORS_MLXREG_FAN=y CONFIG_SENSORS_TC654=y CONFIG_SENSORS_TPS23861=y CONFIG_SENSORS_MENF21BMC_HWMON=y CONFIG_SENSORS_MR75203=y CONFIG_SENSORS_ADCXX=y CONFIG_SENSORS_LM63=y CONFIG_SENSORS_LM70=y CONFIG_SENSORS_LM73=y CONFIG_SENSORS_LM75=y CONFIG_SENSORS_LM77=y CONFIG_SENSORS_LM78=y CONFIG_SENSORS_LM80=y CONFIG_SENSORS_LM83=y CONFIG_SENSORS_LM85=y CONFIG_SENSORS_LM87=y CONFIG_SENSORS_LM90=y CONFIG_SENSORS_LM92=y CONFIG_SENSORS_LM93=y CONFIG_SENSORS_LM95234=y CONFIG_SENSORS_LM95241=y CONFIG_SENSORS_LM95245=y CONFIG_SENSORS_PC87360=y CONFIG_SENSORS_PC87427=y CONFIG_SENSORS_NTC_THERMISTOR=y CONFIG_SENSORS_NCT6683=y CONFIG_SENSORS_NCT6775_CORE=y CONFIG_SENSORS_NCT6775=y CONFIG_SENSORS_NCT6775_I2C=y CONFIG_SENSORS_NCT7802=y CONFIG_SENSORS_NCT7904=y CONFIG_SENSORS_NPCM7XX=y CONFIG_SENSORS_NZXT_KRAKEN2=y CONFIG_SENSORS_NZXT_SMART2=y CONFIG_SENSORS_OCC_P8_I2C=y CONFIG_SENSORS_OCC_P9_SBE=y CONFIG_SENSORS_OCC=y CONFIG_SENSORS_OXP=y CONFIG_SENSORS_PCF8591=y CONFIG_SENSORS_PECI_CPUTEMP=y CONFIG_SENSORS_PECI_DIMMTEMP=y CONFIG_SENSORS_PECI=y CONFIG_PMBUS=y CONFIG_SENSORS_PMBUS=y CONFIG_SENSORS_ACBEL_FSG032=y CONFIG_SENSORS_ADM1266=y CONFIG_SENSORS_ADM1275=y CONFIG_SENSORS_BEL_PFE=y CONFIG_SENSORS_BPA_RS600=y CONFIG_SENSORS_DELTA_AHE50DC_FAN=y CONFIG_SENSORS_FSP_3Y=y CONFIG_SENSORS_IBM_CFFPS=y CONFIG_SENSORS_DPS920AB=y CONFIG_SENSORS_INSPUR_IPSPS=y CONFIG_SENSORS_IR35221=y CONFIG_SENSORS_IR36021=y CONFIG_SENSORS_IR38064=y CONFIG_SENSORS_IR38064_REGULATOR=y CONFIG_SENSORS_IRPS5401=y CONFIG_SENSORS_ISL68137=y CONFIG_SENSORS_LM25066=y CONFIG_SENSORS_LM25066_REGULATOR=y CONFIG_SENSORS_LT7182S=y CONFIG_SENSORS_LTC2978=y CONFIG_SENSORS_LTC2978_REGULATOR=y CONFIG_SENSORS_LTC3815=y CONFIG_SENSORS_MAX15301=y CONFIG_SENSORS_MAX16064=y CONFIG_SENSORS_MAX16601=y CONFIG_SENSORS_MAX20730=y CONFIG_SENSORS_MAX20751=y CONFIG_SENSORS_MAX31785=y CONFIG_SENSORS_MAX34440=y CONFIG_SENSORS_MAX8688=y CONFIG_SENSORS_MP2888=y CONFIG_SENSORS_MP2975=y CONFIG_SENSORS_MP5023=y CONFIG_SENSORS_MPQ7932_REGULATOR=y CONFIG_SENSORS_MPQ7932=y CONFIG_SENSORS_PIM4328=y CONFIG_SENSORS_PLI1209BC=y CONFIG_SENSORS_PLI1209BC_REGULATOR=y CONFIG_SENSORS_PM6764TR=y CONFIG_SENSORS_PXE1610=y CONFIG_SENSORS_Q54SJ108A2=y CONFIG_SENSORS_STPDDC60=y CONFIG_SENSORS_TDA38640=y CONFIG_SENSORS_TDA38640_REGULATOR=y CONFIG_SENSORS_TPS40422=y CONFIG_SENSORS_TPS53679=y CONFIG_SENSORS_TPS546D24=y CONFIG_SENSORS_UCD9000=y CONFIG_SENSORS_UCD9200=y CONFIG_SENSORS_XDPE152=y CONFIG_SENSORS_XDPE122=y CONFIG_SENSORS_XDPE122_REGULATOR=y CONFIG_SENSORS_ZL6100=y CONFIG_SENSORS_PWM_FAN=y CONFIG_SENSORS_SBTSI=y CONFIG_SENSORS_SBRMI=y CONFIG_SENSORS_SHT15=y CONFIG_SENSORS_SHT21=y CONFIG_SENSORS_SHT3x=y CONFIG_SENSORS_SHT4x=y CONFIG_SENSORS_SHTC1=y CONFIG_SENSORS_SIS5595=y CONFIG_SENSORS_SY7636A=y CONFIG_SENSORS_DME1737=y CONFIG_SENSORS_EMC1403=y CONFIG_SENSORS_EMC2103=y CONFIG_SENSORS_EMC2305=y CONFIG_SENSORS_EMC6W201=y CONFIG_SENSORS_SMSC47M1=y CONFIG_SENSORS_SMSC47M192=y CONFIG_SENSORS_SMSC47B397=y CONFIG_SENSORS_SCH56XX_COMMON=y CONFIG_SENSORS_SCH5627=y CONFIG_SENSORS_SCH5636=y CONFIG_SENSORS_STTS751=y CONFIG_SENSORS_SMM665=y CONFIG_SENSORS_ADC128D818=y CONFIG_SENSORS_ADS7828=y CONFIG_SENSORS_ADS7871=y CONFIG_SENSORS_AMC6821=y CONFIG_SENSORS_INA209=y CONFIG_SENSORS_INA2XX=y CONFIG_SENSORS_INA238=y CONFIG_SENSORS_INA3221=y CONFIG_SENSORS_TC74=y CONFIG_SENSORS_THMC50=y CONFIG_SENSORS_TMP102=y CONFIG_SENSORS_TMP103=y CONFIG_SENSORS_TMP108=y CONFIG_SENSORS_TMP401=y CONFIG_SENSORS_TMP421=y CONFIG_SENSORS_TMP464=y CONFIG_SENSORS_TMP513=y CONFIG_SENSORS_VIA_CPUTEMP=y CONFIG_SENSORS_VIA686A=y CONFIG_SENSORS_VT1211=y CONFIG_SENSORS_VT8231=y CONFIG_SENSORS_W83773G=y CONFIG_SENSORS_W83781D=y CONFIG_SENSORS_W83791D=y CONFIG_SENSORS_W83792D=y CONFIG_SENSORS_W83793=y CONFIG_SENSORS_W83795=y CONFIG_SENSORS_W83795_FANCTRL=y CONFIG_SENSORS_W83L785TS=y CONFIG_SENSORS_W83L786NG=y CONFIG_SENSORS_W83627HF=y CONFIG_SENSORS_W83627EHF=y CONFIG_SENSORS_WM831X=y CONFIG_SENSORS_WM8350=y CONFIG_SENSORS_XGENE=y CONFIG_SENSORS_INTEL_M10_BMC_HWMON=y # # ACPI drivers # CONFIG_SENSORS_ACPI_POWER=y CONFIG_SENSORS_ATK0110=y CONFIG_SENSORS_ASUS_WMI=y CONFIG_SENSORS_ASUS_EC=y CONFIG_THERMAL=y CONFIG_THERMAL_NETLINK=y CONFIG_THERMAL_STATISTICS=y CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y CONFIG_THERMAL_ACPI=y CONFIG_THERMAL_WRITABLE_TRIPS=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set # CONFIG_THERMAL_DEFAULT_GOV_POWER_ALLOCATOR is not set CONFIG_THERMAL_GOV_FAIR_SHARE=y CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_BANG_BANG=y CONFIG_THERMAL_GOV_USER_SPACE=y CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_CPU_THERMAL=y CONFIG_CPU_FREQ_THERMAL=y CONFIG_CPU_IDLE_THERMAL=y CONFIG_DEVFREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y CONFIG_THERMAL_MMIO=y CONFIG_MAX77620_THERMAL=y CONFIG_DA9062_THERMAL=y # # Intel thermal drivers # CONFIG_INTEL_POWERCLAMP=y CONFIG_X86_THERMAL_VECTOR=y CONFIG_INTEL_TCC=y CONFIG_X86_PKG_TEMP_THERMAL=y CONFIG_INTEL_SOC_DTS_IOSF_CORE=y CONFIG_INTEL_SOC_DTS_THERMAL=y CONFIG_INTEL_QUARK_DTS_THERMAL=y # # ACPI INT340X thermal drivers # # end of ACPI INT340X thermal drivers CONFIG_INTEL_BXT_PMIC_THERMAL=y CONFIG_INTEL_PCH_THERMAL=y CONFIG_INTEL_TCC_COOLING=y CONFIG_INTEL_HFI_THERMAL=y # end of Intel thermal drivers # CONFIG_TI_SOC_THERMAL is not set CONFIG_GENERIC_ADC_THERMAL=y CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y CONFIG_WATCHDOG_NOWAYOUT=y CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED=y CONFIG_WATCHDOG_OPEN_TIMEOUT=0 CONFIG_WATCHDOG_SYSFS=y CONFIG_WATCHDOG_HRTIMER_PRETIMEOUT=y # # Watchdog Pretimeout Governors # CONFIG_WATCHDOG_PRETIMEOUT_GOV=y CONFIG_WATCHDOG_PRETIMEOUT_GOV_SEL=m CONFIG_WATCHDOG_PRETIMEOUT_GOV_NOOP=y CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=y # CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP is not set CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC=y # # Watchdog Device Drivers # CONFIG_SOFT_WATCHDOG=y CONFIG_SOFT_WATCHDOG_PRETIMEOUT=y CONFIG_BD957XMUF_WATCHDOG=y CONFIG_DA9052_WATCHDOG=y CONFIG_DA9055_WATCHDOG=y CONFIG_DA9063_WATCHDOG=y CONFIG_DA9062_WATCHDOG=y CONFIG_GPIO_WATCHDOG=y CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y CONFIG_MENF21BMC_WATCHDOG=y CONFIG_MENZ069_WATCHDOG=y CONFIG_WDAT_WDT=y CONFIG_WM831X_WATCHDOG=y CONFIG_WM8350_WATCHDOG=y CONFIG_XILINX_WATCHDOG=y CONFIG_ZIIRAVE_WATCHDOG=y CONFIG_RAVE_SP_WATCHDOG=y CONFIG_MLX_WDT=y CONFIG_CADENCE_WATCHDOG=y CONFIG_DW_WATCHDOG=y CONFIG_RN5T618_WATCHDOG=y CONFIG_TWL4030_WATCHDOG=y CONFIG_MAX63XX_WATCHDOG=y CONFIG_MAX77620_WATCHDOG=y CONFIG_RETU_WATCHDOG=y CONFIG_STPMIC1_WATCHDOG=y CONFIG_ACQUIRE_WDT=y CONFIG_ADVANTECH_WDT=y CONFIG_ADVANTECH_EC_WDT=y CONFIG_ALIM1535_WDT=y CONFIG_ALIM7101_WDT=y CONFIG_EBC_C384_WDT=y CONFIG_EXAR_WDT=y CONFIG_F71808E_WDT=y # CONFIG_SP5100_TCO is not set # CONFIG_GEODE_WDT is not set CONFIG_SBC_FITPC2_WATCHDOG=y # CONFIG_EUROTECH_WDT is not set CONFIG_IB700_WDT=y CONFIG_IBMASR=y CONFIG_WAFER_WDT=y CONFIG_I6300ESB_WDT=y CONFIG_IE6XX_WDT=y CONFIG_INTEL_MID_WATCHDOG=y CONFIG_ITCO_WDT=y CONFIG_ITCO_VENDOR_SUPPORT=y CONFIG_IT8712F_WDT=y CONFIG_IT87_WDT=y CONFIG_HP_WATCHDOG=y CONFIG_HPWDT_NMI_DECODING=y CONFIG_KEMPLD_WDT=y CONFIG_SC1200_WDT=y CONFIG_SCx200_WDT=y CONFIG_PC87413_WDT=y CONFIG_NV_TCO=y CONFIG_RDC321X_WDT=y CONFIG_60XX_WDT=y CONFIG_SBC8360_WDT=y CONFIG_SBC7240_WDT=y CONFIG_CPU5_WDT=y CONFIG_SMSC_SCH311X_WDT=y CONFIG_SMSC37B787_WDT=y CONFIG_TQMX86_WDT=y CONFIG_VIA_WDT=y CONFIG_W83627HF_WDT=y CONFIG_W83877F_WDT=y CONFIG_W83977F_WDT=y CONFIG_MACHZ_WDT=y CONFIG_SBC_EPX_C3_WATCHDOG=y CONFIG_INTEL_MEI_WDT=y CONFIG_NI903X_WDT=y CONFIG_NIC7018_WDT=y CONFIG_SIEMENS_SIMATIC_IPC_WDT=y CONFIG_MEN_A21_WDT=y # # ISA-based Watchdog Cards # CONFIG_PCWATCHDOG=y CONFIG_MIXCOMWD=y # CONFIG_WDT is not set # # PCI-based Watchdog Cards # CONFIG_PCIPCWATCHDOG=y CONFIG_WDTPCI=y # # USB-based Watchdog Cards # CONFIG_USBPCWATCHDOG=y CONFIG_SSB_POSSIBLE=y CONFIG_SSB=y CONFIG_SSB_SPROM=y CONFIG_SSB_BLOCKIO=y CONFIG_SSB_PCIHOST_POSSIBLE=y CONFIG_SSB_PCIHOST=y CONFIG_SSB_B43_PCI_BRIDGE=y CONFIG_SSB_PCMCIAHOST_POSSIBLE=y CONFIG_SSB_PCMCIAHOST=y CONFIG_SSB_SDIOHOST_POSSIBLE=y CONFIG_SSB_SDIOHOST=y CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y CONFIG_SSB_DRIVER_PCICORE=y CONFIG_SSB_DRIVER_GPIO=y CONFIG_BCMA_POSSIBLE=y CONFIG_BCMA=y CONFIG_BCMA_BLOCKIO=y CONFIG_BCMA_HOST_PCI_POSSIBLE=y CONFIG_BCMA_HOST_PCI=y CONFIG_BCMA_HOST_SOC=y CONFIG_BCMA_DRIVER_PCI=y CONFIG_BCMA_SFLASH=y CONFIG_BCMA_DRIVER_GMAC_CMN=y CONFIG_BCMA_DRIVER_GPIO=y CONFIG_BCMA_DEBUG=y # # Multifunction device drivers # CONFIG_MFD_CORE=y CONFIG_MFD_CS5535=y CONFIG_MFD_ACT8945A=y CONFIG_MFD_AS3711=y CONFIG_MFD_SMPRO=y CONFIG_MFD_AS3722=y CONFIG_PMIC_ADP5520=y CONFIG_MFD_AAT2870_CORE=y CONFIG_MFD_ATMEL_FLEXCOM=y CONFIG_MFD_ATMEL_HLCDC=y CONFIG_MFD_BCM590XX=y CONFIG_MFD_BD9571MWV=y CONFIG_MFD_AXP20X=y CONFIG_MFD_AXP20X_I2C=y CONFIG_MFD_CROS_EC_DEV=y CONFIG_MFD_MADERA=y CONFIG_MFD_MADERA_I2C=y CONFIG_MFD_MADERA_SPI=y CONFIG_MFD_MAX597X=y CONFIG_MFD_CS47L15=y CONFIG_MFD_CS47L35=y CONFIG_MFD_CS47L85=y CONFIG_MFD_CS47L90=y CONFIG_MFD_CS47L92=y CONFIG_PMIC_DA903X=y CONFIG_PMIC_DA9052=y CONFIG_MFD_DA9052_SPI=y CONFIG_MFD_DA9052_I2C=y CONFIG_MFD_DA9055=y CONFIG_MFD_DA9062=y CONFIG_MFD_DA9063=y CONFIG_MFD_DA9150=y CONFIG_MFD_DLN2=y CONFIG_MFD_GATEWORKS_GSC=y CONFIG_MFD_MC13XXX=y CONFIG_MFD_MC13XXX_SPI=y CONFIG_MFD_MC13XXX_I2C=y CONFIG_MFD_MP2629=y CONFIG_MFD_HI6421_PMIC=y CONFIG_MFD_HI6421_SPMI=y CONFIG_MFD_INTEL_QUARK_I2C_GPIO=y CONFIG_LPC_ICH=y CONFIG_LPC_SCH=y CONFIG_INTEL_SOC_PMIC=y CONFIG_INTEL_SOC_PMIC_BXTWC=y CONFIG_INTEL_SOC_PMIC_CHTWC=y CONFIG_INTEL_SOC_PMIC_CHTDC_TI=y CONFIG_INTEL_SOC_PMIC_MRFLD=y CONFIG_MFD_INTEL_LPSS=y CONFIG_MFD_INTEL_LPSS_ACPI=y CONFIG_MFD_INTEL_LPSS_PCI=y CONFIG_MFD_INTEL_PMC_BXT=y CONFIG_MFD_IQS62X=y CONFIG_MFD_JANZ_CMODIO=y CONFIG_MFD_KEMPLD=y CONFIG_MFD_88PM800=y CONFIG_MFD_88PM805=y CONFIG_MFD_88PM860X=y CONFIG_MFD_MAX14577=y CONFIG_MFD_MAX77620=y CONFIG_MFD_MAX77650=y CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX77693=y CONFIG_MFD_MAX77714=y CONFIG_MFD_MAX77843=y CONFIG_MFD_MAX8907=y CONFIG_MFD_MAX8925=y CONFIG_MFD_MAX8997=y CONFIG_MFD_MAX8998=y CONFIG_MFD_MT6360=y CONFIG_MFD_MT6370=y CONFIG_MFD_MT6397=y CONFIG_MFD_MENF21BMC=y CONFIG_MFD_OCELOT=y CONFIG_EZX_PCAP=y CONFIG_MFD_CPCAP=y CONFIG_MFD_VIPERBOARD=y CONFIG_MFD_NTXEC=y CONFIG_MFD_RETU=y CONFIG_MFD_PCF50633=y CONFIG_PCF50633_ADC=y CONFIG_PCF50633_GPIO=y CONFIG_MFD_SY7636A=y CONFIG_MFD_RDC321X=y CONFIG_MFD_RT4831=y CONFIG_MFD_RT5033=y CONFIG_MFD_RT5120=y CONFIG_MFD_RC5T583=y # CONFIG_MFD_RK808 is not set CONFIG_MFD_RN5T618=y CONFIG_MFD_SEC_CORE=y CONFIG_MFD_SI476X_CORE=y CONFIG_MFD_SIMPLE_MFD_I2C=y CONFIG_MFD_SM501=y CONFIG_MFD_SM501_GPIO=y CONFIG_MFD_SKY81452=y CONFIG_MFD_STMPE=y # # STMicroelectronics STMPE Interface Drivers # CONFIG_STMPE_I2C=y CONFIG_STMPE_SPI=y # end of STMicroelectronics STMPE Interface Drivers CONFIG_MFD_STA2X11=y CONFIG_MFD_SYSCON=y CONFIG_MFD_TI_AM335X_TSCADC=y CONFIG_MFD_LP3943=y CONFIG_MFD_LP8788=y CONFIG_MFD_TI_LMU=y CONFIG_MFD_PALMAS=y CONFIG_TPS6105X=y # CONFIG_TPS65010 is not set CONFIG_TPS6507X=y CONFIG_MFD_TPS65086=y CONFIG_MFD_TPS65090=y CONFIG_MFD_TPS65217=y CONFIG_MFD_TI_LP873X=y CONFIG_MFD_TI_LP87565=y CONFIG_MFD_TPS65218=y CONFIG_MFD_TPS65219=y CONFIG_MFD_TPS6586X=y CONFIG_MFD_TPS65910=y CONFIG_MFD_TPS65912=y CONFIG_MFD_TPS65912_I2C=y CONFIG_MFD_TPS65912_SPI=y CONFIG_TWL4030_CORE=y CONFIG_MFD_TWL4030_AUDIO=y CONFIG_TWL6040_CORE=y CONFIG_MFD_WL1273_CORE=y CONFIG_MFD_LM3533=y CONFIG_MFD_TIMBERDALE=y CONFIG_MFD_TC3589X=y CONFIG_MFD_TQMX86=y CONFIG_MFD_VX855=y CONFIG_MFD_LOCHNAGAR=y CONFIG_MFD_ARIZONA=y CONFIG_MFD_ARIZONA_I2C=y CONFIG_MFD_ARIZONA_SPI=y CONFIG_MFD_CS47L24=y CONFIG_MFD_WM5102=y CONFIG_MFD_WM5110=y CONFIG_MFD_WM8997=y CONFIG_MFD_WM8998=y CONFIG_MFD_WM8400=y CONFIG_MFD_WM831X=y CONFIG_MFD_WM831X_I2C=y CONFIG_MFD_WM831X_SPI=y CONFIG_MFD_WM8350=y CONFIG_MFD_WM8350_I2C=y CONFIG_MFD_WM8994=y CONFIG_MFD_ROHM_BD718XX=y CONFIG_MFD_ROHM_BD71828=y CONFIG_MFD_ROHM_BD957XMUF=y CONFIG_MFD_STPMIC1=y CONFIG_MFD_STMFX=y CONFIG_MFD_WCD934X=y CONFIG_MFD_ATC260X=y CONFIG_MFD_ATC260X_I2C=y CONFIG_MFD_QCOM_PM8008=y CONFIG_RAVE_SP_CORE=y CONFIG_MFD_INTEL_M10_BMC_CORE=y CONFIG_MFD_INTEL_M10_BMC_SPI=y CONFIG_MFD_INTEL_M10_BMC_PMCI=y CONFIG_MFD_RSMU_I2C=y CONFIG_MFD_RSMU_SPI=y # end of Multifunction device drivers CONFIG_REGULATOR=y CONFIG_REGULATOR_DEBUG=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_VIRTUAL_CONSUMER=y CONFIG_REGULATOR_USERSPACE_CONSUMER=y CONFIG_REGULATOR_88PG86X=y CONFIG_REGULATOR_88PM800=y CONFIG_REGULATOR_88PM8607=y CONFIG_REGULATOR_ACT8865=y CONFIG_REGULATOR_ACT8945A=y CONFIG_REGULATOR_AD5398=y CONFIG_REGULATOR_AAT2870=y CONFIG_REGULATOR_ARIZONA_LDO1=y CONFIG_REGULATOR_ARIZONA_MICSUPP=y CONFIG_REGULATOR_AS3711=y CONFIG_REGULATOR_AS3722=y CONFIG_REGULATOR_ATC260X=y CONFIG_REGULATOR_AXP20X=y CONFIG_REGULATOR_BCM590XX=y CONFIG_REGULATOR_BD71815=y CONFIG_REGULATOR_BD71828=y CONFIG_REGULATOR_BD718XX=y CONFIG_REGULATOR_BD9571MWV=y CONFIG_REGULATOR_BD957XMUF=y CONFIG_REGULATOR_CPCAP=y CONFIG_REGULATOR_CROS_EC=y CONFIG_REGULATOR_DA9052=y CONFIG_REGULATOR_DA9055=y CONFIG_REGULATOR_DA9062=y CONFIG_REGULATOR_DA9063=y CONFIG_REGULATOR_DA9121=y CONFIG_REGULATOR_DA9210=y CONFIG_REGULATOR_DA9211=y CONFIG_REGULATOR_FAN53555=y CONFIG_REGULATOR_FAN53880=y CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_HI6421=y CONFIG_REGULATOR_HI6421V530=y CONFIG_REGULATOR_HI6421V600=y CONFIG_REGULATOR_ISL9305=y CONFIG_REGULATOR_ISL6271A=y CONFIG_REGULATOR_LM363X=y CONFIG_REGULATOR_LOCHNAGAR=y CONFIG_REGULATOR_LP3971=y CONFIG_REGULATOR_LP3972=y CONFIG_REGULATOR_LP872X=y CONFIG_REGULATOR_LP873X=y CONFIG_REGULATOR_LP8755=y CONFIG_REGULATOR_LP87565=y CONFIG_REGULATOR_LP8788=y CONFIG_REGULATOR_LTC3589=y CONFIG_REGULATOR_LTC3676=y CONFIG_REGULATOR_MAX14577=y CONFIG_REGULATOR_MAX1586=y CONFIG_REGULATOR_MAX597X=y CONFIG_REGULATOR_MAX77620=y CONFIG_REGULATOR_MAX77650=y CONFIG_REGULATOR_MAX8649=y CONFIG_REGULATOR_MAX8660=y CONFIG_REGULATOR_MAX8893=y CONFIG_REGULATOR_MAX8907=y CONFIG_REGULATOR_MAX8925=y CONFIG_REGULATOR_MAX8952=y CONFIG_REGULATOR_MAX8973=y CONFIG_REGULATOR_MAX8997=y CONFIG_REGULATOR_MAX8998=y CONFIG_REGULATOR_MAX20086=y CONFIG_REGULATOR_MAX20411=y CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_MAX77693=y CONFIG_REGULATOR_MAX77802=y CONFIG_REGULATOR_MAX77826=y CONFIG_REGULATOR_MC13XXX_CORE=y CONFIG_REGULATOR_MC13783=y CONFIG_REGULATOR_MC13892=y CONFIG_REGULATOR_MCP16502=y CONFIG_REGULATOR_MP5416=y CONFIG_REGULATOR_MP8859=y CONFIG_REGULATOR_MP886X=y CONFIG_REGULATOR_MPQ7920=y CONFIG_REGULATOR_MT6311=y CONFIG_REGULATOR_MT6315=y CONFIG_REGULATOR_MT6323=y CONFIG_REGULATOR_MT6331=y CONFIG_REGULATOR_MT6332=y CONFIG_REGULATOR_MT6357=y CONFIG_REGULATOR_MT6358=y CONFIG_REGULATOR_MT6359=y CONFIG_REGULATOR_MT6360=y CONFIG_REGULATOR_MT6370=y CONFIG_REGULATOR_MT6397=y CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_PCA9450=y CONFIG_REGULATOR_PCAP=y CONFIG_REGULATOR_PCF50633=y CONFIG_REGULATOR_PF8X00=y CONFIG_REGULATOR_PFUZE100=y CONFIG_REGULATOR_PV88060=y CONFIG_REGULATOR_PV88080=y CONFIG_REGULATOR_PV88090=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_QCOM_SPMI=y CONFIG_REGULATOR_QCOM_USB_VBUS=y CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=y CONFIG_REGULATOR_RC5T583=y CONFIG_REGULATOR_RN5T618=y CONFIG_REGULATOR_ROHM=y CONFIG_REGULATOR_RT4801=y CONFIG_REGULATOR_RT4803=y CONFIG_REGULATOR_RT4831=y CONFIG_REGULATOR_RT5033=y CONFIG_REGULATOR_RT5120=y CONFIG_REGULATOR_RT5190A=y CONFIG_REGULATOR_RT5739=y CONFIG_REGULATOR_RT5759=y CONFIG_REGULATOR_RT6160=y CONFIG_REGULATOR_RT6190=y CONFIG_REGULATOR_RT6245=y CONFIG_REGULATOR_RTQ2134=y CONFIG_REGULATOR_RTMV20=y CONFIG_REGULATOR_RTQ6752=y CONFIG_REGULATOR_S2MPA01=y CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y CONFIG_REGULATOR_SKY81452=y CONFIG_REGULATOR_SLG51000=y CONFIG_REGULATOR_STPMIC1=y CONFIG_REGULATOR_SY7636A=y CONFIG_REGULATOR_SY8106A=y CONFIG_REGULATOR_SY8824X=y CONFIG_REGULATOR_SY8827N=y CONFIG_REGULATOR_TPS51632=y CONFIG_REGULATOR_TPS6105X=y CONFIG_REGULATOR_TPS62360=y CONFIG_REGULATOR_TPS6286X=y CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y CONFIG_REGULATOR_TPS65086=y CONFIG_REGULATOR_TPS65090=y CONFIG_REGULATOR_TPS65132=y CONFIG_REGULATOR_TPS65217=y CONFIG_REGULATOR_TPS65218=y CONFIG_REGULATOR_TPS65219=y CONFIG_REGULATOR_TPS6524X=y CONFIG_REGULATOR_TPS6586X=y CONFIG_REGULATOR_TPS65910=y CONFIG_REGULATOR_TPS65912=y CONFIG_REGULATOR_TPS68470=y CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_VCTRL=y CONFIG_REGULATOR_WM831X=y CONFIG_REGULATOR_WM8350=y CONFIG_REGULATOR_WM8400=y CONFIG_REGULATOR_WM8994=y CONFIG_REGULATOR_QCOM_LABIBB=y CONFIG_RC_CORE=y CONFIG_BPF_LIRC_MODE2=y CONFIG_LIRC=y CONFIG_RC_MAP=y CONFIG_RC_DECODERS=y CONFIG_IR_IMON_DECODER=y CONFIG_IR_JVC_DECODER=y CONFIG_IR_MCE_KBD_DECODER=y CONFIG_IR_NEC_DECODER=y CONFIG_IR_RC5_DECODER=y CONFIG_IR_RC6_DECODER=y CONFIG_IR_RCMM_DECODER=y CONFIG_IR_SANYO_DECODER=y CONFIG_IR_SHARP_DECODER=y CONFIG_IR_SONY_DECODER=y CONFIG_IR_XMP_DECODER=y CONFIG_RC_DEVICES=y CONFIG_IR_ENE=y CONFIG_IR_FINTEK=y CONFIG_IR_GPIO_CIR=y CONFIG_IR_GPIO_TX=y CONFIG_IR_HIX5HD2=y CONFIG_IR_IGORPLUGUSB=y CONFIG_IR_IGUANA=y CONFIG_IR_IMON=y CONFIG_IR_IMON_RAW=y CONFIG_IR_ITE_CIR=y CONFIG_IR_MCEUSB=y CONFIG_IR_NUVOTON=y CONFIG_IR_PWM_TX=y CONFIG_IR_REDRAT3=y CONFIG_IR_SERIAL=y CONFIG_IR_SERIAL_TRANSMITTER=y CONFIG_IR_SPI=y CONFIG_IR_STREAMZAP=y CONFIG_IR_TOY=y CONFIG_IR_TTUSBIR=y CONFIG_IR_WINBOND_CIR=y CONFIG_RC_ATI_REMOTE=y CONFIG_RC_LOOPBACK=y CONFIG_RC_XBOX_DVD=y CONFIG_CEC_CORE=y CONFIG_CEC_NOTIFIER=y # # CEC support # CONFIG_MEDIA_CEC_RC=y CONFIG_MEDIA_CEC_SUPPORT=y CONFIG_CEC_CH7322=y CONFIG_CEC_CROS_EC=y CONFIG_CEC_SECO=y CONFIG_CEC_SECO_RC=y CONFIG_USB_PULSE8_CEC=y CONFIG_USB_RAINSHADOW_CEC=y # end of CEC support CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_SUPPORT_FILTER=y CONFIG_MEDIA_SUBDRV_AUTOSELECT=y # # Media device types # CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y CONFIG_MEDIA_RADIO_SUPPORT=y CONFIG_MEDIA_SDR_SUPPORT=y CONFIG_MEDIA_PLATFORM_SUPPORT=y # CONFIG_MEDIA_TEST_SUPPORT is not set # end of Media device types CONFIG_VIDEO_DEV=y CONFIG_MEDIA_CONTROLLER=y CONFIG_DVB_CORE=y # # Video4Linux options # CONFIG_VIDEO_V4L2_I2C=y CONFIG_VIDEO_V4L2_SUBDEV_API=y CONFIG_VIDEO_ADV_DEBUG=y CONFIG_VIDEO_FIXED_MINOR_RANGES=y CONFIG_VIDEO_TUNER=y CONFIG_V4L2_MEM2MEM_DEV=y CONFIG_V4L2_FLASH_LED_CLASS=y CONFIG_V4L2_FWNODE=y CONFIG_V4L2_ASYNC=y CONFIG_VIDEOBUF_GEN=y CONFIG_VIDEOBUF_DMA_SG=y # end of Video4Linux options # # Media controller options # CONFIG_MEDIA_CONTROLLER_DVB=y # end of Media controller options # # Digital TV options # CONFIG_DVB_MMAP=y CONFIG_DVB_NET=y CONFIG_DVB_MAX_ADAPTERS=16 CONFIG_DVB_DYNAMIC_MINORS=y CONFIG_DVB_DEMUX_SECTION_LOSS_LOG=y CONFIG_DVB_ULE_DEBUG=y # end of Digital TV options # # Media drivers # # # Drivers filtered as selected at 'Filter media drivers' # # # Media drivers # CONFIG_MEDIA_USB_SUPPORT=y # # Webcam devices # CONFIG_USB_GSPCA=y CONFIG_USB_GSPCA_BENQ=y CONFIG_USB_GSPCA_CONEX=y CONFIG_USB_GSPCA_CPIA1=y CONFIG_USB_GSPCA_DTCS033=y CONFIG_USB_GSPCA_ETOMS=y CONFIG_USB_GSPCA_FINEPIX=y CONFIG_USB_GSPCA_JEILINJ=y CONFIG_USB_GSPCA_JL2005BCD=y CONFIG_USB_GSPCA_KINECT=y CONFIG_USB_GSPCA_KONICA=y CONFIG_USB_GSPCA_MARS=y CONFIG_USB_GSPCA_MR97310A=y CONFIG_USB_GSPCA_NW80X=y CONFIG_USB_GSPCA_OV519=y CONFIG_USB_GSPCA_OV534=y CONFIG_USB_GSPCA_OV534_9=y CONFIG_USB_GSPCA_PAC207=y CONFIG_USB_GSPCA_PAC7302=y CONFIG_USB_GSPCA_PAC7311=y CONFIG_USB_GSPCA_SE401=y CONFIG_USB_GSPCA_SN9C2028=y CONFIG_USB_GSPCA_SN9C20X=y CONFIG_USB_GSPCA_SONIXB=y CONFIG_USB_GSPCA_SONIXJ=y CONFIG_USB_GSPCA_SPCA1528=y CONFIG_USB_GSPCA_SPCA500=y CONFIG_USB_GSPCA_SPCA501=y CONFIG_USB_GSPCA_SPCA505=y CONFIG_USB_GSPCA_SPCA506=y CONFIG_USB_GSPCA_SPCA508=y CONFIG_USB_GSPCA_SPCA561=y CONFIG_USB_GSPCA_SQ905=y CONFIG_USB_GSPCA_SQ905C=y CONFIG_USB_GSPCA_SQ930X=y CONFIG_USB_GSPCA_STK014=y CONFIG_USB_GSPCA_STK1135=y CONFIG_USB_GSPCA_STV0680=y CONFIG_USB_GSPCA_SUNPLUS=y CONFIG_USB_GSPCA_T613=y CONFIG_USB_GSPCA_TOPRO=y CONFIG_USB_GSPCA_TOUPTEK=y CONFIG_USB_GSPCA_TV8532=y CONFIG_USB_GSPCA_VC032X=y CONFIG_USB_GSPCA_VICAM=y CONFIG_USB_GSPCA_XIRLINK_CIT=y CONFIG_USB_GSPCA_ZC3XX=y CONFIG_USB_GL860=y CONFIG_USB_M5602=y CONFIG_USB_STV06XX=y CONFIG_USB_PWC=y CONFIG_USB_PWC_DEBUG=y CONFIG_USB_PWC_INPUT_EVDEV=y CONFIG_USB_S2255=y CONFIG_VIDEO_USBTV=y CONFIG_USB_VIDEO_CLASS=y CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y # # Analog TV USB devices # CONFIG_VIDEO_GO7007=y CONFIG_VIDEO_GO7007_USB=y CONFIG_VIDEO_GO7007_LOADER=y CONFIG_VIDEO_GO7007_USB_S2250_BOARD=y CONFIG_VIDEO_HDPVR=y CONFIG_VIDEO_PVRUSB2=y CONFIG_VIDEO_PVRUSB2_SYSFS=y CONFIG_VIDEO_PVRUSB2_DVB=y CONFIG_VIDEO_PVRUSB2_DEBUGIFC=y CONFIG_VIDEO_STK1160_COMMON=y CONFIG_VIDEO_STK1160=y # # Analog/digital TV USB devices # CONFIG_VIDEO_AU0828=y CONFIG_VIDEO_AU0828_V4L2=y CONFIG_VIDEO_AU0828_RC=y CONFIG_VIDEO_CX231XX=y CONFIG_VIDEO_CX231XX_RC=y CONFIG_VIDEO_CX231XX_ALSA=y CONFIG_VIDEO_CX231XX_DVB=y # # Digital TV USB devices # CONFIG_DVB_AS102=y CONFIG_DVB_B2C2_FLEXCOP_USB=y CONFIG_DVB_B2C2_FLEXCOP_USB_DEBUG=y CONFIG_DVB_USB_V2=y CONFIG_DVB_USB_AF9015=y CONFIG_DVB_USB_AF9035=y CONFIG_DVB_USB_ANYSEE=y CONFIG_DVB_USB_AU6610=y CONFIG_DVB_USB_AZ6007=y CONFIG_DVB_USB_CE6230=y CONFIG_DVB_USB_DVBSKY=y CONFIG_DVB_USB_EC168=y CONFIG_DVB_USB_GL861=y CONFIG_DVB_USB_LME2510=y CONFIG_DVB_USB_MXL111SF=y CONFIG_DVB_USB_RTL28XXU=y CONFIG_DVB_USB_ZD1301=y CONFIG_DVB_USB=y CONFIG_DVB_USB_DEBUG=y CONFIG_DVB_USB_A800=y CONFIG_DVB_USB_AF9005=y CONFIG_DVB_USB_AF9005_REMOTE=y CONFIG_DVB_USB_AZ6027=y CONFIG_DVB_USB_CINERGY_T2=y CONFIG_DVB_USB_CXUSB=y CONFIG_DVB_USB_CXUSB_ANALOG=y CONFIG_DVB_USB_DIB0700=y CONFIG_DVB_USB_DIB3000MC=y CONFIG_DVB_USB_DIBUSB_MB=y CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y CONFIG_DVB_USB_DIBUSB_MC=y CONFIG_DVB_USB_DIGITV=y CONFIG_DVB_USB_DTT200U=y CONFIG_DVB_USB_DTV5100=y CONFIG_DVB_USB_DW2102=y CONFIG_DVB_USB_GP8PSK=y CONFIG_DVB_USB_M920X=y CONFIG_DVB_USB_NOVA_T_USB2=y CONFIG_DVB_USB_OPERA1=y CONFIG_DVB_USB_PCTV452E=y CONFIG_DVB_USB_TECHNISAT_USB2=y CONFIG_DVB_USB_TTUSB2=y CONFIG_DVB_USB_UMT_010=y CONFIG_DVB_USB_VP702X=y CONFIG_DVB_USB_VP7045=y CONFIG_SMS_USB_DRV=y CONFIG_DVB_TTUSB_BUDGET=y CONFIG_DVB_TTUSB_DEC=y # # Webcam, TV (analog/digital) USB devices # CONFIG_VIDEO_EM28XX=y CONFIG_VIDEO_EM28XX_V4L2=y CONFIG_VIDEO_EM28XX_ALSA=y CONFIG_VIDEO_EM28XX_DVB=y CONFIG_VIDEO_EM28XX_RC=y # # Software defined radio USB devices # CONFIG_USB_AIRSPY=y CONFIG_USB_HACKRF=y CONFIG_USB_MSI2500=y CONFIG_MEDIA_PCI_SUPPORT=y # # Media capture support # CONFIG_VIDEO_SOLO6X10=y CONFIG_STA2X11_VIP=y CONFIG_VIDEO_TW5864=y CONFIG_VIDEO_TW68=y CONFIG_VIDEO_TW686X=y CONFIG_VIDEO_ZORAN=y CONFIG_VIDEO_ZORAN_DC30=y CONFIG_VIDEO_ZORAN_ZR36060=y CONFIG_VIDEO_ZORAN_BUZ=y CONFIG_VIDEO_ZORAN_DC10=y CONFIG_VIDEO_ZORAN_LML33=y CONFIG_VIDEO_ZORAN_LML33R10=y CONFIG_VIDEO_ZORAN_AVS6EYES=y # # Media capture/analog TV support # CONFIG_VIDEO_DT3155=y CONFIG_VIDEO_IVTV=y CONFIG_VIDEO_IVTV_ALSA=y CONFIG_VIDEO_FB_IVTV=y CONFIG_VIDEO_FB_IVTV_FORCE_PAT=y CONFIG_VIDEO_HEXIUM_GEMINI=y CONFIG_VIDEO_HEXIUM_ORION=y CONFIG_VIDEO_MXB=y # # Media capture/analog/hybrid TV support # CONFIG_VIDEO_BT848=y CONFIG_DVB_BT8XX=y CONFIG_VIDEO_CX18=y CONFIG_VIDEO_CX18_ALSA=y CONFIG_VIDEO_CX23885=y CONFIG_MEDIA_ALTERA_CI=y CONFIG_VIDEO_CX25821=y CONFIG_VIDEO_CX25821_ALSA=y CONFIG_VIDEO_CX88=y CONFIG_VIDEO_CX88_ALSA=y CONFIG_VIDEO_CX88_BLACKBIRD=y CONFIG_VIDEO_CX88_DVB=y CONFIG_VIDEO_CX88_ENABLE_VP3054=y CONFIG_VIDEO_CX88_VP3054=y CONFIG_VIDEO_CX88_MPEG=y CONFIG_VIDEO_SAA7134=y CONFIG_VIDEO_SAA7134_ALSA=y CONFIG_VIDEO_SAA7134_RC=y CONFIG_VIDEO_SAA7134_DVB=y CONFIG_VIDEO_SAA7134_GO7007=y CONFIG_VIDEO_SAA7164=y # # Media digital TV PCI Adapters # CONFIG_DVB_B2C2_FLEXCOP_PCI=y CONFIG_DVB_B2C2_FLEXCOP_PCI_DEBUG=y CONFIG_DVB_DDBRIDGE=y CONFIG_DVB_DDBRIDGE_MSIENABLE=y CONFIG_DVB_DM1105=y CONFIG_MANTIS_CORE=y CONFIG_DVB_MANTIS=y CONFIG_DVB_HOPPER=y CONFIG_DVB_NETUP_UNIDVB=y CONFIG_DVB_NGENE=y CONFIG_DVB_PLUTO2=y CONFIG_DVB_PT1=y CONFIG_DVB_PT3=y CONFIG_DVB_SMIPCIE=y CONFIG_DVB_BUDGET_CORE=y CONFIG_DVB_BUDGET=y CONFIG_DVB_BUDGET_CI=y CONFIG_DVB_BUDGET_AV=y CONFIG_VIDEO_IPU3_CIO2=y # CONFIG_CIO2_BRIDGE is not set CONFIG_RADIO_ADAPTERS=y CONFIG_RADIO_MAXIRADIO=y CONFIG_RADIO_SAA7706H=y CONFIG_RADIO_SHARK=y CONFIG_RADIO_SHARK2=y CONFIG_RADIO_SI4713=y CONFIG_RADIO_SI476X=y CONFIG_RADIO_TEA575X=y CONFIG_RADIO_TEA5764=y CONFIG_RADIO_TEA5764_XTAL=y CONFIG_RADIO_TEF6862=y CONFIG_RADIO_TIMBERDALE=y CONFIG_RADIO_WL1273=y CONFIG_USB_DSBR=y CONFIG_USB_KEENE=y CONFIG_USB_MA901=y CONFIG_USB_MR800=y CONFIG_USB_RAREMONO=y CONFIG_RADIO_SI470X=y CONFIG_USB_SI470X=y CONFIG_I2C_SI470X=y CONFIG_USB_SI4713=y CONFIG_PLATFORM_SI4713=y CONFIG_I2C_SI4713=y CONFIG_RADIO_WL128X=y CONFIG_V4L_RADIO_ISA_DRIVERS=y CONFIG_RADIO_AZTECH=y CONFIG_RADIO_AZTECH_PORT=350 CONFIG_RADIO_CADET=y CONFIG_RADIO_GEMTEK=y CONFIG_RADIO_GEMTEK_PORT=34c CONFIG_RADIO_GEMTEK_PROBE=y CONFIG_RADIO_ISA=y CONFIG_RADIO_MIROPCM20=y CONFIG_RADIO_RTRACK=y CONFIG_RADIO_RTRACK2=y CONFIG_RADIO_RTRACK2_PORT=30c CONFIG_RADIO_RTRACK_PORT=30f CONFIG_RADIO_SF16FMI=y CONFIG_RADIO_SF16FMR2=y CONFIG_RADIO_TERRATEC=y CONFIG_RADIO_TRUST=y CONFIG_RADIO_TRUST_PORT=350 CONFIG_RADIO_TYPHOON=y CONFIG_RADIO_TYPHOON_MUTEFREQ=87500 CONFIG_RADIO_TYPHOON_PORT=316 CONFIG_RADIO_ZOLTRIX=y CONFIG_RADIO_ZOLTRIX_PORT=20c CONFIG_MEDIA_PLATFORM_DRIVERS=y CONFIG_V4L_PLATFORM_DRIVERS=y CONFIG_SDR_PLATFORM_DRIVERS=y CONFIG_DVB_PLATFORM_DRIVERS=y CONFIG_V4L_MEM2MEM_DRIVERS=y CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y CONFIG_VIDEO_MUX=y # # Allegro DVT media platform drivers # # # Amlogic media platform drivers # # # Amphion drivers # # # Aspeed media platform drivers # # # Atmel media platform drivers # # # Cadence media platform drivers # CONFIG_VIDEO_CADENCE_CSI2RX=y CONFIG_VIDEO_CADENCE_CSI2TX=y # # Chips&Media media platform drivers # # # Intel media platform drivers # # # Marvell media platform drivers # CONFIG_VIDEO_CAFE_CCIC=y # # Mediatek media platform drivers # # # Microchip Technology, Inc. media platform drivers # # # NVidia media platform drivers # # # NXP media platform drivers # # # Qualcomm media platform drivers # # # Renesas media platform drivers # # # Rockchip media platform drivers # # # Samsung media platform drivers # # # STMicroelectronics media platform drivers # # # Sunxi media platform drivers # # # Texas Instruments drivers # # # Verisilicon media platform drivers # # # VIA media platform drivers # CONFIG_VIDEO_VIA_CAMERA=y # # Xilinx media platform drivers # CONFIG_VIDEO_XILINX=y CONFIG_VIDEO_XILINX_CSI2RXSS=y CONFIG_VIDEO_XILINX_TPG=y CONFIG_VIDEO_XILINX_VTC=y # # MMC/SDIO DVB adapters # CONFIG_SMS_SDIO_DRV=y # # FireWire (IEEE 1394) Adapters # CONFIG_DVB_FIREDTV=y CONFIG_DVB_FIREDTV_INPUT=y CONFIG_MEDIA_COMMON_OPTIONS=y # # common driver options # CONFIG_CYPRESS_FIRMWARE=y CONFIG_TTPCI_EEPROM=y CONFIG_UVC_COMMON=y CONFIG_VIDEO_CX2341X=y CONFIG_VIDEO_TVEEPROM=y CONFIG_DVB_B2C2_FLEXCOP=y CONFIG_DVB_B2C2_FLEXCOP_DEBUG=y CONFIG_VIDEO_SAA7146=y CONFIG_VIDEO_SAA7146_VV=y CONFIG_SMS_SIANO_MDTV=y CONFIG_SMS_SIANO_RC=y CONFIG_SMS_SIANO_DEBUGFS=y CONFIG_VIDEOBUF2_CORE=y CONFIG_VIDEOBUF2_V4L2=y CONFIG_VIDEOBUF2_MEMOPS=y CONFIG_VIDEOBUF2_DMA_CONTIG=y CONFIG_VIDEOBUF2_VMALLOC=y CONFIG_VIDEOBUF2_DMA_SG=y CONFIG_VIDEOBUF2_DVB=y # end of Media drivers # # Media ancillary drivers # CONFIG_MEDIA_ATTACH=y # # IR I2C driver auto-selected by 'Autoselect ancillary drivers' # CONFIG_VIDEO_IR_I2C=y # # Camera sensor devices # CONFIG_VIDEO_APTINA_PLL=y CONFIG_VIDEO_CCS_PLL=y CONFIG_VIDEO_AR0521=y CONFIG_VIDEO_HI556=y CONFIG_VIDEO_HI846=y CONFIG_VIDEO_HI847=y CONFIG_VIDEO_IMX208=y CONFIG_VIDEO_IMX214=y CONFIG_VIDEO_IMX219=y CONFIG_VIDEO_IMX258=y CONFIG_VIDEO_IMX274=y CONFIG_VIDEO_IMX290=y CONFIG_VIDEO_IMX296=y CONFIG_VIDEO_IMX319=y CONFIG_VIDEO_IMX334=y CONFIG_VIDEO_IMX335=y CONFIG_VIDEO_IMX355=y CONFIG_VIDEO_IMX412=y CONFIG_VIDEO_IMX415=y CONFIG_VIDEO_MAX9271_LIB=y CONFIG_VIDEO_MT9M001=y CONFIG_VIDEO_MT9M111=y CONFIG_VIDEO_MT9P031=y CONFIG_VIDEO_MT9T112=y CONFIG_VIDEO_MT9V011=y CONFIG_VIDEO_MT9V032=y CONFIG_VIDEO_MT9V111=y CONFIG_VIDEO_OG01A1B=y CONFIG_VIDEO_OV02A10=y CONFIG_VIDEO_OV08D10=y CONFIG_VIDEO_OV08X40=y CONFIG_VIDEO_OV13858=y CONFIG_VIDEO_OV13B10=y CONFIG_VIDEO_OV2640=y CONFIG_VIDEO_OV2659=y CONFIG_VIDEO_OV2680=y CONFIG_VIDEO_OV2685=y CONFIG_VIDEO_OV2740=y CONFIG_VIDEO_OV4689=y CONFIG_VIDEO_OV5640=y CONFIG_VIDEO_OV5645=y CONFIG_VIDEO_OV5647=y CONFIG_VIDEO_OV5648=y CONFIG_VIDEO_OV5670=y CONFIG_VIDEO_OV5675=y CONFIG_VIDEO_OV5693=y CONFIG_VIDEO_OV5695=y CONFIG_VIDEO_OV6650=y CONFIG_VIDEO_OV7251=y CONFIG_VIDEO_OV7640=y CONFIG_VIDEO_OV7670=y CONFIG_VIDEO_OV772X=y CONFIG_VIDEO_OV7740=y CONFIG_VIDEO_OV8856=y CONFIG_VIDEO_OV8858=y CONFIG_VIDEO_OV8865=y CONFIG_VIDEO_OV9282=y CONFIG_VIDEO_OV9640=y CONFIG_VIDEO_OV9650=y CONFIG_VIDEO_OV9734=y CONFIG_VIDEO_RDACM20=y CONFIG_VIDEO_RDACM21=y CONFIG_VIDEO_RJ54N1=y CONFIG_VIDEO_S5C73M3=y CONFIG_VIDEO_S5K5BAF=y CONFIG_VIDEO_S5K6A3=y CONFIG_VIDEO_ST_VGXY61=y CONFIG_VIDEO_CCS=y CONFIG_VIDEO_ET8EK8=y # end of Camera sensor devices # # Lens drivers # CONFIG_VIDEO_AD5820=y CONFIG_VIDEO_AK7375=y CONFIG_VIDEO_DW9714=y CONFIG_VIDEO_DW9768=y CONFIG_VIDEO_DW9807_VCM=y # end of Lens drivers # # Flash devices # CONFIG_VIDEO_ADP1653=y CONFIG_VIDEO_LM3560=y CONFIG_VIDEO_LM3646=y # end of Flash devices # # Audio decoders, processors and mixers # CONFIG_VIDEO_CS3308=y CONFIG_VIDEO_CS5345=y CONFIG_VIDEO_CS53L32A=y CONFIG_VIDEO_MSP3400=y CONFIG_VIDEO_SONY_BTF_MPX=y CONFIG_VIDEO_TDA1997X=y CONFIG_VIDEO_TDA7432=y CONFIG_VIDEO_TDA9840=y CONFIG_VIDEO_TEA6415C=y CONFIG_VIDEO_TEA6420=y CONFIG_VIDEO_TLV320AIC23B=y CONFIG_VIDEO_TVAUDIO=y CONFIG_VIDEO_UDA1342=y CONFIG_VIDEO_VP27SMPX=y CONFIG_VIDEO_WM8739=y CONFIG_VIDEO_WM8775=y # end of Audio decoders, processors and mixers # # RDS decoders # CONFIG_VIDEO_SAA6588=y # end of RDS decoders # # Video decoders # CONFIG_VIDEO_ADV7180=y CONFIG_VIDEO_ADV7183=y CONFIG_VIDEO_ADV748X=y CONFIG_VIDEO_ADV7604=y CONFIG_VIDEO_ADV7604_CEC=y CONFIG_VIDEO_ADV7842=y CONFIG_VIDEO_ADV7842_CEC=y CONFIG_VIDEO_BT819=y CONFIG_VIDEO_BT856=y CONFIG_VIDEO_BT866=y CONFIG_VIDEO_ISL7998X=y CONFIG_VIDEO_KS0127=y CONFIG_VIDEO_MAX9286=y CONFIG_VIDEO_ML86V7667=y CONFIG_VIDEO_SAA7110=y CONFIG_VIDEO_SAA711X=y CONFIG_VIDEO_TC358743=y CONFIG_VIDEO_TC358743_CEC=y CONFIG_VIDEO_TC358746=y CONFIG_VIDEO_TVP514X=y CONFIG_VIDEO_TVP5150=y CONFIG_VIDEO_TVP7002=y CONFIG_VIDEO_TW2804=y CONFIG_VIDEO_TW9903=y CONFIG_VIDEO_TW9906=y CONFIG_VIDEO_TW9910=y CONFIG_VIDEO_VPX3220=y # # Video and audio decoders # CONFIG_VIDEO_SAA717X=y CONFIG_VIDEO_CX25840=y # end of Video decoders # # Video encoders # CONFIG_VIDEO_ADV7170=y CONFIG_VIDEO_ADV7175=y CONFIG_VIDEO_ADV7343=y CONFIG_VIDEO_ADV7393=y CONFIG_VIDEO_AK881X=y CONFIG_VIDEO_SAA7127=y CONFIG_VIDEO_SAA7185=y CONFIG_VIDEO_THS8200=y # end of Video encoders # # Video improvement chips # CONFIG_VIDEO_UPD64031A=y CONFIG_VIDEO_UPD64083=y # end of Video improvement chips # # Audio/Video compression chips # CONFIG_VIDEO_SAA6752HS=y # end of Audio/Video compression chips # # SDR tuner chips # CONFIG_SDR_MAX2175=y # end of SDR tuner chips # # Miscellaneous helper chips # CONFIG_VIDEO_I2C=y CONFIG_VIDEO_M52790=y CONFIG_VIDEO_ST_MIPID02=y CONFIG_VIDEO_THS7303=y # end of Miscellaneous helper chips # # Media SPI Adapters # CONFIG_CXD2880_SPI_DRV=y CONFIG_VIDEO_GS1662=y # end of Media SPI Adapters CONFIG_MEDIA_TUNER=y # # Customize TV tuners # CONFIG_MEDIA_TUNER_E4000=y CONFIG_MEDIA_TUNER_FC0011=y CONFIG_MEDIA_TUNER_FC0012=y CONFIG_MEDIA_TUNER_FC0013=y CONFIG_MEDIA_TUNER_FC2580=y CONFIG_MEDIA_TUNER_IT913X=y CONFIG_MEDIA_TUNER_M88RS6000T=y CONFIG_MEDIA_TUNER_MAX2165=y CONFIG_MEDIA_TUNER_MC44S803=y CONFIG_MEDIA_TUNER_MSI001=y CONFIG_MEDIA_TUNER_MT2060=y CONFIG_MEDIA_TUNER_MT2063=y CONFIG_MEDIA_TUNER_MT20XX=y CONFIG_MEDIA_TUNER_MT2131=y CONFIG_MEDIA_TUNER_MT2266=y CONFIG_MEDIA_TUNER_MXL301RF=y CONFIG_MEDIA_TUNER_MXL5005S=y CONFIG_MEDIA_TUNER_MXL5007T=y CONFIG_MEDIA_TUNER_QM1D1B0004=y CONFIG_MEDIA_TUNER_QM1D1C0042=y CONFIG_MEDIA_TUNER_QT1010=y CONFIG_MEDIA_TUNER_R820T=y CONFIG_MEDIA_TUNER_SI2157=y CONFIG_MEDIA_TUNER_SIMPLE=y CONFIG_MEDIA_TUNER_TDA18212=y CONFIG_MEDIA_TUNER_TDA18218=y CONFIG_MEDIA_TUNER_TDA18250=y CONFIG_MEDIA_TUNER_TDA18271=y CONFIG_MEDIA_TUNER_TDA827X=y CONFIG_MEDIA_TUNER_TDA8290=y CONFIG_MEDIA_TUNER_TDA9887=y CONFIG_MEDIA_TUNER_TEA5761=y CONFIG_MEDIA_TUNER_TEA5767=y CONFIG_MEDIA_TUNER_TUA9001=y CONFIG_MEDIA_TUNER_XC2028=y CONFIG_MEDIA_TUNER_XC4000=y CONFIG_MEDIA_TUNER_XC5000=y # end of Customize TV tuners # # Customise DVB Frontends # # # Multistandard (satellite) frontends # CONFIG_DVB_M88DS3103=y CONFIG_DVB_MXL5XX=y CONFIG_DVB_STB0899=y CONFIG_DVB_STB6100=y CONFIG_DVB_STV090x=y CONFIG_DVB_STV0910=y CONFIG_DVB_STV6110x=y CONFIG_DVB_STV6111=y # # Multistandard (cable + terrestrial) frontends # CONFIG_DVB_DRXK=y CONFIG_DVB_MN88472=y CONFIG_DVB_MN88473=y CONFIG_DVB_SI2165=y CONFIG_DVB_TDA18271C2DD=y # # DVB-S (satellite) frontends # CONFIG_DVB_CX24110=y CONFIG_DVB_CX24116=y CONFIG_DVB_CX24117=y CONFIG_DVB_CX24120=y CONFIG_DVB_CX24123=y CONFIG_DVB_DS3000=y CONFIG_DVB_MB86A16=y CONFIG_DVB_MT312=y CONFIG_DVB_S5H1420=y CONFIG_DVB_SI21XX=y CONFIG_DVB_STB6000=y CONFIG_DVB_STV0288=y CONFIG_DVB_STV0299=y CONFIG_DVB_STV0900=y CONFIG_DVB_STV6110=y CONFIG_DVB_TDA10071=y CONFIG_DVB_TDA10086=y CONFIG_DVB_TDA8083=y CONFIG_DVB_TDA8261=y CONFIG_DVB_TDA826X=y CONFIG_DVB_TS2020=y CONFIG_DVB_TUA6100=y CONFIG_DVB_TUNER_CX24113=y CONFIG_DVB_TUNER_ITD1000=y CONFIG_DVB_VES1X93=y CONFIG_DVB_ZL10036=y CONFIG_DVB_ZL10039=y # # DVB-T (terrestrial) frontends # CONFIG_DVB_AF9013=y CONFIG_DVB_AS102_FE=y CONFIG_DVB_CX22700=y CONFIG_DVB_CX22702=y CONFIG_DVB_CXD2820R=y CONFIG_DVB_CXD2841ER=y CONFIG_DVB_DIB3000MB=y CONFIG_DVB_DIB3000MC=y CONFIG_DVB_DIB7000M=y CONFIG_DVB_DIB7000P=y CONFIG_DVB_DIB9000=y CONFIG_DVB_DRXD=y CONFIG_DVB_EC100=y CONFIG_DVB_GP8PSK_FE=y CONFIG_DVB_L64781=y CONFIG_DVB_MT352=y CONFIG_DVB_NXT6000=y CONFIG_DVB_RTL2830=y CONFIG_DVB_RTL2832=y CONFIG_DVB_RTL2832_SDR=y CONFIG_DVB_S5H1432=y CONFIG_DVB_SI2168=y CONFIG_DVB_SP887X=y CONFIG_DVB_STV0367=y CONFIG_DVB_TDA10048=y CONFIG_DVB_TDA1004X=y CONFIG_DVB_ZD1301_DEMOD=y CONFIG_DVB_ZL10353=y CONFIG_DVB_CXD2880=y # # DVB-C (cable) frontends # CONFIG_DVB_STV0297=y CONFIG_DVB_TDA10021=y CONFIG_DVB_TDA10023=y CONFIG_DVB_VES1820=y # # ATSC (North American/Korean Terrestrial/Cable DTV) frontends # CONFIG_DVB_AU8522=y CONFIG_DVB_AU8522_DTV=y CONFIG_DVB_AU8522_V4L=y CONFIG_DVB_BCM3510=y CONFIG_DVB_LG2160=y CONFIG_DVB_LGDT3305=y CONFIG_DVB_LGDT3306A=y CONFIG_DVB_LGDT330X=y CONFIG_DVB_MXL692=y CONFIG_DVB_NXT200X=y CONFIG_DVB_OR51132=y CONFIG_DVB_OR51211=y CONFIG_DVB_S5H1409=y CONFIG_DVB_S5H1411=y # # ISDB-T (terrestrial) frontends # CONFIG_DVB_DIB8000=y CONFIG_DVB_MB86A20S=y CONFIG_DVB_S921=y # # ISDB-S (satellite) & ISDB-T (terrestrial) frontends # CONFIG_DVB_MN88443X=y CONFIG_DVB_TC90522=y # # Digital terrestrial only tuners/PLL # CONFIG_DVB_PLL=y CONFIG_DVB_TUNER_DIB0070=y CONFIG_DVB_TUNER_DIB0090=y # # SEC control devices for DVB-S # CONFIG_DVB_A8293=y CONFIG_DVB_AF9033=y CONFIG_DVB_ASCOT2E=y CONFIG_DVB_ATBM8830=y CONFIG_DVB_HELENE=y CONFIG_DVB_HORUS3A=y CONFIG_DVB_ISL6405=y CONFIG_DVB_ISL6421=y CONFIG_DVB_ISL6423=y CONFIG_DVB_IX2505V=y CONFIG_DVB_LGS8GL5=y CONFIG_DVB_LGS8GXX=y CONFIG_DVB_LNBH25=y CONFIG_DVB_LNBH29=y CONFIG_DVB_LNBP21=y CONFIG_DVB_LNBP22=y CONFIG_DVB_M88RS2000=y CONFIG_DVB_TDA665x=y CONFIG_DVB_DRX39XYJ=y # # Common Interface (EN50221) controller drivers # CONFIG_DVB_CXD2099=y CONFIG_DVB_SP2=y # end of Customise DVB Frontends # end of Media ancillary drivers # # Graphics support # CONFIG_APERTURE_HELPERS=y CONFIG_VIDEO_CMDLINE=y CONFIG_VIDEO_NOMODESET=y CONFIG_AGP=y CONFIG_AGP_ALI=y CONFIG_AGP_ATI=y # CONFIG_AGP_AMD is not set CONFIG_AGP_INTEL=y CONFIG_AGP_NVIDIA=y CONFIG_AGP_SIS=y CONFIG_AGP_SWORKS=y CONFIG_AGP_VIA=y CONFIG_AGP_EFFICEON=y CONFIG_INTEL_GTT=y CONFIG_VGA_SWITCHEROO=y CONFIG_DRM=y CONFIG_DRM_MIPI_DBI=y CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_DEBUG_MM=y CONFIG_DRM_KMS_HELPER=y CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS=y CONFIG_DRM_DEBUG_MODESET_LOCK=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM=y CONFIG_DRM_LOAD_EDID_FIRMWARE=y CONFIG_DRM_DP_AUX_BUS=y CONFIG_DRM_DISPLAY_HELPER=y CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDCP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y CONFIG_DRM_DP_AUX_CHARDEV=y CONFIG_DRM_DP_CEC=y CONFIG_DRM_TTM=y CONFIG_DRM_BUDDY=y CONFIG_DRM_VRAM_HELPER=y CONFIG_DRM_TTM_HELPER=y CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SCHED=y # # I2C encoder or helper chips # CONFIG_DRM_I2C_CH7006=y CONFIG_DRM_I2C_SIL164=y CONFIG_DRM_I2C_NXP_TDA998X=y CONFIG_DRM_I2C_NXP_TDA9950=y # end of I2C encoder or helper chips # # ARM devices # CONFIG_DRM_KOMEDA=y # end of ARM devices # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set CONFIG_DRM_I915=y CONFIG_DRM_I915_FORCE_PROBE="" CONFIG_DRM_I915_CAPTURE_ERROR=y CONFIG_DRM_I915_COMPRESS_ERROR=y CONFIG_DRM_I915_USERPTR=y CONFIG_DRM_I915_PXP=y # # drm/i915 Debugging # CONFIG_DRM_I915_WERROR=y # CONFIG_DRM_I915_DEBUG is not set CONFIG_DRM_I915_DEBUG_MMIO=y # CONFIG_DRM_I915_DEBUG_GEM is not set CONFIG_DRM_I915_SW_FENCE_DEBUG_OBJECTS=y CONFIG_DRM_I915_SW_FENCE_CHECK_DAG=y CONFIG_DRM_I915_DEBUG_GUC=y # CONFIG_DRM_I915_SELFTEST is not set CONFIG_DRM_I915_LOW_LEVEL_TRACEPOINTS=y CONFIG_DRM_I915_DEBUG_VBLANK_EVADE=y CONFIG_DRM_I915_DEBUG_RUNTIME_PM=y # end of drm/i915 Debugging # # drm/i915 Profile Guided Optimisation # CONFIG_DRM_I915_REQUEST_TIMEOUT=20000 CONFIG_DRM_I915_FENCE_TIMEOUT=10000 CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND=250 CONFIG_DRM_I915_HEARTBEAT_INTERVAL=2500 CONFIG_DRM_I915_PREEMPT_TIMEOUT=640 CONFIG_DRM_I915_PREEMPT_TIMEOUT_COMPUTE=7500 CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT=8000 CONFIG_DRM_I915_STOP_TIMEOUT=100 CONFIG_DRM_I915_TIMESLICE_DURATION=1 # end of drm/i915 Profile Guided Optimisation CONFIG_DRM_VGEM=y CONFIG_DRM_VKMS=y CONFIG_DRM_VMWGFX=y CONFIG_DRM_VMWGFX_MKSSTATS=y CONFIG_DRM_GMA500=y CONFIG_DRM_UDL=y CONFIG_DRM_AST=y CONFIG_DRM_MGAG200=y CONFIG_DRM_QXL=y CONFIG_DRM_VIRTIO_GPU=y CONFIG_DRM_VIRTIO_GPU_KMS=y CONFIG_DRM_PANEL=y # # Display Panels # CONFIG_DRM_PANEL_ABT_Y030XX067A=y CONFIG_DRM_PANEL_ARM_VERSATILE=y CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596=y CONFIG_DRM_PANEL_AUO_A030JTN01=y CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=y CONFIG_DRM_PANEL_BOE_HIMAX8279D=y CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=y CONFIG_DRM_PANEL_DSI_CM=y CONFIG_DRM_PANEL_LVDS=y CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_EDP=y CONFIG_DRM_PANEL_EBBG_FT8719=y CONFIG_DRM_PANEL_ELIDA_KD35T133=y CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=y CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=y CONFIG_DRM_PANEL_HIMAX_HX8394=y CONFIG_DRM_PANEL_ILITEK_IL9322=y CONFIG_DRM_PANEL_ILITEK_ILI9341=y CONFIG_DRM_PANEL_ILITEK_ILI9881C=y CONFIG_DRM_PANEL_INNOLUX_EJ030NA=y CONFIG_DRM_PANEL_INNOLUX_P079ZCA=y CONFIG_DRM_PANEL_JADARD_JD9365DA_H3=y CONFIG_DRM_PANEL_JDI_LT070ME05000=y CONFIG_DRM_PANEL_JDI_R63452=y CONFIG_DRM_PANEL_KHADAS_TS050=y CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=y CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W=y CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=y CONFIG_DRM_PANEL_SAMSUNG_LD9040=y CONFIG_DRM_PANEL_LG_LB035Q02=y CONFIG_DRM_PANEL_LG_LG4573=y CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966=y CONFIG_DRM_PANEL_NEC_NL8048HL11=y CONFIG_DRM_PANEL_NEWVISION_NV3051D=y CONFIG_DRM_PANEL_NEWVISION_NV3052C=y CONFIG_DRM_PANEL_NOVATEK_NT35510=y CONFIG_DRM_PANEL_NOVATEK_NT35560=y CONFIG_DRM_PANEL_NOVATEK_NT35950=y CONFIG_DRM_PANEL_NOVATEK_NT36523=y CONFIG_DRM_PANEL_NOVATEK_NT36672A=y CONFIG_DRM_PANEL_NOVATEK_NT39016=y CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=y CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=y CONFIG_DRM_PANEL_ORISETECH_OTA5601A=y CONFIG_DRM_PANEL_ORISETECH_OTM8009A=y CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=y CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=y CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=y CONFIG_DRM_PANEL_RAYDIUM_RM67191=y CONFIG_DRM_PANEL_RAYDIUM_RM68200=y CONFIG_DRM_PANEL_RONBO_RB070D30=y CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=y CONFIG_DRM_PANEL_SAMSUNG_DB7430=y CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=y CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=y CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=y CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=y CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=y CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_SPI=y CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=y CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=y CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=y CONFIG_DRM_PANEL_SEIKO_43WVF1G=y CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=y CONFIG_DRM_PANEL_SHARP_LS037V7DW01=y CONFIG_DRM_PANEL_SHARP_LS043T1LE01=y CONFIG_DRM_PANEL_SHARP_LS060T1SX01=y CONFIG_DRM_PANEL_SITRONIX_ST7701=y CONFIG_DRM_PANEL_SITRONIX_ST7703=y CONFIG_DRM_PANEL_SITRONIX_ST7789V=y CONFIG_DRM_PANEL_SONY_ACX565AKM=y CONFIG_DRM_PANEL_SONY_TD4353_JDI=y CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=y CONFIG_DRM_PANEL_TDO_TL070WSH30=y CONFIG_DRM_PANEL_TPO_TD028TTEC1=y CONFIG_DRM_PANEL_TPO_TD043MTEA1=y CONFIG_DRM_PANEL_TPO_TPG110=y CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=y CONFIG_DRM_PANEL_VISIONOX_RM69299=y CONFIG_DRM_PANEL_VISIONOX_VTDR6130=y CONFIG_DRM_PANEL_WIDECHIPS_WS2401=y CONFIG_DRM_PANEL_XINPENG_XPP055C272=y # end of Display Panels CONFIG_DRM_BRIDGE=y CONFIG_DRM_PANEL_BRIDGE=y # # Display Interface Bridges # CONFIG_DRM_CHIPONE_ICN6211=y CONFIG_DRM_CHRONTEL_CH7033=y CONFIG_DRM_CROS_EC_ANX7688=y CONFIG_DRM_DISPLAY_CONNECTOR=y CONFIG_DRM_ITE_IT6505=y CONFIG_DRM_LONTIUM_LT8912B=y CONFIG_DRM_LONTIUM_LT9211=y CONFIG_DRM_LONTIUM_LT9611=y CONFIG_DRM_LONTIUM_LT9611UXC=y CONFIG_DRM_ITE_IT66121=y CONFIG_DRM_LVDS_CODEC=y CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW=y CONFIG_DRM_NWL_MIPI_DSI=y CONFIG_DRM_NXP_PTN3460=y CONFIG_DRM_PARADE_PS8622=y CONFIG_DRM_PARADE_PS8640=y CONFIG_DRM_SAMSUNG_DSIM=y CONFIG_DRM_SIL_SII8620=y CONFIG_DRM_SII902X=y CONFIG_DRM_SII9234=y CONFIG_DRM_SIMPLE_BRIDGE=y CONFIG_DRM_THINE_THC63LVD1024=y CONFIG_DRM_TOSHIBA_TC358762=y CONFIG_DRM_TOSHIBA_TC358764=y CONFIG_DRM_TOSHIBA_TC358767=y CONFIG_DRM_TOSHIBA_TC358768=y CONFIG_DRM_TOSHIBA_TC358775=y CONFIG_DRM_TI_DLPC3433=y CONFIG_DRM_TI_TFP410=y CONFIG_DRM_TI_SN65DSI83=y CONFIG_DRM_TI_SN65DSI86=y CONFIG_DRM_TI_TPD12S015=y CONFIG_DRM_ANALOGIX_ANX6345=y CONFIG_DRM_ANALOGIX_ANX78XX=y CONFIG_DRM_ANALOGIX_DP=y CONFIG_DRM_ANALOGIX_ANX7625=y CONFIG_DRM_I2C_ADV7511=y CONFIG_DRM_I2C_ADV7511_AUDIO=y CONFIG_DRM_I2C_ADV7511_CEC=y CONFIG_DRM_CDNS_DSI=y CONFIG_DRM_CDNS_DSI_J721E=y CONFIG_DRM_CDNS_MHDP8546=y # end of Display Interface Bridges CONFIG_DRM_ETNAVIV=y CONFIG_DRM_ETNAVIV_THERMAL=y CONFIG_DRM_LOGICVC=y CONFIG_DRM_ARCPGU=y CONFIG_DRM_BOCHS=y CONFIG_DRM_CIRRUS_QEMU=y CONFIG_DRM_GM12U320=y CONFIG_DRM_PANEL_MIPI_DBI=y CONFIG_DRM_SIMPLEDRM=y CONFIG_TINYDRM_HX8357D=y CONFIG_TINYDRM_ILI9163=y CONFIG_TINYDRM_ILI9225=y CONFIG_TINYDRM_ILI9341=y CONFIG_TINYDRM_ILI9486=y CONFIG_TINYDRM_MI0283QT=y CONFIG_TINYDRM_REPAPER=y CONFIG_TINYDRM_ST7586=y CONFIG_TINYDRM_ST7735R=y CONFIG_DRM_VBOXVIDEO=y CONFIG_DRM_GUD=y CONFIG_DRM_SSD130X=y CONFIG_DRM_SSD130X_I2C=y CONFIG_DRM_SSD130X_SPI=y CONFIG_DRM_HYPERV=y CONFIG_DRM_LEGACY=y CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_DRM_PRIVACY_SCREEN=y # # Frame buffer Devices # CONFIG_FB_NOTIFY=y CONFIG_FB=y CONFIG_FIRMWARE_EDID=y CONFIG_FB_DDC=y CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y CONFIG_FB_FOREIGN_ENDIAN=y CONFIG_FB_BOTH_ENDIAN=y # CONFIG_FB_BIG_ENDIAN is not set # CONFIG_FB_LITTLE_ENDIAN is not set CONFIG_FB_SYS_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_HECUBA=y CONFIG_FB_SVGALIB=y CONFIG_FB_BACKLIGHT=y CONFIG_FB_MODE_HELPERS=y CONFIG_FB_TILEBLITTING=y # # Frame buffer hardware drivers # CONFIG_FB_CIRRUS=y CONFIG_FB_PM2=y CONFIG_FB_PM2_FIFO_DISCONNECT=y CONFIG_FB_CYBER2000=y CONFIG_FB_CYBER2000_DDC=y CONFIG_FB_ARC=y CONFIG_FB_ASILIANT=y CONFIG_FB_IMSTT=y # CONFIG_FB_VGA16 is not set CONFIG_FB_UVESA=y CONFIG_FB_VESA=y CONFIG_FB_EFI=y CONFIG_FB_N411=y CONFIG_FB_HGA=y CONFIG_FB_OPENCORES=y CONFIG_FB_S1D13XXX=y CONFIG_FB_NVIDIA=y CONFIG_FB_NVIDIA_I2C=y CONFIG_FB_NVIDIA_DEBUG=y CONFIG_FB_NVIDIA_BACKLIGHT=y CONFIG_FB_RIVA=y CONFIG_FB_RIVA_I2C=y CONFIG_FB_RIVA_DEBUG=y CONFIG_FB_RIVA_BACKLIGHT=y CONFIG_FB_I740=y CONFIG_FB_I810=y CONFIG_FB_I810_GTF=y CONFIG_FB_I810_I2C=y CONFIG_FB_LE80578=y CONFIG_FB_CARILLO_RANCH=y CONFIG_FB_MATROX=y CONFIG_FB_MATROX_MILLENIUM=y CONFIG_FB_MATROX_MYSTIQUE=y CONFIG_FB_MATROX_G=y CONFIG_FB_MATROX_I2C=y CONFIG_FB_MATROX_MAVEN=y # CONFIG_FB_RADEON is not set CONFIG_FB_ATY128=y CONFIG_FB_ATY128_BACKLIGHT=y CONFIG_FB_ATY=y CONFIG_FB_ATY_CT=y CONFIG_FB_ATY_GENERIC_LCD=y CONFIG_FB_ATY_GX=y CONFIG_FB_ATY_BACKLIGHT=y CONFIG_FB_S3=y CONFIG_FB_S3_DDC=y CONFIG_FB_SAVAGE=y CONFIG_FB_SAVAGE_I2C=y CONFIG_FB_SAVAGE_ACCEL=y CONFIG_FB_SIS=y CONFIG_FB_SIS_300=y CONFIG_FB_SIS_315=y CONFIG_FB_VIA=y CONFIG_FB_VIA_DIRECT_PROCFS=y CONFIG_FB_VIA_X_COMPATIBILITY=y CONFIG_FB_NEOMAGIC=y CONFIG_FB_KYRO=y CONFIG_FB_3DFX=y CONFIG_FB_3DFX_ACCEL=y CONFIG_FB_3DFX_I2C=y CONFIG_FB_VOODOO1=y CONFIG_FB_VT8623=y CONFIG_FB_TRIDENT=y CONFIG_FB_ARK=y CONFIG_FB_PM3=y CONFIG_FB_CARMINE=y CONFIG_FB_CARMINE_DRAM_EVAL=y # CONFIG_CARMINE_DRAM_CUSTOM is not set CONFIG_FB_GEODE=y CONFIG_FB_GEODE_LX=y CONFIG_FB_GEODE_GX=y CONFIG_FB_GEODE_GX1=y CONFIG_FB_SM501=y CONFIG_FB_SMSCUFX=y CONFIG_FB_UDL=y CONFIG_FB_IBM_GXT4500=y CONFIG_FB_GOLDFISH=y CONFIG_FB_VIRTUAL=y CONFIG_FB_METRONOME=y CONFIG_FB_MB862XX=y CONFIG_FB_MB862XX_PCI_GDC=y CONFIG_FB_MB862XX_I2C=y CONFIG_FB_HYPERV=y CONFIG_FB_SSD1307=y CONFIG_FB_SM712=y # end of Frame buffer Devices # # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_L4F00242T03=y CONFIG_LCD_LMS283GF05=y CONFIG_LCD_LTV350QV=y CONFIG_LCD_ILI922X=y CONFIG_LCD_ILI9320=y CONFIG_LCD_TDO24M=y CONFIG_LCD_VGG2432A4=y CONFIG_LCD_PLATFORM=y CONFIG_LCD_AMS369FG06=y CONFIG_LCD_LMS501KF03=y CONFIG_LCD_HX8357=y CONFIG_LCD_OTM3225A=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_KTD253=y CONFIG_BACKLIGHT_KTZ8866=y CONFIG_BACKLIGHT_LM3533=y CONFIG_BACKLIGHT_CARILLO_RANCH=y CONFIG_BACKLIGHT_PWM=y CONFIG_BACKLIGHT_DA903X=y CONFIG_BACKLIGHT_DA9052=y CONFIG_BACKLIGHT_MAX8925=y CONFIG_BACKLIGHT_MT6370=y CONFIG_BACKLIGHT_APPLE=y CONFIG_BACKLIGHT_QCOM_WLED=y CONFIG_BACKLIGHT_RT4831=y CONFIG_BACKLIGHT_SAHARA=y CONFIG_BACKLIGHT_WM831X=y CONFIG_BACKLIGHT_ADP5520=y CONFIG_BACKLIGHT_ADP8860=y CONFIG_BACKLIGHT_ADP8870=y CONFIG_BACKLIGHT_88PM860X=y CONFIG_BACKLIGHT_PCF50633=y CONFIG_BACKLIGHT_AAT2870=y CONFIG_BACKLIGHT_LM3630A=y CONFIG_BACKLIGHT_LM3639=y CONFIG_BACKLIGHT_LP855X=y CONFIG_BACKLIGHT_LP8788=y CONFIG_BACKLIGHT_PANDORA=y CONFIG_BACKLIGHT_SKY81452=y CONFIG_BACKLIGHT_TPS65217=y CONFIG_BACKLIGHT_AS3711=y CONFIG_BACKLIGHT_GPIO=y CONFIG_BACKLIGHT_LV5207LP=y CONFIG_BACKLIGHT_BD6107=y CONFIG_BACKLIGHT_ARCXCNN=y CONFIG_BACKLIGHT_RAVE_SP=y CONFIG_BACKLIGHT_LED=y # end of Backlight & LCD device support CONFIG_VGASTATE=y CONFIG_VIDEOMODE_HELPERS=y CONFIG_HDMI=y # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_MDA_CONSOLE=y CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 CONFIG_DUMMY_CONSOLE_ROWS=25 CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y # end of Console display driver support CONFIG_LOGO=y CONFIG_LOGO_LINUX_MONO=y CONFIG_LOGO_LINUX_VGA16=y CONFIG_LOGO_LINUX_CLUT224=y # end of Graphics support CONFIG_DRM_ACCEL=y CONFIG_DRM_ACCEL_QAIC=y CONFIG_SOUND=y CONFIG_SOUND_OSS_CORE=y CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y CONFIG_SND_PCM_ELD=y CONFIG_SND_PCM_IEC958=y CONFIG_SND_DMAENGINE_PCM=y CONFIG_SND_HWDEP=y CONFIG_SND_SEQ_DEVICE=y CONFIG_SND_RAWMIDI=y CONFIG_SND_COMPRESS_OFFLOAD=y CONFIG_SND_JACK=y CONFIG_SND_JACK_INPUT_DEV=y CONFIG_SND_OSSEMUL=y CONFIG_SND_MIXER_OSS=y CONFIG_SND_PCM_OSS=y CONFIG_SND_PCM_OSS_PLUGINS=y CONFIG_SND_PCM_TIMER=y CONFIG_SND_HRTIMER=y CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_MAX_CARDS=32 CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y CONFIG_SND_VERBOSE_PRINTK=y CONFIG_SND_CTL_FAST_LOOKUP=y CONFIG_SND_DEBUG=y CONFIG_SND_DEBUG_VERBOSE=y CONFIG_SND_PCM_XRUN_DEBUG=y CONFIG_SND_CTL_INPUT_VALIDATION=y CONFIG_SND_CTL_DEBUG=y CONFIG_SND_JACK_INJECTION_DEBUG=y CONFIG_SND_VMASTER=y CONFIG_SND_DMA_SGBUF=y CONFIG_SND_CTL_LED=y CONFIG_SND_SEQUENCER=y CONFIG_SND_SEQ_DUMMY=y CONFIG_SND_SEQUENCER_OSS=y CONFIG_SND_SEQ_HRTIMER_DEFAULT=y CONFIG_SND_SEQ_MIDI_EVENT=y CONFIG_SND_SEQ_MIDI=y CONFIG_SND_SEQ_MIDI_EMUL=y CONFIG_SND_SEQ_VIRMIDI=y CONFIG_SND_MPU401_UART=y CONFIG_SND_OPL3_LIB=y CONFIG_SND_OPL4_LIB=y CONFIG_SND_OPL3_LIB_SEQ=y CONFIG_SND_OPL4_LIB_SEQ=y CONFIG_SND_VX_LIB=y CONFIG_SND_AC97_CODEC=y CONFIG_SND_DRIVERS=y CONFIG_SND_PCSP=y CONFIG_SND_DUMMY=y CONFIG_SND_ALOOP=y CONFIG_SND_VIRMIDI=y CONFIG_SND_MTPAV=y CONFIG_SND_MTS64=y CONFIG_SND_SERIAL_U16550=y CONFIG_SND_SERIAL_GENERIC=y CONFIG_SND_MPU401=y CONFIG_SND_PORTMAN2X4=y CONFIG_SND_AC97_POWER_SAVE=y CONFIG_SND_AC97_POWER_SAVE_DEFAULT=0 CONFIG_SND_WSS_LIB=y CONFIG_SND_SB_COMMON=y CONFIG_SND_SB8_DSP=y CONFIG_SND_SB16_DSP=y CONFIG_SND_ISA=y CONFIG_SND_ADLIB=y CONFIG_SND_AD1816A=y CONFIG_SND_AD1848=y CONFIG_SND_ALS100=y CONFIG_SND_AZT1605=y CONFIG_SND_AZT2316=y CONFIG_SND_AZT2320=y CONFIG_SND_CMI8328=y CONFIG_SND_CMI8330=y CONFIG_SND_CS4231=y CONFIG_SND_CS4236=y CONFIG_SND_ES1688=y CONFIG_SND_ES18XX=y CONFIG_SND_SC6000=y CONFIG_SND_GUSCLASSIC=y CONFIG_SND_GUSEXTREME=y CONFIG_SND_GUSMAX=y CONFIG_SND_INTERWAVE=y CONFIG_SND_INTERWAVE_STB=y CONFIG_SND_JAZZ16=y CONFIG_SND_OPL3SA2=y CONFIG_SND_OPTI92X_AD1848=y CONFIG_SND_OPTI92X_CS4231=y CONFIG_SND_OPTI93X=y CONFIG_SND_MIRO=y CONFIG_SND_SB8=y CONFIG_SND_SB16=y CONFIG_SND_SBAWE=y CONFIG_SND_SBAWE_SEQ=y CONFIG_SND_SB16_CSP=y CONFIG_SND_SSCAPE=y CONFIG_SND_WAVEFRONT=y CONFIG_SND_MSND_PINNACLE=y CONFIG_SND_MSND_CLASSIC=y CONFIG_SND_PCI=y CONFIG_SND_AD1889=y CONFIG_SND_ALS300=y CONFIG_SND_ALS4000=y CONFIG_SND_ALI5451=y CONFIG_SND_ASIHPI=y CONFIG_SND_ATIIXP=y CONFIG_SND_ATIIXP_MODEM=y CONFIG_SND_AU8810=y CONFIG_SND_AU8820=y CONFIG_SND_AU8830=y CONFIG_SND_AW2=y CONFIG_SND_AZT3328=y CONFIG_SND_BT87X=y CONFIG_SND_BT87X_OVERCLOCK=y CONFIG_SND_CA0106=y CONFIG_SND_CMIPCI=y CONFIG_SND_OXYGEN_LIB=y CONFIG_SND_OXYGEN=y CONFIG_SND_CS4281=y CONFIG_SND_CS46XX=y CONFIG_SND_CS46XX_NEW_DSP=y CONFIG_SND_CS5530=y CONFIG_SND_CS5535AUDIO=y CONFIG_SND_CTXFI=y CONFIG_SND_DARLA20=y CONFIG_SND_GINA20=y CONFIG_SND_LAYLA20=y CONFIG_SND_DARLA24=y CONFIG_SND_GINA24=y CONFIG_SND_LAYLA24=y CONFIG_SND_MONA=y CONFIG_SND_MIA=y CONFIG_SND_ECHO3G=y CONFIG_SND_INDIGO=y CONFIG_SND_INDIGOIO=y CONFIG_SND_INDIGODJ=y CONFIG_SND_INDIGOIOX=y CONFIG_SND_INDIGODJX=y CONFIG_SND_EMU10K1=y CONFIG_SND_EMU10K1_SEQ=y CONFIG_SND_EMU10K1X=y CONFIG_SND_ENS1370=y CONFIG_SND_ENS1371=y CONFIG_SND_ES1938=y CONFIG_SND_ES1968=y CONFIG_SND_ES1968_INPUT=y CONFIG_SND_ES1968_RADIO=y CONFIG_SND_FM801=y CONFIG_SND_FM801_TEA575X_BOOL=y CONFIG_SND_HDSP=y # # Don't forget to add built-in firmwares for HDSP driver # CONFIG_SND_HDSPM=y CONFIG_SND_ICE1712=y CONFIG_SND_ICE1724=y CONFIG_SND_INTEL8X0=y CONFIG_SND_INTEL8X0M=y CONFIG_SND_KORG1212=y CONFIG_SND_LOLA=y CONFIG_SND_LX6464ES=y CONFIG_SND_MAESTRO3=y CONFIG_SND_MAESTRO3_INPUT=y CONFIG_SND_MIXART=y CONFIG_SND_NM256=y CONFIG_SND_PCXHR=y CONFIG_SND_RIPTIDE=y CONFIG_SND_RME32=y CONFIG_SND_RME96=y CONFIG_SND_RME9652=y CONFIG_SND_SIS7019=y CONFIG_SND_SONICVIBES=y CONFIG_SND_TRIDENT=y CONFIG_SND_VIA82XX=y CONFIG_SND_VIA82XX_MODEM=y CONFIG_SND_VIRTUOSO=y CONFIG_SND_VX222=y CONFIG_SND_YMFPCI=y # # HD-Audio # CONFIG_SND_HDA=y CONFIG_SND_HDA_GENERIC_LEDS=y CONFIG_SND_HDA_INTEL=y CONFIG_SND_HDA_HWDEP=y CONFIG_SND_HDA_RECONFIG=y CONFIG_SND_HDA_INPUT_BEEP=y CONFIG_SND_HDA_INPUT_BEEP_MODE=1 CONFIG_SND_HDA_PATCH_LOADER=y CONFIG_SND_HDA_SCODEC_CS35L41=y CONFIG_SND_HDA_CS_DSP_CONTROLS=y CONFIG_SND_HDA_SCODEC_CS35L41_I2C=y CONFIG_SND_HDA_SCODEC_CS35L41_SPI=y CONFIG_SND_HDA_CODEC_REALTEK=y CONFIG_SND_HDA_CODEC_ANALOG=y CONFIG_SND_HDA_CODEC_SIGMATEL=y CONFIG_SND_HDA_CODEC_VIA=y CONFIG_SND_HDA_CODEC_HDMI=y CONFIG_SND_HDA_CODEC_CIRRUS=y CONFIG_SND_HDA_CODEC_CS8409=y CONFIG_SND_HDA_CODEC_CONEXANT=y CONFIG_SND_HDA_CODEC_CA0110=y CONFIG_SND_HDA_CODEC_CA0132=y CONFIG_SND_HDA_CODEC_CA0132_DSP=y CONFIG_SND_HDA_CODEC_CMEDIA=y CONFIG_SND_HDA_CODEC_SI3054=y CONFIG_SND_HDA_GENERIC=y CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 CONFIG_SND_HDA_INTEL_HDMI_SILENT_STREAM=y CONFIG_SND_HDA_CTL_DEV_ID=y # end of HD-Audio CONFIG_SND_HDA_CORE=y CONFIG_SND_HDA_DSP_LOADER=y CONFIG_SND_HDA_COMPONENT=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_EXT_CORE=y CONFIG_SND_HDA_PREALLOC_SIZE=0 CONFIG_SND_INTEL_NHLT=y CONFIG_SND_INTEL_DSP_CONFIG=y CONFIG_SND_INTEL_SOUNDWIRE_ACPI=y CONFIG_SND_INTEL_BYT_PREFER_SOF=y CONFIG_SND_SPI=y CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=y CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y CONFIG_SND_USB_UA101=y CONFIG_SND_USB_USX2Y=y CONFIG_SND_USB_CAIAQ=y CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_US122L=y CONFIG_SND_USB_6FIRE=y CONFIG_SND_USB_HIFACE=y CONFIG_SND_BCD2000=y CONFIG_SND_USB_LINE6=y CONFIG_SND_USB_POD=y CONFIG_SND_USB_PODHD=y CONFIG_SND_USB_TONEPORT=y CONFIG_SND_USB_VARIAX=y CONFIG_SND_FIREWIRE=y CONFIG_SND_FIREWIRE_LIB=y CONFIG_SND_DICE=y CONFIG_SND_OXFW=y CONFIG_SND_ISIGHT=y CONFIG_SND_FIREWORKS=y CONFIG_SND_BEBOB=y CONFIG_SND_FIREWIRE_DIGI00X=y CONFIG_SND_FIREWIRE_TASCAM=y CONFIG_SND_FIREWIRE_MOTU=y CONFIG_SND_FIREFACE=y CONFIG_SND_PCMCIA=y CONFIG_SND_VXPOCKET=y CONFIG_SND_PDAUDIOCF=y CONFIG_SND_SOC=y CONFIG_SND_SOC_AC97_BUS=y CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y CONFIG_SND_SOC_COMPRESS=y CONFIG_SND_SOC_TOPOLOGY=y CONFIG_SND_SOC_ACPI=y CONFIG_SND_SOC_ADI=y CONFIG_SND_SOC_ADI_AXI_I2S=y CONFIG_SND_SOC_ADI_AXI_SPDIF=y # CONFIG_SND_SOC_AMD_ACP is not set # CONFIG_SND_SOC_AMD_ACP3x is not set # CONFIG_SND_SOC_AMD_RENOIR is not set # CONFIG_SND_SOC_AMD_ACP5x is not set # CONFIG_SND_SOC_AMD_ACP6x is not set # CONFIG_SND_AMD_ACP_CONFIG is not set # CONFIG_SND_SOC_AMD_ACP_COMMON is not set # CONFIG_SND_SOC_AMD_RPL_ACP6x is not set # CONFIG_SND_SOC_AMD_PS is not set CONFIG_SND_ATMEL_SOC=y CONFIG_SND_SOC_MIKROE_PROTO=y CONFIG_SND_BCM63XX_I2S_WHISTLER=y CONFIG_SND_DESIGNWARE_I2S=y CONFIG_SND_DESIGNWARE_PCM=y # # SoC Audio for Freescale CPUs # # # Common SoC Audio options for Freescale CPUs: # CONFIG_SND_SOC_FSL_ASRC=y CONFIG_SND_SOC_FSL_SAI=y CONFIG_SND_SOC_FSL_MQS=y CONFIG_SND_SOC_FSL_AUDMIX=y CONFIG_SND_SOC_FSL_SSI=y CONFIG_SND_SOC_FSL_SPDIF=y CONFIG_SND_SOC_FSL_ESAI=y CONFIG_SND_SOC_FSL_MICFIL=y CONFIG_SND_SOC_FSL_EASRC=y CONFIG_SND_SOC_FSL_XCVR=y CONFIG_SND_SOC_FSL_UTILS=y CONFIG_SND_SOC_FSL_RPMSG=y CONFIG_SND_SOC_IMX_AUDMUX=y # end of SoC Audio for Freescale CPUs CONFIG_SND_I2S_HI6210_I2S=y CONFIG_SND_SOC_IMG=y CONFIG_SND_SOC_IMG_I2S_IN=y CONFIG_SND_SOC_IMG_I2S_OUT=y CONFIG_SND_SOC_IMG_PARALLEL_OUT=y CONFIG_SND_SOC_IMG_SPDIF_IN=y CONFIG_SND_SOC_IMG_SPDIF_OUT=y CONFIG_SND_SOC_IMG_PISTACHIO_INTERNAL_DAC=y CONFIG_SND_SOC_INTEL_SST_TOPLEVEL=y CONFIG_SND_SOC_INTEL_SST=y CONFIG_SND_SOC_INTEL_CATPT=y CONFIG_SND_SST_ATOM_HIFI2_PLATFORM=y CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_PCI=y CONFIG_SND_SST_ATOM_HIFI2_PLATFORM_ACPI=y CONFIG_SND_SOC_INTEL_SKYLAKE=y CONFIG_SND_SOC_INTEL_SKL=y CONFIG_SND_SOC_INTEL_APL=y CONFIG_SND_SOC_INTEL_KBL=y CONFIG_SND_SOC_INTEL_GLK=y CONFIG_SND_SOC_INTEL_CNL=y CONFIG_SND_SOC_INTEL_CFL=y CONFIG_SND_SOC_INTEL_CML_H=y CONFIG_SND_SOC_INTEL_CML_LP=y CONFIG_SND_SOC_INTEL_SKYLAKE_FAMILY=y CONFIG_SND_SOC_INTEL_SKYLAKE_SSP_CLK=y CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC=y CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=y CONFIG_SND_SOC_ACPI_INTEL_MATCH=y CONFIG_SND_SOC_INTEL_AVS=y # # Intel AVS Machine drivers # # # Available DSP configurations # CONFIG_SND_SOC_INTEL_AVS_MACH_DA7219=y CONFIG_SND_SOC_INTEL_AVS_MACH_DMIC=y CONFIG_SND_SOC_INTEL_AVS_MACH_HDAUDIO=y # CONFIG_SND_SOC_INTEL_AVS_MACH_I2S_TEST is not set CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98927=y CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98357A=y CONFIG_SND_SOC_INTEL_AVS_MACH_MAX98373=y CONFIG_SND_SOC_INTEL_AVS_MACH_NAU8825=y CONFIG_SND_SOC_INTEL_AVS_MACH_PROBE=y CONFIG_SND_SOC_INTEL_AVS_MACH_RT274=y CONFIG_SND_SOC_INTEL_AVS_MACH_RT286=y CONFIG_SND_SOC_INTEL_AVS_MACH_RT298=y CONFIG_SND_SOC_INTEL_AVS_MACH_RT5682=y CONFIG_SND_SOC_INTEL_AVS_MACH_SSM4567=y # end of Intel AVS Machine drivers CONFIG_SND_SOC_INTEL_MACH=y CONFIG_SND_SOC_INTEL_USER_FRIENDLY_LONG_NAMES=y CONFIG_SND_SOC_INTEL_HDA_DSP_COMMON=y CONFIG_SND_SOC_INTEL_SOF_MAXIM_COMMON=y CONFIG_SND_SOC_INTEL_SOF_REALTEK_COMMON=y CONFIG_SND_SOC_INTEL_HASWELL_MACH=y CONFIG_SND_SOC_INTEL_BDW_RT5650_MACH=y CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=y CONFIG_SND_SOC_INTEL_BROADWELL_MACH=y CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=y CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH=y CONFIG_SND_SOC_INTEL_BYTCR_WM5102_MACH=y CONFIG_SND_SOC_INTEL_CHT_BSW_RT5672_MACH=y CONFIG_SND_SOC_INTEL_CHT_BSW_RT5645_MACH=y CONFIG_SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH=y CONFIG_SND_SOC_INTEL_CHT_BSW_NAU8824_MACH=y CONFIG_SND_SOC_INTEL_BYT_CHT_CX2072X_MACH=y CONFIG_SND_SOC_INTEL_BYT_CHT_DA7213_MACH=y CONFIG_SND_SOC_INTEL_BYT_CHT_ES8316_MACH=y CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=y CONFIG_SND_SOC_INTEL_SKL_RT286_MACH=y CONFIG_SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH=y CONFIG_SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH=y CONFIG_SND_SOC_INTEL_DA7219_MAX98357A_GENERIC=y CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_COMMON=y CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH=y CONFIG_SND_SOC_INTEL_BXT_RT298_MACH=y CONFIG_SND_SOC_INTEL_SOF_WM8804_MACH=y CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=y CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=y CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH=y CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH=y CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH=y CONFIG_SND_SOC_INTEL_SKL_HDA_DSP_GENERIC_MACH=y CONFIG_SND_SOC_INTEL_SOF_RT5682_MACH=y CONFIG_SND_SOC_INTEL_SOF_PCM512x_MACH=y CONFIG_SND_SOC_INTEL_SOUNDWIRE_SOF_MACH=y CONFIG_SND_SOC_MTK_BTCVSD=y CONFIG_SND_SOC_SOF_TOPLEVEL=y CONFIG_SND_SOC_SOF_PCI_DEV=y CONFIG_SND_SOC_SOF_PCI=y CONFIG_SND_SOC_SOF_ACPI=y CONFIG_SND_SOC_SOF_ACPI_DEV=y CONFIG_SND_SOC_SOF_OF=y CONFIG_SND_SOC_SOF_DEBUG_PROBES=y CONFIG_SND_SOC_SOF_CLIENT=y CONFIG_SND_SOC_SOF_DEVELOPER_SUPPORT=y CONFIG_SND_SOC_SOF_FORCE_PROBE_WORKQUEUE=y CONFIG_SND_SOC_SOF_NOCODEC=y CONFIG_SND_SOC_SOF_NOCODEC_SUPPORT=y CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS=y CONFIG_SND_SOC_SOF_DEBUG=y CONFIG_SND_SOC_SOF_FORCE_NOCODEC_MODE=y CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP=y CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC=y CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION=y CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE=y CONFIG_SND_SOC_SOF_DEBUG_ENABLE_FIRMWARE_TRACE=y # CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST is not set CONFIG_SND_SOC_SOF_DEBUG_IPC_MSG_INJECTOR=y CONFIG_SND_SOC_SOF_DEBUG_RETAIN_DSP_CONTEXT=y CONFIG_SND_SOC_SOF=y CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE=y CONFIG_SND_SOC_SOF_IPC3=y CONFIG_SND_SOC_SOF_INTEL_IPC4=y # CONFIG_SND_SOC_SOF_AMD_TOPLEVEL is not set CONFIG_SND_SOC_SOF_INTEL_TOPLEVEL=y CONFIG_SND_SOC_SOF_INTEL_HIFI_EP_IPC=y CONFIG_SND_SOC_SOF_INTEL_ATOM_HIFI_EP=y CONFIG_SND_SOC_SOF_INTEL_COMMON=y CONFIG_SND_SOC_SOF_BAYTRAIL=y CONFIG_SND_SOC_SOF_BROADWELL=y CONFIG_SND_SOC_SOF_MERRIFIELD=y CONFIG_SND_SOC_SOF_INTEL_SKL=y CONFIG_SND_SOC_SOF_SKYLAKE=y CONFIG_SND_SOC_SOF_KABYLAKE=y CONFIG_SND_SOC_SOF_INTEL_APL=y CONFIG_SND_SOC_SOF_APOLLOLAKE=y CONFIG_SND_SOC_SOF_GEMINILAKE=y CONFIG_SND_SOC_SOF_INTEL_CNL=y CONFIG_SND_SOC_SOF_CANNONLAKE=y CONFIG_SND_SOC_SOF_COFFEELAKE=y CONFIG_SND_SOC_SOF_COMETLAKE=y CONFIG_SND_SOC_SOF_INTEL_ICL=y CONFIG_SND_SOC_SOF_ICELAKE=y CONFIG_SND_SOC_SOF_JASPERLAKE=y CONFIG_SND_SOC_SOF_INTEL_TGL=y CONFIG_SND_SOC_SOF_TIGERLAKE=y CONFIG_SND_SOC_SOF_ELKHARTLAKE=y CONFIG_SND_SOC_SOF_ALDERLAKE=y CONFIG_SND_SOC_SOF_INTEL_MTL=y CONFIG_SND_SOC_SOF_METEORLAKE=y CONFIG_SND_SOC_SOF_HDA_COMMON=y CONFIG_SND_SOC_SOF_HDA_LINK_BASELINE=y CONFIG_SND_SOC_SOF_HDA_PROBES=y CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE_LINK_BASELINE=y CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE=y CONFIG_SND_SOC_SOF_XTENSA=y # # STMicroelectronics STM32 SOC audio support # # end of STMicroelectronics STM32 SOC audio support CONFIG_SND_SOC_XILINX_I2S=y CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=y CONFIG_SND_SOC_XILINX_SPDIF=y CONFIG_SND_SOC_XTFPGA_I2S=y CONFIG_SND_SOC_I2C_AND_SPI=y # # CODEC drivers # CONFIG_SND_SOC_ARIZONA=y CONFIG_SND_SOC_WM_ADSP=y CONFIG_SND_SOC_AC97_CODEC=y CONFIG_SND_SOC_ADAU_UTILS=y CONFIG_SND_SOC_ADAU1372=y CONFIG_SND_SOC_ADAU1372_I2C=y CONFIG_SND_SOC_ADAU1372_SPI=y CONFIG_SND_SOC_ADAU1701=y CONFIG_SND_SOC_ADAU17X1=y CONFIG_SND_SOC_ADAU1761=y CONFIG_SND_SOC_ADAU1761_I2C=y CONFIG_SND_SOC_ADAU1761_SPI=y CONFIG_SND_SOC_ADAU7002=y CONFIG_SND_SOC_ADAU7118=y CONFIG_SND_SOC_ADAU7118_HW=y CONFIG_SND_SOC_ADAU7118_I2C=y CONFIG_SND_SOC_AK4104=y CONFIG_SND_SOC_AK4118=y CONFIG_SND_SOC_AK4375=y CONFIG_SND_SOC_AK4458=y CONFIG_SND_SOC_AK4554=y CONFIG_SND_SOC_AK4613=y CONFIG_SND_SOC_AK4642=y CONFIG_SND_SOC_AK5386=y CONFIG_SND_SOC_AK5558=y CONFIG_SND_SOC_ALC5623=y CONFIG_SND_SOC_AW8738=y CONFIG_SND_SOC_AW88395_LIB=y CONFIG_SND_SOC_AW88395=y CONFIG_SND_SOC_BD28623=y CONFIG_SND_SOC_BT_SCO=y CONFIG_SND_SOC_CPCAP=y CONFIG_SND_SOC_CROS_EC_CODEC=y CONFIG_SND_SOC_CS35L32=y CONFIG_SND_SOC_CS35L33=y CONFIG_SND_SOC_CS35L34=y CONFIG_SND_SOC_CS35L35=y CONFIG_SND_SOC_CS35L36=y CONFIG_SND_SOC_CS35L41_LIB=y CONFIG_SND_SOC_CS35L41=y CONFIG_SND_SOC_CS35L41_SPI=y CONFIG_SND_SOC_CS35L41_I2C=y CONFIG_SND_SOC_CS35L45=y CONFIG_SND_SOC_CS35L45_SPI=y CONFIG_SND_SOC_CS35L45_I2C=y CONFIG_SND_SOC_CS35L56=y CONFIG_SND_SOC_CS35L56_SHARED=y CONFIG_SND_SOC_CS35L56_I2C=y CONFIG_SND_SOC_CS35L56_SPI=y CONFIG_SND_SOC_CS35L56_SDW=y CONFIG_SND_SOC_CS42L42_CORE=y CONFIG_SND_SOC_CS42L42=y CONFIG_SND_SOC_CS42L42_SDW=y CONFIG_SND_SOC_CS42L51=y CONFIG_SND_SOC_CS42L51_I2C=y CONFIG_SND_SOC_CS42L52=y CONFIG_SND_SOC_CS42L56=y CONFIG_SND_SOC_CS42L73=y CONFIG_SND_SOC_CS42L83=y CONFIG_SND_SOC_CS4234=y CONFIG_SND_SOC_CS4265=y CONFIG_SND_SOC_CS4270=y CONFIG_SND_SOC_CS4271=y CONFIG_SND_SOC_CS4271_I2C=y CONFIG_SND_SOC_CS4271_SPI=y CONFIG_SND_SOC_CS42XX8=y CONFIG_SND_SOC_CS42XX8_I2C=y CONFIG_SND_SOC_CS43130=y CONFIG_SND_SOC_CS4341=y CONFIG_SND_SOC_CS4349=y CONFIG_SND_SOC_CS53L30=y CONFIG_SND_SOC_CX2072X=y CONFIG_SND_SOC_DA7213=y CONFIG_SND_SOC_DA7219=y CONFIG_SND_SOC_DMIC=y CONFIG_SND_SOC_HDMI_CODEC=y CONFIG_SND_SOC_ES7134=y CONFIG_SND_SOC_ES7241=y CONFIG_SND_SOC_ES8316=y CONFIG_SND_SOC_ES8326=y CONFIG_SND_SOC_ES8328=y CONFIG_SND_SOC_ES8328_I2C=y CONFIG_SND_SOC_ES8328_SPI=y CONFIG_SND_SOC_GTM601=y CONFIG_SND_SOC_HDAC_HDMI=y CONFIG_SND_SOC_HDAC_HDA=y CONFIG_SND_SOC_HDA=y CONFIG_SND_SOC_ICS43432=y CONFIG_SND_SOC_IDT821034=y CONFIG_SND_SOC_INNO_RK3036=y CONFIG_SND_SOC_LOCHNAGAR_SC=y CONFIG_SND_SOC_MAX98088=y CONFIG_SND_SOC_MAX98090=y CONFIG_SND_SOC_MAX98357A=y CONFIG_SND_SOC_MAX98504=y CONFIG_SND_SOC_MAX9867=y CONFIG_SND_SOC_MAX98927=y CONFIG_SND_SOC_MAX98520=y CONFIG_SND_SOC_MAX98363=y CONFIG_SND_SOC_MAX98373=y CONFIG_SND_SOC_MAX98373_I2C=y CONFIG_SND_SOC_MAX98373_SDW=y CONFIG_SND_SOC_MAX98390=y CONFIG_SND_SOC_MAX98396=y CONFIG_SND_SOC_MAX9860=y CONFIG_SND_SOC_MSM8916_WCD_ANALOG=y CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=y CONFIG_SND_SOC_PCM1681=y CONFIG_SND_SOC_PCM1789=y CONFIG_SND_SOC_PCM1789_I2C=y CONFIG_SND_SOC_PCM179X=y CONFIG_SND_SOC_PCM179X_I2C=y CONFIG_SND_SOC_PCM179X_SPI=y CONFIG_SND_SOC_PCM186X=y CONFIG_SND_SOC_PCM186X_I2C=y CONFIG_SND_SOC_PCM186X_SPI=y CONFIG_SND_SOC_PCM3060=y CONFIG_SND_SOC_PCM3060_I2C=y CONFIG_SND_SOC_PCM3060_SPI=y CONFIG_SND_SOC_PCM3168A=y CONFIG_SND_SOC_PCM3168A_I2C=y CONFIG_SND_SOC_PCM3168A_SPI=y CONFIG_SND_SOC_PCM5102A=y CONFIG_SND_SOC_PCM512x=y CONFIG_SND_SOC_PCM512x_I2C=y CONFIG_SND_SOC_PCM512x_SPI=y CONFIG_SND_SOC_PEB2466=y CONFIG_SND_SOC_RK3328=y CONFIG_SND_SOC_RL6231=y CONFIG_SND_SOC_RL6347A=y CONFIG_SND_SOC_RT274=y CONFIG_SND_SOC_RT286=y CONFIG_SND_SOC_RT298=y CONFIG_SND_SOC_RT1011=y CONFIG_SND_SOC_RT1015=y CONFIG_SND_SOC_RT1015P=y CONFIG_SND_SOC_RT1308=y CONFIG_SND_SOC_RT1308_SDW=y CONFIG_SND_SOC_RT1316_SDW=y CONFIG_SND_SOC_RT1318_SDW=y CONFIG_SND_SOC_RT5514=y CONFIG_SND_SOC_RT5514_SPI=y CONFIG_SND_SOC_RT5616=y CONFIG_SND_SOC_RT5631=y CONFIG_SND_SOC_RT5640=y CONFIG_SND_SOC_RT5645=y CONFIG_SND_SOC_RT5651=y CONFIG_SND_SOC_RT5659=y CONFIG_SND_SOC_RT5660=y CONFIG_SND_SOC_RT5663=y CONFIG_SND_SOC_RT5670=y CONFIG_SND_SOC_RT5677=y CONFIG_SND_SOC_RT5677_SPI=y CONFIG_SND_SOC_RT5682=y CONFIG_SND_SOC_RT5682_I2C=y CONFIG_SND_SOC_RT5682_SDW=y CONFIG_SND_SOC_RT5682S=y CONFIG_SND_SOC_RT700=y CONFIG_SND_SOC_RT700_SDW=y CONFIG_SND_SOC_RT711=y CONFIG_SND_SOC_RT711_SDW=y CONFIG_SND_SOC_RT711_SDCA_SDW=y CONFIG_SND_SOC_RT712_SDCA_SDW=y CONFIG_SND_SOC_RT712_SDCA_DMIC_SDW=y CONFIG_SND_SOC_RT715=y CONFIG_SND_SOC_RT715_SDW=y CONFIG_SND_SOC_RT715_SDCA_SDW=y CONFIG_SND_SOC_RT9120=y CONFIG_SND_SOC_SDW_MOCKUP=y CONFIG_SND_SOC_SGTL5000=y CONFIG_SND_SOC_SI476X=y CONFIG_SND_SOC_SIGMADSP=y CONFIG_SND_SOC_SIGMADSP_I2C=y CONFIG_SND_SOC_SIGMADSP_REGMAP=y CONFIG_SND_SOC_SIMPLE_AMPLIFIER=y CONFIG_SND_SOC_SIMPLE_MUX=y CONFIG_SND_SOC_SMA1303=y CONFIG_SND_SOC_SPDIF=y CONFIG_SND_SOC_SRC4XXX_I2C=y CONFIG_SND_SOC_SRC4XXX=y CONFIG_SND_SOC_SSM2305=y CONFIG_SND_SOC_SSM2518=y CONFIG_SND_SOC_SSM2602=y CONFIG_SND_SOC_SSM2602_SPI=y CONFIG_SND_SOC_SSM2602_I2C=y CONFIG_SND_SOC_SSM4567=y CONFIG_SND_SOC_STA32X=y CONFIG_SND_SOC_STA350=y CONFIG_SND_SOC_STI_SAS=y CONFIG_SND_SOC_TAS2552=y CONFIG_SND_SOC_TAS2562=y CONFIG_SND_SOC_TAS2764=y CONFIG_SND_SOC_TAS2770=y CONFIG_SND_SOC_TAS2780=y CONFIG_SND_SOC_TAS5086=y CONFIG_SND_SOC_TAS571X=y CONFIG_SND_SOC_TAS5720=y CONFIG_SND_SOC_TAS5805M=y CONFIG_SND_SOC_TAS6424=y CONFIG_SND_SOC_TDA7419=y CONFIG_SND_SOC_TFA9879=y CONFIG_SND_SOC_TFA989X=y CONFIG_SND_SOC_TLV320ADC3XXX=y CONFIG_SND_SOC_TLV320AIC23=y CONFIG_SND_SOC_TLV320AIC23_I2C=y CONFIG_SND_SOC_TLV320AIC23_SPI=y CONFIG_SND_SOC_TLV320AIC31XX=y CONFIG_SND_SOC_TLV320AIC32X4=y CONFIG_SND_SOC_TLV320AIC32X4_I2C=y CONFIG_SND_SOC_TLV320AIC32X4_SPI=y CONFIG_SND_SOC_TLV320AIC3X=y CONFIG_SND_SOC_TLV320AIC3X_I2C=y CONFIG_SND_SOC_TLV320AIC3X_SPI=y CONFIG_SND_SOC_TLV320ADCX140=y CONFIG_SND_SOC_TS3A227E=y CONFIG_SND_SOC_TSCS42XX=y CONFIG_SND_SOC_TSCS454=y CONFIG_SND_SOC_UDA1334=y CONFIG_SND_SOC_WCD9335=y CONFIG_SND_SOC_WCD_MBHC=y CONFIG_SND_SOC_WCD934X=y CONFIG_SND_SOC_WCD938X=y CONFIG_SND_SOC_WCD938X_SDW=y CONFIG_SND_SOC_WM5102=y CONFIG_SND_SOC_WM8510=y CONFIG_SND_SOC_WM8523=y CONFIG_SND_SOC_WM8524=y CONFIG_SND_SOC_WM8580=y CONFIG_SND_SOC_WM8711=y CONFIG_SND_SOC_WM8728=y CONFIG_SND_SOC_WM8731=y CONFIG_SND_SOC_WM8731_I2C=y CONFIG_SND_SOC_WM8731_SPI=y CONFIG_SND_SOC_WM8737=y CONFIG_SND_SOC_WM8741=y CONFIG_SND_SOC_WM8750=y CONFIG_SND_SOC_WM8753=y CONFIG_SND_SOC_WM8770=y CONFIG_SND_SOC_WM8776=y CONFIG_SND_SOC_WM8782=y CONFIG_SND_SOC_WM8804=y CONFIG_SND_SOC_WM8804_I2C=y CONFIG_SND_SOC_WM8804_SPI=y CONFIG_SND_SOC_WM8903=y CONFIG_SND_SOC_WM8904=y CONFIG_SND_SOC_WM8940=y CONFIG_SND_SOC_WM8960=y CONFIG_SND_SOC_WM8961=y CONFIG_SND_SOC_WM8962=y CONFIG_SND_SOC_WM8974=y CONFIG_SND_SOC_WM8978=y CONFIG_SND_SOC_WM8985=y CONFIG_SND_SOC_WSA881X=y CONFIG_SND_SOC_WSA883X=y CONFIG_SND_SOC_ZL38060=y CONFIG_SND_SOC_MAX9759=y CONFIG_SND_SOC_MT6351=y CONFIG_SND_SOC_MT6358=y CONFIG_SND_SOC_MT6660=y CONFIG_SND_SOC_NAU8315=y CONFIG_SND_SOC_NAU8540=y CONFIG_SND_SOC_NAU8810=y CONFIG_SND_SOC_NAU8821=y CONFIG_SND_SOC_NAU8822=y CONFIG_SND_SOC_NAU8824=y CONFIG_SND_SOC_NAU8825=y CONFIG_SND_SOC_TPA6130A2=y CONFIG_SND_SOC_LPASS_MACRO_COMMON=y CONFIG_SND_SOC_LPASS_WSA_MACRO=y CONFIG_SND_SOC_LPASS_VA_MACRO=y CONFIG_SND_SOC_LPASS_RX_MACRO=y CONFIG_SND_SOC_LPASS_TX_MACRO=y # end of CODEC drivers CONFIG_SND_SIMPLE_CARD_UTILS=y CONFIG_SND_SIMPLE_CARD=y CONFIG_SND_AUDIO_GRAPH_CARD=y CONFIG_SND_AUDIO_GRAPH_CARD2=y CONFIG_SND_AUDIO_GRAPH_CARD2_CUSTOM_SAMPLE=y # CONFIG_SND_TEST_COMPONENT is not set CONFIG_SND_X86=y CONFIG_HDMI_LPE_AUDIO=y CONFIG_SND_SYNTH_EMUX=y CONFIG_SND_VIRTIO=y CONFIG_AC97_BUS=y CONFIG_HID_SUPPORT=y CONFIG_HID=y CONFIG_HID_BATTERY_STRENGTH=y CONFIG_HIDRAW=y CONFIG_UHID=y CONFIG_HID_GENERIC=y # # Special HID drivers # CONFIG_HID_A4TECH=y CONFIG_HID_ACCUTOUCH=y CONFIG_HID_ACRUX=y CONFIG_HID_ACRUX_FF=y CONFIG_HID_APPLE=y CONFIG_HID_APPLEIR=y CONFIG_HID_ASUS=y CONFIG_HID_AUREAL=y CONFIG_HID_BELKIN=y CONFIG_HID_BETOP_FF=y CONFIG_HID_BIGBEN_FF=y CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y CONFIG_HID_CORSAIR=y CONFIG_HID_COUGAR=y CONFIG_HID_MACALLY=y CONFIG_HID_PRODIKEYS=y CONFIG_HID_CMEDIA=y CONFIG_HID_CP2112=y CONFIG_HID_CREATIVE_SB0540=y CONFIG_HID_CYPRESS=y CONFIG_HID_DRAGONRISE=y CONFIG_DRAGONRISE_FF=y CONFIG_HID_EMS_FF=y CONFIG_HID_ELAN=y CONFIG_HID_ELECOM=y CONFIG_HID_ELO=y CONFIG_HID_EVISION=y CONFIG_HID_EZKEY=y CONFIG_HID_FT260=y CONFIG_HID_GEMBIRD=y CONFIG_HID_GFRM=y CONFIG_HID_GLORIOUS=y CONFIG_HID_HOLTEK=y CONFIG_HOLTEK_FF=y CONFIG_HID_VIVALDI_COMMON=y CONFIG_HID_GOOGLE_HAMMER=y CONFIG_HID_VIVALDI=y CONFIG_HID_GT683R=y CONFIG_HID_KEYTOUCH=y CONFIG_HID_KYE=y CONFIG_HID_UCLOGIC=y CONFIG_HID_WALTOP=y CONFIG_HID_VIEWSONIC=y CONFIG_HID_VRC2=y CONFIG_HID_XIAOMI=y CONFIG_HID_GYRATION=y CONFIG_HID_ICADE=y CONFIG_HID_ITE=y CONFIG_HID_JABRA=y CONFIG_HID_TWINHAN=y CONFIG_HID_KENSINGTON=y CONFIG_HID_LCPOWER=y CONFIG_HID_LED=y CONFIG_HID_LENOVO=y CONFIG_HID_LETSKETCH=y CONFIG_HID_LOGITECH=y CONFIG_HID_LOGITECH_DJ=y CONFIG_HID_LOGITECH_HIDPP=y CONFIG_LOGITECH_FF=y CONFIG_LOGIRUMBLEPAD2_FF=y CONFIG_LOGIG940_FF=y CONFIG_LOGIWHEELS_FF=y CONFIG_HID_MAGICMOUSE=y CONFIG_HID_MALTRON=y CONFIG_HID_MAYFLASH=y CONFIG_HID_MEGAWORLD_FF=y CONFIG_HID_REDRAGON=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y CONFIG_HID_MULTITOUCH=y CONFIG_HID_NINTENDO=y CONFIG_NINTENDO_FF=y CONFIG_HID_NTI=y CONFIG_HID_NTRIG=y CONFIG_HID_ORTEK=y CONFIG_HID_PANTHERLORD=y CONFIG_PANTHERLORD_FF=y CONFIG_HID_PENMOUNT=y CONFIG_HID_PETALYNX=y CONFIG_HID_PICOLCD=y CONFIG_HID_PICOLCD_FB=y CONFIG_HID_PICOLCD_BACKLIGHT=y CONFIG_HID_PICOLCD_LCD=y CONFIG_HID_PICOLCD_LEDS=y CONFIG_HID_PICOLCD_CIR=y CONFIG_HID_PLANTRONICS=y CONFIG_HID_PLAYSTATION=y CONFIG_PLAYSTATION_FF=y CONFIG_HID_PXRC=y CONFIG_HID_RAZER=y CONFIG_HID_PRIMAX=y CONFIG_HID_RETRODE=y CONFIG_HID_ROCCAT=y CONFIG_HID_SAITEK=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SEMITEK=y CONFIG_HID_SIGMAMICRO=y CONFIG_HID_SONY=y CONFIG_SONY_FF=y CONFIG_HID_SPEEDLINK=y CONFIG_HID_STEAM=y CONFIG_STEAM_FF=y CONFIG_HID_STEELSERIES=y CONFIG_HID_SUNPLUS=y CONFIG_HID_RMI=y CONFIG_HID_GREENASIA=y CONFIG_GREENASIA_FF=y CONFIG_HID_HYPERV_MOUSE=y CONFIG_HID_SMARTJOYPLUS=y CONFIG_SMARTJOYPLUS_FF=y CONFIG_HID_TIVO=y CONFIG_HID_TOPSEED=y CONFIG_HID_TOPRE=y CONFIG_HID_THINGM=y CONFIG_HID_THRUSTMASTER=y CONFIG_THRUSTMASTER_FF=y CONFIG_HID_UDRAW_PS3=y CONFIG_HID_U2FZERO=y CONFIG_HID_WACOM=y CONFIG_HID_WIIMOTE=y CONFIG_HID_XINMO=y CONFIG_HID_ZEROPLUS=y CONFIG_ZEROPLUS_FF=y CONFIG_HID_ZYDACRON=y CONFIG_HID_SENSOR_HUB=y CONFIG_HID_SENSOR_CUSTOM_SENSOR=y CONFIG_HID_ALPS=y CONFIG_HID_MCP2221=y # end of Special HID drivers # # HID-BPF support # CONFIG_HID_BPF=y # end of HID-BPF support # # USB HID support # CONFIG_USB_HID=y CONFIG_HID_PID=y CONFIG_USB_HIDDEV=y # end of USB HID support CONFIG_I2C_HID=y CONFIG_I2C_HID_ACPI=y CONFIG_I2C_HID_OF=y CONFIG_I2C_HID_OF_ELAN=y CONFIG_I2C_HID_OF_GOODIX=y CONFIG_I2C_HID_CORE=y # # Surface System Aggregator Module HID support # CONFIG_SURFACE_HID=y CONFIG_SURFACE_KBD=y # end of Surface System Aggregator Module HID support CONFIG_SURFACE_HID_CORE=y CONFIG_USB_OHCI_LITTLE_ENDIAN=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y CONFIG_USB_LED_TRIG=y CONFIG_USB_ULPI_BUS=y CONFIG_USB_CONN_GPIO=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options # CONFIG_USB_DEFAULT_PERSIST=y CONFIG_USB_FEW_INIT_RETRIES=y CONFIG_USB_DYNAMIC_MINORS=y CONFIG_USB_OTG=y CONFIG_USB_OTG_PRODUCTLIST=y CONFIG_USB_OTG_DISABLE_EXTERNAL_HUB=y CONFIG_USB_OTG_FSM=y CONFIG_USB_LEDS_TRIGGER_USBPORT=y CONFIG_USB_AUTOSUSPEND_DELAY=2 CONFIG_USB_MON=y # # USB Host Controller Drivers # CONFIG_USB_C67X00_HCD=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DBGCAP=y CONFIG_USB_XHCI_PCI=y CONFIG_USB_XHCI_PCI_RENESAS=y CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_PCI=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_OXU210HP_HCD=y CONFIG_USB_ISP116X_HCD=y CONFIG_USB_MAX3421_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PCI=y CONFIG_USB_OHCI_HCD_SSB=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_UHCI_HCD=y CONFIG_USB_SL811_HCD=y CONFIG_USB_SL811_HCD_ISO=y CONFIG_USB_SL811_CS=y CONFIG_USB_R8A66597_HCD=y CONFIG_USB_HCD_BCMA=y CONFIG_USB_HCD_SSB=y # CONFIG_USB_HCD_TEST_MODE is not set # # USB Device Class drivers # CONFIG_USB_ACM=y CONFIG_USB_PRINTER=y CONFIG_USB_WDM=y CONFIG_USB_TMC=y # # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may # # # also be needed; see USB_STORAGE Help for more info # CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE_DEBUG=y CONFIG_USB_STORAGE_REALTEK=y CONFIG_REALTEK_AUTOPM=y CONFIG_USB_STORAGE_DATAFAB=y CONFIG_USB_STORAGE_FREECOM=y CONFIG_USB_STORAGE_ISD200=y CONFIG_USB_STORAGE_USBAT=y CONFIG_USB_STORAGE_SDDR09=y CONFIG_USB_STORAGE_SDDR55=y CONFIG_USB_STORAGE_JUMPSHOT=y CONFIG_USB_STORAGE_ALAUDA=y CONFIG_USB_STORAGE_ONETOUCH=y CONFIG_USB_STORAGE_KARMA=y CONFIG_USB_STORAGE_CYPRESS_ATACB=y CONFIG_USB_STORAGE_ENE_UB6250=y CONFIG_USB_UAS=y # # USB Imaging devices # CONFIG_USB_MDC800=y CONFIG_USB_MICROTEK=y CONFIG_USBIP_CORE=y CONFIG_USBIP_VHCI_HCD=y CONFIG_USBIP_VHCI_HC_PORTS=8 CONFIG_USBIP_VHCI_NR_HCS=1 CONFIG_USBIP_HOST=y CONFIG_USBIP_VUDC=y CONFIG_USBIP_DEBUG=y # # USB dual-mode controller drivers # CONFIG_USB_CDNS_SUPPORT=y CONFIG_USB_CDNS_HOST=y CONFIG_USB_CDNS3=y CONFIG_USB_CDNS3_GADGET=y CONFIG_USB_CDNS3_HOST=y CONFIG_USB_CDNS3_PCI_WRAP=y CONFIG_USB_CDNSP_PCI=y CONFIG_USB_CDNSP_GADGET=y CONFIG_USB_CDNSP_HOST=y CONFIG_USB_MUSB_HDRC=y # CONFIG_USB_MUSB_HOST is not set # CONFIG_USB_MUSB_GADGET is not set CONFIG_USB_MUSB_DUAL_ROLE=y # # Platform Glue Layer # # # MUSB DMA mode # CONFIG_MUSB_PIO_ONLY=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_ULPI=y # CONFIG_USB_DWC3_HOST is not set # CONFIG_USB_DWC3_GADGET is not set CONFIG_USB_DWC3_DUAL_ROLE=y # # Platform Glue Driver Support # CONFIG_USB_DWC3_PCI=y CONFIG_USB_DWC3_HAPS=y CONFIG_USB_DWC3_OF_SIMPLE=y # CONFIG_USB_DWC2 is not set CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_MSM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760_HCD=y CONFIG_USB_ISP1761_UDC=y # CONFIG_USB_ISP1760_HOST_ROLE is not set # CONFIG_USB_ISP1760_GADGET_ROLE is not set CONFIG_USB_ISP1760_DUAL_ROLE=y # # USB port drivers # CONFIG_USB_SERIAL=y CONFIG_USB_SERIAL_CONSOLE=y CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_SIMPLE=y CONFIG_USB_SERIAL_AIRCABLE=y CONFIG_USB_SERIAL_ARK3116=y CONFIG_USB_SERIAL_BELKIN=y CONFIG_USB_SERIAL_CH341=y CONFIG_USB_SERIAL_WHITEHEAT=y CONFIG_USB_SERIAL_DIGI_ACCELEPORT=y CONFIG_USB_SERIAL_CP210X=y CONFIG_USB_SERIAL_CYPRESS_M8=y CONFIG_USB_SERIAL_EMPEG=y CONFIG_USB_SERIAL_FTDI_SIO=y CONFIG_USB_SERIAL_VISOR=y CONFIG_USB_SERIAL_IPAQ=y CONFIG_USB_SERIAL_IR=y CONFIG_USB_SERIAL_EDGEPORT=y CONFIG_USB_SERIAL_EDGEPORT_TI=y CONFIG_USB_SERIAL_F81232=y CONFIG_USB_SERIAL_F8153X=y CONFIG_USB_SERIAL_GARMIN=y CONFIG_USB_SERIAL_IPW=y CONFIG_USB_SERIAL_IUU=y CONFIG_USB_SERIAL_KEYSPAN_PDA=y CONFIG_USB_SERIAL_KEYSPAN=y CONFIG_USB_SERIAL_KLSI=y CONFIG_USB_SERIAL_KOBIL_SCT=y CONFIG_USB_SERIAL_MCT_U232=y CONFIG_USB_SERIAL_METRO=y CONFIG_USB_SERIAL_MOS7720=y CONFIG_USB_SERIAL_MOS7715_PARPORT=y CONFIG_USB_SERIAL_MOS7840=y CONFIG_USB_SERIAL_MXUPORT=y CONFIG_USB_SERIAL_NAVMAN=y CONFIG_USB_SERIAL_PL2303=y CONFIG_USB_SERIAL_OTI6858=y CONFIG_USB_SERIAL_QCAUX=y CONFIG_USB_SERIAL_QUALCOMM=y CONFIG_USB_SERIAL_SPCP8X5=y CONFIG_USB_SERIAL_SAFE=y CONFIG_USB_SERIAL_SAFE_PADDED=y CONFIG_USB_SERIAL_SIERRAWIRELESS=y CONFIG_USB_SERIAL_SYMBOL=y CONFIG_USB_SERIAL_TI=y CONFIG_USB_SERIAL_CYBERJACK=y CONFIG_USB_SERIAL_WWAN=y CONFIG_USB_SERIAL_OPTION=y CONFIG_USB_SERIAL_OMNINET=y CONFIG_USB_SERIAL_OPTICON=y CONFIG_USB_SERIAL_XSENS_MT=y CONFIG_USB_SERIAL_WISHBONE=y CONFIG_USB_SERIAL_SSU100=y CONFIG_USB_SERIAL_QT2=y CONFIG_USB_SERIAL_UPD78F0730=y CONFIG_USB_SERIAL_XR=y CONFIG_USB_SERIAL_DEBUG=y # # USB Miscellaneous drivers # CONFIG_USB_USS720=y CONFIG_USB_EMI62=y CONFIG_USB_EMI26=y CONFIG_USB_ADUTUX=y CONFIG_USB_SEVSEG=y CONFIG_USB_LEGOTOWER=y CONFIG_USB_LCD=y CONFIG_USB_CYPRESS_CY7C63=y CONFIG_USB_CYTHERM=y CONFIG_USB_IDMOUSE=y CONFIG_USB_APPLEDISPLAY=y CONFIG_APPLE_MFI_FASTCHARGE=y CONFIG_USB_SISUSBVGA=y CONFIG_USB_LD=y CONFIG_USB_TRANCEVIBRATOR=y CONFIG_USB_IOWARRIOR=y # CONFIG_USB_TEST is not set # CONFIG_USB_EHSET_TEST_FIXTURE is not set CONFIG_USB_ISIGHTFW=y CONFIG_USB_YUREX=y CONFIG_USB_EZUSB_FX2=y CONFIG_USB_HUB_USB251XB=y CONFIG_USB_HSIC_USB3503=y CONFIG_USB_HSIC_USB4604=y # CONFIG_USB_LINK_LAYER_TEST is not set CONFIG_USB_CHAOSKEY=y CONFIG_USB_ONBOARD_HUB=y CONFIG_USB_ATM=y CONFIG_USB_SPEEDTOUCH=y CONFIG_USB_CXACRU=y CONFIG_USB_UEAGLEATM=y CONFIG_USB_XUSBATM=y # # USB Physical Layer drivers # CONFIG_USB_PHY=y CONFIG_NOP_USB_XCEIV=y CONFIG_TAHVO_USB=y CONFIG_TAHVO_USB_HOST_BY_DEFAULT=y CONFIG_USB_ISP1301=y CONFIG_RTK_USB2PHY=y CONFIG_RTK_USB3PHY=y # end of USB Physical Layer drivers CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DEBUG=y CONFIG_USB_GADGET_VERBOSE=y CONFIG_USB_GADGET_DEBUG_FILES=y CONFIG_USB_GADGET_DEBUG_FS=y CONFIG_USB_GADGET_VBUS_DRAW=2 CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 CONFIG_U_SERIAL_CONSOLE=y # # USB Peripheral Controller # CONFIG_USB_FUSB300=y CONFIG_USB_GR_UDC=y CONFIG_USB_R8A66597=y CONFIG_USB_PXA27X=y CONFIG_USB_MV_UDC=y CONFIG_USB_MV_U3D=y CONFIG_USB_SNP_CORE=y CONFIG_USB_SNP_UDC_PLAT=y CONFIG_USB_M66592=y CONFIG_USB_BDC_UDC=y # CONFIG_USB_AMD5536UDC is not set CONFIG_USB_NET2272=y CONFIG_USB_NET2272_DMA=y CONFIG_USB_NET2280=y CONFIG_USB_GOKU=y CONFIG_USB_EG20T=y CONFIG_USB_GADGET_XILINX=y CONFIG_USB_MAX3420_UDC=y CONFIG_USB_DUMMY_HCD=y # end of USB Peripheral Controller CONFIG_USB_LIBCOMPOSITE=y CONFIG_USB_F_ACM=y CONFIG_USB_F_SS_LB=y CONFIG_USB_U_SERIAL=y CONFIG_USB_U_ETHER=y CONFIG_USB_U_AUDIO=y CONFIG_USB_F_SERIAL=y CONFIG_USB_F_OBEX=y CONFIG_USB_F_NCM=y CONFIG_USB_F_ECM=y CONFIG_USB_F_PHONET=y CONFIG_USB_F_EEM=y CONFIG_USB_F_SUBSET=y CONFIG_USB_F_RNDIS=y CONFIG_USB_F_MASS_STORAGE=y CONFIG_USB_F_FS=y CONFIG_USB_F_UAC1=y CONFIG_USB_F_UAC1_LEGACY=y CONFIG_USB_F_UAC2=y CONFIG_USB_F_UVC=y CONFIG_USB_F_MIDI=y CONFIG_USB_F_HID=y CONFIG_USB_F_PRINTER=y CONFIG_USB_F_TCM=y CONFIG_USB_CONFIGFS=y CONFIG_USB_CONFIGFS_SERIAL=y CONFIG_USB_CONFIGFS_ACM=y CONFIG_USB_CONFIGFS_OBEX=y CONFIG_USB_CONFIGFS_NCM=y CONFIG_USB_CONFIGFS_ECM=y CONFIG_USB_CONFIGFS_ECM_SUBSET=y CONFIG_USB_CONFIGFS_RNDIS=y CONFIG_USB_CONFIGFS_EEM=y CONFIG_USB_CONFIGFS_PHONET=y CONFIG_USB_CONFIGFS_MASS_STORAGE=y CONFIG_USB_CONFIGFS_F_LB_SS=y CONFIG_USB_CONFIGFS_F_FS=y CONFIG_USB_CONFIGFS_F_UAC1=y CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y CONFIG_USB_CONFIGFS_F_UAC2=y CONFIG_USB_CONFIGFS_F_MIDI=y CONFIG_USB_CONFIGFS_F_HID=y CONFIG_USB_CONFIGFS_F_UVC=y CONFIG_USB_CONFIGFS_F_PRINTER=y CONFIG_USB_CONFIGFS_F_TCM=y # # USB Gadget precomposed configurations # CONFIG_USB_ZERO=y CONFIG_USB_ZERO_HNPTEST=y CONFIG_USB_AUDIO=y CONFIG_GADGET_UAC1=y CONFIG_GADGET_UAC1_LEGACY=y CONFIG_USB_ETH=y CONFIG_USB_ETH_RNDIS=y CONFIG_USB_ETH_EEM=y CONFIG_USB_G_NCM=y CONFIG_USB_GADGETFS=y CONFIG_USB_FUNCTIONFS=y CONFIG_USB_FUNCTIONFS_ETH=y CONFIG_USB_FUNCTIONFS_RNDIS=y CONFIG_USB_FUNCTIONFS_GENERIC=y CONFIG_USB_MASS_STORAGE=y CONFIG_USB_GADGET_TARGET=y CONFIG_USB_G_SERIAL=y CONFIG_USB_MIDI_GADGET=y CONFIG_USB_G_PRINTER=y CONFIG_USB_CDC_COMPOSITE=y CONFIG_USB_G_NOKIA=y CONFIG_USB_G_ACM_MS=y CONFIG_USB_G_MULTI=y CONFIG_USB_G_MULTI_RNDIS=y CONFIG_USB_G_MULTI_CDC=y CONFIG_USB_G_HID=y CONFIG_USB_G_DBGP=y # CONFIG_USB_G_DBGP_PRINTK is not set CONFIG_USB_G_DBGP_SERIAL=y # CONFIG_USB_G_WEBCAM is not set CONFIG_USB_RAW_GADGET=y # end of USB Gadget precomposed configurations CONFIG_TYPEC=y CONFIG_TYPEC_TCPM=y CONFIG_TYPEC_TCPCI=y CONFIG_TYPEC_RT1711H=y CONFIG_TYPEC_MT6360=y CONFIG_TYPEC_TCPCI_MT6370=y CONFIG_TYPEC_TCPCI_MAXIM=y CONFIG_TYPEC_FUSB302=y CONFIG_TYPEC_WCOVE=y CONFIG_TYPEC_UCSI=y CONFIG_UCSI_CCG=y CONFIG_UCSI_ACPI=y CONFIG_UCSI_STM32G0=y CONFIG_UCSI_PMIC_GLINK=y CONFIG_TYPEC_TPS6598X=y CONFIG_TYPEC_ANX7411=y CONFIG_TYPEC_RT1719=y CONFIG_TYPEC_HD3SS3220=y CONFIG_TYPEC_STUSB160X=y CONFIG_TYPEC_WUSB3801=y # # USB Type-C Multiplexer/DeMultiplexer Switch support # CONFIG_TYPEC_MUX_FSA4480=y CONFIG_TYPEC_MUX_GPIO_SBU=y CONFIG_TYPEC_MUX_PI3USB30532=y CONFIG_TYPEC_MUX_INTEL_PMC=y # end of USB Type-C Multiplexer/DeMultiplexer Switch support # # USB Type-C Alternate Mode drivers # CONFIG_TYPEC_DP_ALTMODE=y CONFIG_TYPEC_NVIDIA_ALTMODE=y # end of USB Type-C Alternate Mode drivers CONFIG_USB_ROLE_SWITCH=y CONFIG_USB_ROLES_INTEL_XHCI=y CONFIG_MMC=y CONFIG_PWRSEQ_EMMC=y CONFIG_PWRSEQ_SD8787=y CONFIG_PWRSEQ_SIMPLE=y CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_MINORS=8 CONFIG_SDIO_UART=y # CONFIG_MMC_TEST is not set CONFIG_MMC_CRYPTO=y # # MMC/SD/SDIO Host Controller Drivers # CONFIG_MMC_DEBUG=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_IO_ACCESSORS=y CONFIG_MMC_SDHCI_PCI=y CONFIG_MMC_RICOH_MMC=y CONFIG_MMC_SDHCI_ACPI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_OF_ARASAN=y CONFIG_MMC_SDHCI_OF_AT91=y CONFIG_MMC_SDHCI_OF_DWCMSHC=y CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SDHCI_F_SDH30=y CONFIG_MMC_SDHCI_MILBEAUT=y CONFIG_MMC_WBSD=y CONFIG_MMC_ALCOR=y CONFIG_MMC_TIFM_SD=y CONFIG_MMC_SPI=y CONFIG_MMC_SDRICOH_CS=y CONFIG_MMC_CB710=y CONFIG_MMC_VIA_SDMMC=y CONFIG_MMC_VUB300=y CONFIG_MMC_USHC=y CONFIG_MMC_USDHI6ROL0=y CONFIG_MMC_REALTEK_PCI=y CONFIG_MMC_REALTEK_USB=y CONFIG_MMC_CQHCI=y CONFIG_MMC_HSQ=y CONFIG_MMC_TOSHIBA_PCI=y CONFIG_MMC_MTK=y CONFIG_MMC_SDHCI_XENON=y CONFIG_MMC_SDHCI_OMAP=y CONFIG_MMC_SDHCI_AM654=y CONFIG_MMC_SDHCI_EXTERNAL_DMA=y CONFIG_MMC_LITEX=y CONFIG_SCSI_UFSHCD=y CONFIG_SCSI_UFS_BSG=y CONFIG_SCSI_UFS_CRYPTO=y CONFIG_SCSI_UFS_HPB=y CONFIG_SCSI_UFS_FAULT_INJECTION=y CONFIG_SCSI_UFS_HWMON=y CONFIG_SCSI_UFSHCD_PCI=y CONFIG_SCSI_UFS_DWC_TC_PCI=y CONFIG_SCSI_UFSHCD_PLATFORM=y CONFIG_SCSI_UFS_CDNS_PLATFORM=y CONFIG_SCSI_UFS_DWC_TC_PLATFORM=y CONFIG_MEMSTICK=y CONFIG_MEMSTICK_DEBUG=y # # MemoryStick drivers # CONFIG_MEMSTICK_UNSAFE_RESUME=y CONFIG_MSPRO_BLOCK=y CONFIG_MS_BLOCK=y # # MemoryStick Host Controller Drivers # CONFIG_MEMSTICK_TIFM_MS=y CONFIG_MEMSTICK_JMICRON_38X=y CONFIG_MEMSTICK_R592=y CONFIG_MEMSTICK_REALTEK_PCI=y CONFIG_MEMSTICK_REALTEK_USB=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS_FLASH=y CONFIG_LEDS_CLASS_MULTICOLOR=y CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y # # LED drivers # CONFIG_LEDS_88PM860X=y CONFIG_LEDS_AN30259A=y CONFIG_LEDS_APU=y CONFIG_LEDS_AW2013=y CONFIG_LEDS_BCM6328=y CONFIG_LEDS_BCM6358=y CONFIG_LEDS_CPCAP=y CONFIG_LEDS_CR0014114=y CONFIG_LEDS_EL15203000=y CONFIG_LEDS_LM3530=y CONFIG_LEDS_LM3532=y CONFIG_LEDS_LM3533=y CONFIG_LEDS_LM3642=y CONFIG_LEDS_LM3692X=y CONFIG_LEDS_MT6323=y CONFIG_LEDS_NET48XX=y CONFIG_LEDS_WRAP=y CONFIG_LEDS_PCA9532=y CONFIG_LEDS_PCA9532_GPIO=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_LP3944=y CONFIG_LEDS_LP3952=y CONFIG_LEDS_LP50XX=y CONFIG_LEDS_LP55XX_COMMON=y CONFIG_LEDS_LP5521=y CONFIG_LEDS_LP5523=y CONFIG_LEDS_LP5562=y CONFIG_LEDS_LP8501=y CONFIG_LEDS_LP8788=y CONFIG_LEDS_LP8860=y CONFIG_LEDS_PCA955X=y CONFIG_LEDS_PCA955X_GPIO=y CONFIG_LEDS_PCA963X=y CONFIG_LEDS_WM831X_STATUS=y CONFIG_LEDS_WM8350=y CONFIG_LEDS_DA903X=y CONFIG_LEDS_DA9052=y CONFIG_LEDS_DAC124S085=y CONFIG_LEDS_PWM=y CONFIG_LEDS_REGULATOR=y CONFIG_LEDS_BD2606MVV=y CONFIG_LEDS_BD2802=y CONFIG_LEDS_INTEL_SS4200=y CONFIG_LEDS_LT3593=y CONFIG_LEDS_ADP5520=y CONFIG_LEDS_MC13783=y CONFIG_LEDS_TCA6507=y CONFIG_LEDS_TLC591XX=y CONFIG_LEDS_MAX77650=y CONFIG_LEDS_MAX8997=y CONFIG_LEDS_LM355x=y CONFIG_LEDS_OT200=y CONFIG_LEDS_MENF21BMC=y CONFIG_LEDS_IS31FL319X=y CONFIG_LEDS_IS31FL32XX=y # # LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM) # CONFIG_LEDS_BLINKM=y CONFIG_LEDS_SYSCON=y CONFIG_LEDS_MLXCPLD=y CONFIG_LEDS_MLXREG=y CONFIG_LEDS_USER=y CONFIG_LEDS_NIC78BX=y CONFIG_LEDS_SPI_BYTE=y CONFIG_LEDS_TI_LMU_COMMON=y CONFIG_LEDS_LM3697=y CONFIG_LEDS_LM36274=y CONFIG_LEDS_TPS6105X=y CONFIG_LEDS_LGM=y # # Flash and Torch LED drivers # CONFIG_LEDS_AAT1290=y CONFIG_LEDS_AS3645A=y CONFIG_LEDS_KTD2692=y CONFIG_LEDS_LM3601X=y CONFIG_LEDS_MAX77693=y CONFIG_LEDS_MT6360=y CONFIG_LEDS_MT6370_FLASH=y CONFIG_LEDS_RT4505=y CONFIG_LEDS_RT8515=y CONFIG_LEDS_SGM3140=y # # RGB LED drivers # CONFIG_LEDS_PWM_MULTICOLOR=y CONFIG_LEDS_QCOM_LPG=y CONFIG_LEDS_MT6370_RGB=y # # LED Triggers # CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_ONESHOT=y CONFIG_LEDS_TRIGGER_DISK=y CONFIG_LEDS_TRIGGER_MTD=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_BACKLIGHT=y CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_ACTIVITY=y CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # # iptables trigger is under Netfilter config (LED target) # CONFIG_LEDS_TRIGGER_TRANSIENT=y CONFIG_LEDS_TRIGGER_CAMERA=y CONFIG_LEDS_TRIGGER_PANIC=y CONFIG_LEDS_TRIGGER_NETDEV=y CONFIG_LEDS_TRIGGER_PATTERN=y CONFIG_LEDS_TRIGGER_AUDIO=y CONFIG_LEDS_TRIGGER_TTY=y # # Simple LED drivers # CONFIG_LEDS_SIEMENS_SIMATIC_IPC=y CONFIG_ACCESSIBILITY=y CONFIG_A11Y_BRAILLE_CONSOLE=y # # Speakup console speech # CONFIG_SPEAKUP=y CONFIG_SPEAKUP_SERIALIO=y CONFIG_SPEAKUP_SYNTH_ACNTSA=y CONFIG_SPEAKUP_SYNTH_ACNTPC=y CONFIG_SPEAKUP_SYNTH_APOLLO=y CONFIG_SPEAKUP_SYNTH_AUDPTR=y CONFIG_SPEAKUP_SYNTH_BNS=y CONFIG_SPEAKUP_SYNTH_DECTLK=y CONFIG_SPEAKUP_SYNTH_DECEXT=y CONFIG_SPEAKUP_SYNTH_DECPC=m CONFIG_SPEAKUP_SYNTH_DTLK=y CONFIG_SPEAKUP_SYNTH_KEYPC=y CONFIG_SPEAKUP_SYNTH_LTLK=y CONFIG_SPEAKUP_SYNTH_SOFT=y CONFIG_SPEAKUP_SYNTH_SPKOUT=y CONFIG_SPEAKUP_SYNTH_TXPRT=y CONFIG_SPEAKUP_SYNTH_DUMMY=y # end of Speakup console speech CONFIG_INFINIBAND=y CONFIG_INFINIBAND_USER_MAD=y CONFIG_INFINIBAND_USER_ACCESS=y CONFIG_INFINIBAND_USER_MEM=y CONFIG_INFINIBAND_ON_DEMAND_PAGING=y CONFIG_INFINIBAND_ADDR_TRANS=y CONFIG_INFINIBAND_ADDR_TRANS_CONFIGFS=y CONFIG_INFINIBAND_CXGB4=y CONFIG_INFINIBAND_IRDMA=y CONFIG_MLX4_INFINIBAND=y CONFIG_MLX5_INFINIBAND=y CONFIG_INFINIBAND_MTHCA=y CONFIG_INFINIBAND_MTHCA_DEBUG=y CONFIG_INFINIBAND_OCRDMA=y CONFIG_INFINIBAND_USNIC=y CONFIG_INFINIBAND_VMWARE_PVRDMA=y CONFIG_INFINIBAND_IPOIB=y CONFIG_INFINIBAND_IPOIB_CM=y CONFIG_INFINIBAND_IPOIB_DEBUG=y CONFIG_INFINIBAND_IPOIB_DEBUG_DATA=y CONFIG_INFINIBAND_SRP=y CONFIG_INFINIBAND_SRPT=y CONFIG_INFINIBAND_ISER=y CONFIG_INFINIBAND_ISERT=y CONFIG_INFINIBAND_RTRS=y CONFIG_INFINIBAND_RTRS_CLIENT=y CONFIG_INFINIBAND_RTRS_SERVER=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y CONFIG_EDAC_DEBUG=y CONFIG_EDAC_GHES=y # CONFIG_EDAC_AMD76X is not set CONFIG_EDAC_E7XXX=y CONFIG_EDAC_E752X=y CONFIG_EDAC_I82875P=y CONFIG_EDAC_I82975X=y CONFIG_EDAC_I3000=y CONFIG_EDAC_I3200=y CONFIG_EDAC_IE31200=y CONFIG_EDAC_X38=y CONFIG_EDAC_I5400=y CONFIG_EDAC_I7CORE=y CONFIG_EDAC_I82860=y CONFIG_EDAC_R82600=y CONFIG_EDAC_I5100=y CONFIG_EDAC_I7300=y CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y CONFIG_RTC_HCTOSYS_DEVICE="rtc0" CONFIG_RTC_SYSTOHC=y CONFIG_RTC_SYSTOHC_DEVICE="rtc0" CONFIG_RTC_DEBUG=y CONFIG_RTC_NVMEM=y # # RTC interfaces # CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y CONFIG_RTC_INTF_DEV_UIE_EMUL=y # CONFIG_RTC_DRV_TEST is not set # # I2C RTC drivers # CONFIG_RTC_DRV_88PM860X=y CONFIG_RTC_DRV_88PM80X=y CONFIG_RTC_DRV_ABB5ZES3=y CONFIG_RTC_DRV_ABEOZ9=y CONFIG_RTC_DRV_ABX80X=y CONFIG_RTC_DRV_AS3722=y CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_DS1307_CENTURY=y CONFIG_RTC_DRV_DS1374=y CONFIG_RTC_DRV_DS1374_WDT=y CONFIG_RTC_DRV_DS1672=y CONFIG_RTC_DRV_HYM8563=y CONFIG_RTC_DRV_LP8788=y CONFIG_RTC_DRV_MAX6900=y CONFIG_RTC_DRV_MAX8907=y CONFIG_RTC_DRV_MAX8925=y CONFIG_RTC_DRV_MAX8998=y CONFIG_RTC_DRV_MAX8997=y CONFIG_RTC_DRV_MAX77686=y CONFIG_RTC_DRV_NCT3018Y=y CONFIG_RTC_DRV_RS5C372=y CONFIG_RTC_DRV_ISL1208=y CONFIG_RTC_DRV_ISL12022=y CONFIG_RTC_DRV_ISL12026=y CONFIG_RTC_DRV_X1205=y CONFIG_RTC_DRV_PCF8523=y CONFIG_RTC_DRV_PCF85063=y CONFIG_RTC_DRV_PCF85363=y CONFIG_RTC_DRV_PCF8563=y CONFIG_RTC_DRV_PCF8583=y CONFIG_RTC_DRV_M41T80=y CONFIG_RTC_DRV_M41T80_WDT=y CONFIG_RTC_DRV_BD70528=y CONFIG_RTC_DRV_BQ32K=y CONFIG_RTC_DRV_TWL4030=y CONFIG_RTC_DRV_PALMAS=y CONFIG_RTC_DRV_TPS6586X=y CONFIG_RTC_DRV_TPS65910=y CONFIG_RTC_DRV_RC5T583=y CONFIG_RTC_DRV_RC5T619=y CONFIG_RTC_DRV_S35390A=y CONFIG_RTC_DRV_FM3130=y CONFIG_RTC_DRV_RX8010=y CONFIG_RTC_DRV_RX8581=y CONFIG_RTC_DRV_RX8025=y CONFIG_RTC_DRV_EM3027=y CONFIG_RTC_DRV_RV3028=y CONFIG_RTC_DRV_RV3032=y CONFIG_RTC_DRV_RV8803=y CONFIG_RTC_DRV_S5M=y CONFIG_RTC_DRV_SD3078=y # # SPI RTC drivers # CONFIG_RTC_DRV_M41T93=y CONFIG_RTC_DRV_M41T94=y CONFIG_RTC_DRV_DS1302=y CONFIG_RTC_DRV_DS1305=y CONFIG_RTC_DRV_DS1343=y CONFIG_RTC_DRV_DS1347=y CONFIG_RTC_DRV_DS1390=y CONFIG_RTC_DRV_MAX6916=y CONFIG_RTC_DRV_R9701=y CONFIG_RTC_DRV_RX4581=y CONFIG_RTC_DRV_RS5C348=y CONFIG_RTC_DRV_MAX6902=y CONFIG_RTC_DRV_PCF2123=y CONFIG_RTC_DRV_MCP795=y CONFIG_RTC_I2C_AND_SPI=y # # SPI and I2C RTC drivers # CONFIG_RTC_DRV_DS3232=y CONFIG_RTC_DRV_DS3232_HWMON=y CONFIG_RTC_DRV_PCF2127=y CONFIG_RTC_DRV_RV3029C2=y CONFIG_RTC_DRV_RV3029_HWMON=y CONFIG_RTC_DRV_RX6110=y # # Platform RTC drivers # CONFIG_RTC_DRV_CMOS=y CONFIG_RTC_DRV_DS1286=y CONFIG_RTC_DRV_DS1511=y CONFIG_RTC_DRV_DS1553=y CONFIG_RTC_DRV_DS1685_FAMILY=y CONFIG_RTC_DRV_DS1685=y # CONFIG_RTC_DRV_DS1689 is not set # CONFIG_RTC_DRV_DS17285 is not set # CONFIG_RTC_DRV_DS17485 is not set # CONFIG_RTC_DRV_DS17885 is not set CONFIG_RTC_DRV_DS1742=y CONFIG_RTC_DRV_DS2404=y CONFIG_RTC_DRV_DA9052=y CONFIG_RTC_DRV_DA9055=y CONFIG_RTC_DRV_DA9063=y CONFIG_RTC_DRV_STK17TA8=y CONFIG_RTC_DRV_M48T86=y CONFIG_RTC_DRV_M48T35=y CONFIG_RTC_DRV_M48T59=y CONFIG_RTC_DRV_MSM6242=y CONFIG_RTC_DRV_BQ4802=y CONFIG_RTC_DRV_RP5C01=y CONFIG_RTC_DRV_WM831X=y CONFIG_RTC_DRV_WM8350=y CONFIG_RTC_DRV_PCF50633=y CONFIG_RTC_DRV_ZYNQMP=y CONFIG_RTC_DRV_CROS_EC=y CONFIG_RTC_DRV_NTXEC=y # # on-CPU RTC drivers # CONFIG_RTC_DRV_CADENCE=y CONFIG_RTC_DRV_FTRTC010=y CONFIG_RTC_DRV_PCAP=y CONFIG_RTC_DRV_MC13XXX=y CONFIG_RTC_DRV_MT6397=y CONFIG_RTC_DRV_R7301=y CONFIG_RTC_DRV_CPCAP=y # # HID Sensor RTC drivers # CONFIG_RTC_DRV_HID_SENSOR_TIME=y CONFIG_RTC_DRV_GOLDFISH=y CONFIG_RTC_DRV_WILCO_EC=y CONFIG_DMADEVICES=y CONFIG_DMADEVICES_DEBUG=y CONFIG_DMADEVICES_VDEBUG=y # # DMA Devices # CONFIG_DMA_ENGINE=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DMA_ACPI=y CONFIG_DMA_OF=y CONFIG_ALTERA_MSGDMA=y CONFIG_DW_AXI_DMAC=y CONFIG_FSL_EDMA=y CONFIG_INTEL_IDMA64=y CONFIG_PCH_DMA=y CONFIG_PLX_DMA=y CONFIG_TIMB_DMA=y CONFIG_XILINX_XDMA=y CONFIG_XILINX_ZYNQMP_DPDMA=y CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA=y CONFIG_DW_DMAC_CORE=y CONFIG_DW_DMAC=y CONFIG_DW_DMAC_PCI=y CONFIG_DW_EDMA=y CONFIG_DW_EDMA_PCIE=y CONFIG_HSU_DMA=y CONFIG_HSU_DMA_PCI=y CONFIG_SF_PDMA=y CONFIG_INTEL_LDMA=y # # DMA Clients # CONFIG_ASYNC_TX_DMA=y CONFIG_DMATEST=y CONFIG_DMA_ENGINE_RAID=y # # DMABUF options # CONFIG_SYNC_FILE=y CONFIG_SW_SYNC=y CONFIG_UDMABUF=y CONFIG_DMABUF_MOVE_NOTIFY=y CONFIG_DMABUF_DEBUG=y # CONFIG_DMABUF_SELFTESTS is not set CONFIG_DMABUF_HEAPS=y CONFIG_DMABUF_SYSFS_STATS=y CONFIG_DMABUF_HEAPS_SYSTEM=y CONFIG_DMABUF_HEAPS_CMA=y # end of DMABUF options CONFIG_AUXDISPLAY=y CONFIG_CHARLCD=y CONFIG_LINEDISP=y CONFIG_HD44780_COMMON=y CONFIG_HD44780=y CONFIG_KS0108=y CONFIG_KS0108_PORT=0x378 CONFIG_KS0108_DELAY=2 CONFIG_CFAG12864B=y CONFIG_CFAG12864B_RATE=20 CONFIG_IMG_ASCII_LCD=y CONFIG_HT16K33=y CONFIG_LCD2S=y CONFIG_PARPORT_PANEL=y CONFIG_PANEL_PARPORT=0 CONFIG_PANEL_PROFILE=5 CONFIG_PANEL_CHANGE_MESSAGE=y CONFIG_PANEL_BOOT_MESSAGE="" # CONFIG_CHARLCD_BL_OFF is not set # CONFIG_CHARLCD_BL_ON is not set CONFIG_CHARLCD_BL_FLASH=y CONFIG_PANEL=y CONFIG_UIO=y CONFIG_UIO_CIF=y CONFIG_UIO_PDRV_GENIRQ=y CONFIG_UIO_DMEM_GENIRQ=y CONFIG_UIO_AEC=y CONFIG_UIO_SERCOS3=y CONFIG_UIO_PCI_GENERIC=y CONFIG_UIO_NETX=y CONFIG_UIO_PRUSS=y CONFIG_UIO_MF624=y CONFIG_UIO_HV_GENERIC=y CONFIG_UIO_DFL=y CONFIG_VFIO=y CONFIG_VFIO_CONTAINER=y CONFIG_VFIO_IOMMU_TYPE1=y CONFIG_VFIO_NOIOMMU=y CONFIG_VFIO_VIRQFD=y CONFIG_VFIO_PCI_CORE=y CONFIG_VFIO_PCI_MMAP=y CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI=y CONFIG_VFIO_PCI_VGA=y CONFIG_VFIO_PCI_IGD=y CONFIG_MLX5_VFIO_PCI=y CONFIG_VFIO_MDEV=y CONFIG_IRQ_BYPASS_MANAGER=y CONFIG_VIRT_DRIVERS=y CONFIG_VMGENID=y CONFIG_VBOXGUEST=y CONFIG_NITRO_ENCLAVES=y CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y CONFIG_VIRTIO_PCI_LIB=y CONFIG_VIRTIO_PCI_LIB_LEGACY=y CONFIG_VIRTIO_MENU=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_PCI_LEGACY=y CONFIG_VIRTIO_VDPA=y CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y CONFIG_VIRTIO_DMA_SHARED_BUFFER=y CONFIG_VDPA=y CONFIG_VDPA_SIM=y CONFIG_VDPA_SIM_NET=y CONFIG_VDPA_SIM_BLOCK=y CONFIG_VDPA_USER=y CONFIG_IFCVF=y CONFIG_MLX5_VDPA=y CONFIG_MLX5_VDPA_NET=y CONFIG_MLX5_VDPA_STEERING_DEBUG=y CONFIG_VP_VDPA=y CONFIG_ALIBABA_ENI_VDPA=y CONFIG_SNET_VDPA=y CONFIG_VHOST_IOTLB=y CONFIG_VHOST_RING=y CONFIG_VHOST_TASK=y CONFIG_VHOST=y CONFIG_VHOST_MENU=y CONFIG_VHOST_NET=y CONFIG_VHOST_SCSI=y CONFIG_VHOST_VSOCK=y CONFIG_VHOST_VDPA=y CONFIG_VHOST_CROSS_ENDIAN_LEGACY=y # # Microsoft Hyper-V guest support # CONFIG_HYPERV=y CONFIG_HYPERV_TIMER=y CONFIG_HYPERV_UTILS=y CONFIG_HYPERV_BALLOON=y # end of Microsoft Hyper-V guest support CONFIG_GREYBUS=y CONFIG_GREYBUS_ES2=y CONFIG_COMEDI=y CONFIG_COMEDI_DEBUG=y CONFIG_COMEDI_DEFAULT_BUF_SIZE_KB=2048 CONFIG_COMEDI_DEFAULT_BUF_MAXSIZE_KB=20480 CONFIG_COMEDI_MISC_DRIVERS=y CONFIG_COMEDI_BOND=y # CONFIG_COMEDI_TEST is not set CONFIG_COMEDI_PARPORT=y CONFIG_COMEDI_SSV_DNP=y CONFIG_COMEDI_ISA_DRIVERS=y CONFIG_COMEDI_PCL711=y CONFIG_COMEDI_PCL724=y CONFIG_COMEDI_PCL726=y CONFIG_COMEDI_PCL730=y CONFIG_COMEDI_PCL812=y CONFIG_COMEDI_PCL816=y CONFIG_COMEDI_PCL818=y CONFIG_COMEDI_PCM3724=y CONFIG_COMEDI_AMPLC_DIO200_ISA=y CONFIG_COMEDI_AMPLC_PC236_ISA=y CONFIG_COMEDI_AMPLC_PC263_ISA=y CONFIG_COMEDI_RTI800=y CONFIG_COMEDI_RTI802=y CONFIG_COMEDI_DAC02=y CONFIG_COMEDI_DAS16M1=y CONFIG_COMEDI_DAS08_ISA=y CONFIG_COMEDI_DAS16=y CONFIG_COMEDI_DAS800=y CONFIG_COMEDI_DAS1800=y CONFIG_COMEDI_DAS6402=y CONFIG_COMEDI_DT2801=y CONFIG_COMEDI_DT2811=y CONFIG_COMEDI_DT2814=y CONFIG_COMEDI_DT2815=y CONFIG_COMEDI_DT2817=y CONFIG_COMEDI_DT282X=y CONFIG_COMEDI_DMM32AT=y CONFIG_COMEDI_FL512=y CONFIG_COMEDI_AIO_AIO12_8=y CONFIG_COMEDI_AIO_IIRO_16=y CONFIG_COMEDI_II_PCI20KC=y CONFIG_COMEDI_C6XDIGIO=y CONFIG_COMEDI_MPC624=y CONFIG_COMEDI_ADQ12B=y CONFIG_COMEDI_NI_AT_A2150=y CONFIG_COMEDI_NI_AT_AO=y CONFIG_COMEDI_NI_ATMIO=y CONFIG_COMEDI_NI_ATMIO16D=y CONFIG_COMEDI_NI_LABPC_ISA=y CONFIG_COMEDI_PCMAD=y CONFIG_COMEDI_PCMDA12=y CONFIG_COMEDI_PCMMIO=y CONFIG_COMEDI_PCMUIO=y CONFIG_COMEDI_MULTIQ3=y CONFIG_COMEDI_S526=y CONFIG_COMEDI_PCI_DRIVERS=y CONFIG_COMEDI_8255_PCI=y CONFIG_COMEDI_ADDI_WATCHDOG=y CONFIG_COMEDI_ADDI_APCI_1032=y CONFIG_COMEDI_ADDI_APCI_1500=y CONFIG_COMEDI_ADDI_APCI_1516=y CONFIG_COMEDI_ADDI_APCI_1564=y CONFIG_COMEDI_ADDI_APCI_16XX=y CONFIG_COMEDI_ADDI_APCI_2032=y CONFIG_COMEDI_ADDI_APCI_2200=y CONFIG_COMEDI_ADDI_APCI_3120=y CONFIG_COMEDI_ADDI_APCI_3501=y CONFIG_COMEDI_ADDI_APCI_3XXX=y CONFIG_COMEDI_ADL_PCI6208=y CONFIG_COMEDI_ADL_PCI7X3X=y CONFIG_COMEDI_ADL_PCI8164=y CONFIG_COMEDI_ADL_PCI9111=y CONFIG_COMEDI_ADL_PCI9118=y CONFIG_COMEDI_ADV_PCI1710=y CONFIG_COMEDI_ADV_PCI1720=y CONFIG_COMEDI_ADV_PCI1723=y CONFIG_COMEDI_ADV_PCI1724=y CONFIG_COMEDI_ADV_PCI1760=y CONFIG_COMEDI_ADV_PCI_DIO=y CONFIG_COMEDI_AMPLC_DIO200_PCI=y CONFIG_COMEDI_AMPLC_PC236_PCI=y CONFIG_COMEDI_AMPLC_PC263_PCI=y CONFIG_COMEDI_AMPLC_PCI224=y CONFIG_COMEDI_AMPLC_PCI230=y CONFIG_COMEDI_CONTEC_PCI_DIO=y CONFIG_COMEDI_DAS08_PCI=y CONFIG_COMEDI_DT3000=y CONFIG_COMEDI_DYNA_PCI10XX=y CONFIG_COMEDI_GSC_HPDI=y CONFIG_COMEDI_MF6X4=y CONFIG_COMEDI_ICP_MULTI=y CONFIG_COMEDI_DAQBOARD2000=y CONFIG_COMEDI_JR3_PCI=y CONFIG_COMEDI_KE_COUNTER=y CONFIG_COMEDI_CB_PCIDAS64=y CONFIG_COMEDI_CB_PCIDAS=y CONFIG_COMEDI_CB_PCIDDA=y CONFIG_COMEDI_CB_PCIMDAS=y CONFIG_COMEDI_CB_PCIMDDA=y CONFIG_COMEDI_ME4000=y CONFIG_COMEDI_ME_DAQ=y CONFIG_COMEDI_NI_6527=y CONFIG_COMEDI_NI_65XX=y CONFIG_COMEDI_NI_660X=y CONFIG_COMEDI_NI_670X=y CONFIG_COMEDI_NI_LABPC_PCI=y CONFIG_COMEDI_NI_PCIDIO=y CONFIG_COMEDI_NI_PCIMIO=y CONFIG_COMEDI_RTD520=y CONFIG_COMEDI_S626=y CONFIG_COMEDI_MITE=y CONFIG_COMEDI_NI_TIOCMD=y CONFIG_COMEDI_PCMCIA_DRIVERS=y CONFIG_COMEDI_CB_DAS16_CS=y CONFIG_COMEDI_DAS08_CS=y CONFIG_COMEDI_NI_DAQ_700_CS=y CONFIG_COMEDI_NI_DAQ_DIO24_CS=y CONFIG_COMEDI_NI_LABPC_CS=y CONFIG_COMEDI_NI_MIO_CS=y CONFIG_COMEDI_QUATECH_DAQP_CS=y CONFIG_COMEDI_USB_DRIVERS=y CONFIG_COMEDI_DT9812=y CONFIG_COMEDI_NI_USB6501=y CONFIG_COMEDI_USBDUX=y CONFIG_COMEDI_USBDUXFAST=y CONFIG_COMEDI_USBDUXSIGMA=y CONFIG_COMEDI_VMK80XX=y CONFIG_COMEDI_8254=y CONFIG_COMEDI_8255=y CONFIG_COMEDI_8255_SA=y CONFIG_COMEDI_KCOMEDILIB=y CONFIG_COMEDI_AMPLC_DIO200=y CONFIG_COMEDI_AMPLC_PC236=y CONFIG_COMEDI_DAS08=y CONFIG_COMEDI_ISADMA=y CONFIG_COMEDI_NI_LABPC=y CONFIG_COMEDI_NI_LABPC_ISADMA=y CONFIG_COMEDI_NI_TIO=y CONFIG_COMEDI_NI_ROUTING=y # CONFIG_COMEDI_TESTS is not set CONFIG_STAGING=y CONFIG_PRISM2_USB=y CONFIG_RTL8192U=m CONFIG_RTLLIB=m CONFIG_RTLLIB_CRYPTO_CCMP=m CONFIG_RTLLIB_CRYPTO_TKIP=m CONFIG_RTLLIB_CRYPTO_WEP=m CONFIG_RTL8192E=m CONFIG_RTL8723BS=m CONFIG_R8712U=y CONFIG_RTS5208=y CONFIG_VT6655=m CONFIG_VT6656=m # # IIO staging drivers # # # Accelerometers # CONFIG_ADIS16203=y CONFIG_ADIS16240=y # end of Accelerometers # # Analog to digital converters # CONFIG_AD7816=y # end of Analog to digital converters # # Analog digital bi-direction converters # CONFIG_ADT7316=y CONFIG_ADT7316_SPI=y CONFIG_ADT7316_I2C=y # end of Analog digital bi-direction converters # # Direct Digital Synthesis # CONFIG_AD9832=y CONFIG_AD9834=y # end of Direct Digital Synthesis # # Network Analyzer, Impedance Converters # CONFIG_AD5933=y # end of Network Analyzer, Impedance Converters # # Resolver to digital converters # CONFIG_AD2S1210=y # end of Resolver to digital converters # end of IIO staging drivers CONFIG_FB_SM750=y CONFIG_STAGING_MEDIA=y CONFIG_INTEL_ATOMISP=y CONFIG_VIDEO_ATOMISP=y CONFIG_VIDEO_ATOMISP_ISP2401=y CONFIG_VIDEO_ATOMISP_OV2722=y CONFIG_VIDEO_ATOMISP_GC2235=y CONFIG_VIDEO_ATOMISP_MSRLIST_HELPER=y CONFIG_VIDEO_ATOMISP_MT9M114=y # CONFIG_VIDEO_ATOMISP_GC0310 is not set CONFIG_VIDEO_ATOMISP_OV2680=y CONFIG_VIDEO_ATOMISP_OV5693=y CONFIG_VIDEO_ATOMISP_LM3554=y CONFIG_DVB_AV7110_IR=y CONFIG_DVB_AV7110=y CONFIG_DVB_AV7110_OSD=y CONFIG_DVB_BUDGET_PATCH=y CONFIG_DVB_SP8870=y CONFIG_VIDEO_IPU3_IMGU=y CONFIG_VIDEO_MAX96712=y CONFIG_STAGING_MEDIA_DEPRECATED=y # # Atmel media platform drivers # CONFIG_STAGING_BOARD=y CONFIG_LTE_GDM724X=m CONFIG_FB_TFT=y CONFIG_FB_TFT_AGM1264K_FL=y CONFIG_FB_TFT_BD663474=y CONFIG_FB_TFT_HX8340BN=y CONFIG_FB_TFT_HX8347D=y CONFIG_FB_TFT_HX8353D=y CONFIG_FB_TFT_HX8357D=y CONFIG_FB_TFT_ILI9163=y CONFIG_FB_TFT_ILI9320=y CONFIG_FB_TFT_ILI9325=y CONFIG_FB_TFT_ILI9340=y CONFIG_FB_TFT_ILI9341=y CONFIG_FB_TFT_ILI9481=y CONFIG_FB_TFT_ILI9486=y CONFIG_FB_TFT_PCD8544=y CONFIG_FB_TFT_RA8875=y CONFIG_FB_TFT_S6D02A1=y CONFIG_FB_TFT_S6D1121=y CONFIG_FB_TFT_SEPS525=y CONFIG_FB_TFT_SH1106=y CONFIG_FB_TFT_SSD1289=y CONFIG_FB_TFT_SSD1305=y CONFIG_FB_TFT_SSD1306=y CONFIG_FB_TFT_SSD1331=y CONFIG_FB_TFT_SSD1351=y CONFIG_FB_TFT_ST7735R=y CONFIG_FB_TFT_ST7789V=y CONFIG_FB_TFT_TINYLCD=y CONFIG_FB_TFT_TLS8204=y CONFIG_FB_TFT_UC1611=y CONFIG_FB_TFT_UC1701=y CONFIG_FB_TFT_UPD161704=y CONFIG_MOST_COMPONENTS=y CONFIG_MOST_NET=y CONFIG_MOST_VIDEO=y CONFIG_MOST_DIM2=y CONFIG_MOST_I2C=y CONFIG_KS7010=y CONFIG_GREYBUS_AUDIO=y CONFIG_GREYBUS_AUDIO_APB_CODEC=y CONFIG_GREYBUS_BOOTROM=y CONFIG_GREYBUS_FIRMWARE=y CONFIG_GREYBUS_HID=y CONFIG_GREYBUS_LIGHT=y CONFIG_GREYBUS_LOG=y CONFIG_GREYBUS_LOOPBACK=y CONFIG_GREYBUS_POWER=y CONFIG_GREYBUS_RAW=y CONFIG_GREYBUS_VIBRATOR=y CONFIG_GREYBUS_BRIDGED_PHY=y CONFIG_GREYBUS_GPIO=y CONFIG_GREYBUS_I2C=y CONFIG_GREYBUS_PWM=y CONFIG_GREYBUS_SDIO=y CONFIG_GREYBUS_SPI=y CONFIG_GREYBUS_UART=y CONFIG_GREYBUS_USB=y CONFIG_PI433=y CONFIG_XIL_AXIS_FIFO=y CONFIG_FIELDBUS_DEV=y CONFIG_HMS_ANYBUSS_BUS=y CONFIG_ARCX_ANYBUS_CONTROLLER=y CONFIG_HMS_PROFINET=y CONFIG_QLGE=y CONFIG_VME_BUS=y # # VME Bridge Drivers # CONFIG_VME_TSI148=y CONFIG_VME_FAKE=y # # VME Device Drivers # CONFIG_VME_USER=y CONFIG_GOLDFISH_PIPE=y CONFIG_CHROME_PLATFORMS=y CONFIG_CHROMEOS_ACPI=y CONFIG_CHROMEOS_LAPTOP=y CONFIG_CHROMEOS_PSTORE=y CONFIG_CHROMEOS_TBMC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_RPMSG=y CONFIG_CROS_EC_SPI=y CONFIG_CROS_EC_UART=y CONFIG_CROS_EC_LPC=y CONFIG_CROS_EC_PROTO=y CONFIG_CROS_KBD_LED_BACKLIGHT=y CONFIG_CROS_EC_CHARDEV=y CONFIG_CROS_EC_LIGHTBAR=y CONFIG_CROS_EC_VBC=y CONFIG_CROS_EC_DEBUGFS=y CONFIG_CROS_EC_SENSORHUB=y CONFIG_CROS_EC_SYSFS=y CONFIG_CROS_EC_TYPEC=y CONFIG_CROS_HPS_I2C=y CONFIG_CROS_USBPD_LOGGER=y CONFIG_CROS_USBPD_NOTIFY=y CONFIG_CHROMEOS_PRIVACY_SCREEN=y CONFIG_CROS_TYPEC_SWITCH=y CONFIG_WILCO_EC=y CONFIG_WILCO_EC_DEBUGFS=y CONFIG_WILCO_EC_EVENTS=y CONFIG_WILCO_EC_TELEMETRY=y CONFIG_MELLANOX_PLATFORM=y CONFIG_MLXREG_HOTPLUG=y CONFIG_MLXREG_IO=y CONFIG_MLXREG_LC=y CONFIG_NVSW_SN2201=y CONFIG_OLPC_EC=y CONFIG_SURFACE_PLATFORMS=y CONFIG_SURFACE3_WMI=y CONFIG_SURFACE_3_POWER_OPREGION=y CONFIG_SURFACE_ACPI_NOTIFY=y CONFIG_SURFACE_AGGREGATOR_CDEV=y CONFIG_SURFACE_AGGREGATOR_HUB=y CONFIG_SURFACE_AGGREGATOR_REGISTRY=y CONFIG_SURFACE_AGGREGATOR_TABLET_SWITCH=y CONFIG_SURFACE_DTX=y CONFIG_SURFACE_GPE=y CONFIG_SURFACE_HOTPLUG=y CONFIG_SURFACE_PLATFORM_PROFILE=y CONFIG_SURFACE_PRO3_BUTTON=y CONFIG_SURFACE_AGGREGATOR=y CONFIG_SURFACE_AGGREGATOR_BUS=y CONFIG_SURFACE_AGGREGATOR_ERROR_INJECTION=y CONFIG_X86_PLATFORM_DEVICES=y CONFIG_ACPI_WMI=y CONFIG_WMI_BMOF=y CONFIG_HUAWEI_WMI=y CONFIG_MXM_WMI=y CONFIG_NVIDIA_WMI_EC_BACKLIGHT=y CONFIG_XIAOMI_WMI=y CONFIG_GIGABYTE_WMI=y # CONFIG_YOGABOOK_WMI is not set CONFIG_ACERHDF=y CONFIG_ACER_WIRELESS=y CONFIG_ACER_WMI=y CONFIG_ADV_SWBUTTON=y CONFIG_APPLE_GMUX=y CONFIG_ASUS_LAPTOP=y CONFIG_ASUS_WIRELESS=y CONFIG_ASUS_WMI=y CONFIG_ASUS_NB_WMI=y CONFIG_ASUS_TF103C_DOCK=y CONFIG_MERAKI_MX100=y CONFIG_EEEPC_LAPTOP=y CONFIG_EEEPC_WMI=y CONFIG_X86_PLATFORM_DRIVERS_DELL=y CONFIG_ALIENWARE_WMI=y CONFIG_DCDBAS=y CONFIG_DELL_LAPTOP=y CONFIG_DELL_RBU=y CONFIG_DELL_RBTN=y CONFIG_DELL_SMBIOS=y CONFIG_DELL_SMBIOS_WMI=y CONFIG_DELL_SMBIOS_SMM=y CONFIG_DELL_SMO8800=y CONFIG_DELL_WMI=y CONFIG_DELL_WMI_PRIVACY=y CONFIG_DELL_WMI_AIO=y CONFIG_DELL_WMI_DESCRIPTOR=y CONFIG_DELL_WMI_DDV=y CONFIG_DELL_WMI_LED=y CONFIG_DELL_WMI_SYSMAN=y CONFIG_AMILO_RFKILL=y CONFIG_FUJITSU_LAPTOP=y CONFIG_FUJITSU_TABLET=y CONFIG_GPD_POCKET_FAN=y CONFIG_X86_PLATFORM_DRIVERS_HP=y CONFIG_HP_ACCEL=y CONFIG_HP_WMI=y CONFIG_TC1100_WMI=y CONFIG_WIRELESS_HOTKEY=y CONFIG_IBM_RTL=y CONFIG_IDEAPAD_LAPTOP=y CONFIG_LENOVO_YMC=y CONFIG_SENSORS_HDAPS=y CONFIG_THINKPAD_ACPI=y CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y CONFIG_THINKPAD_ACPI_DEBUGFACILITIES=y CONFIG_THINKPAD_ACPI_DEBUG=y CONFIG_THINKPAD_ACPI_UNSAFE_LEDS=y CONFIG_THINKPAD_ACPI_VIDEO=y CONFIG_THINKPAD_ACPI_HOTKEY_POLL=y CONFIG_THINKPAD_LMI=y CONFIG_INTEL_ATOMISP2_PDX86=y CONFIG_INTEL_ATOMISP2_LED=y CONFIG_INTEL_SAR_INT1092=y CONFIG_INTEL_SKL_INT3472=y CONFIG_INTEL_PMC_CORE=y CONFIG_INTEL_PMT_CLASS=y CONFIG_INTEL_PMT_TELEMETRY=y CONFIG_INTEL_PMT_CRASHLOG=y CONFIG_INTEL_WMI=y CONFIG_INTEL_WMI_SBL_FW_UPDATE=y CONFIG_INTEL_WMI_THUNDERBOLT=y CONFIG_INTEL_HID_EVENT=y CONFIG_INTEL_VBTN=y CONFIG_INTEL_INT0002_VGPIO=y CONFIG_INTEL_OAKTRAIL=y CONFIG_INTEL_BXTWC_PMIC_TMU=y CONFIG_INTEL_BYTCRC_PWRSRC=y CONFIG_INTEL_CHTDC_TI_PWRBTN=y CONFIG_INTEL_CHTWC_INT33FE=y CONFIG_INTEL_MRFLD_PWRBTN=y CONFIG_INTEL_PUNIT_IPC=y CONFIG_INTEL_RST=y CONFIG_INTEL_SMARTCONNECT=y CONFIG_INTEL_VSEC=y CONFIG_MSI_EC=y CONFIG_MSI_LAPTOP=y CONFIG_MSI_WMI=y CONFIG_XO15_EBOOK=y CONFIG_XO1_RFKILL=y CONFIG_PCENGINES_APU2=y CONFIG_BARCO_P50_GPIO=y CONFIG_SAMSUNG_LAPTOP=y CONFIG_SAMSUNG_Q10=y CONFIG_ACPI_TOSHIBA=y CONFIG_TOSHIBA_BT_RFKILL=y CONFIG_TOSHIBA_HAPS=y CONFIG_TOSHIBA_WMI=y CONFIG_ACPI_CMPC=y CONFIG_COMPAL_LAPTOP=y CONFIG_LG_LAPTOP=y CONFIG_PANASONIC_LAPTOP=y CONFIG_SONY_LAPTOP=y CONFIG_SONYPI_COMPAT=y CONFIG_SYSTEM76_ACPI=y CONFIG_TOPSTAR_LAPTOP=y CONFIG_SERIAL_MULTI_INSTANTIATE=y CONFIG_MLX_PLATFORM=y CONFIG_TOUCHSCREEN_DMI=y CONFIG_X86_ANDROID_TABLETS=y CONFIG_FW_ATTR_CLASS=y CONFIG_INTEL_IMR=y CONFIG_INTEL_IPS=y CONFIG_INTEL_SCU_IPC=y CONFIG_INTEL_SCU=y CONFIG_INTEL_SCU_PCI=y CONFIG_INTEL_SCU_PLATFORM=y CONFIG_INTEL_SCU_WDT=y CONFIG_INTEL_SCU_IPC_UTIL=y CONFIG_SIEMENS_SIMATIC_IPC=y CONFIG_WINMATE_FM07_KEYS=y CONFIG_P2SB=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_WM831X=y CONFIG_LMK04832=y CONFIG_COMMON_CLK_MAX77686=y CONFIG_COMMON_CLK_MAX9485=y CONFIG_COMMON_CLK_SI5341=y CONFIG_COMMON_CLK_SI5351=y CONFIG_COMMON_CLK_SI514=y CONFIG_COMMON_CLK_SI544=y CONFIG_COMMON_CLK_SI570=y CONFIG_COMMON_CLK_CDCE706=y CONFIG_COMMON_CLK_TPS68470=y CONFIG_COMMON_CLK_CDCE925=y CONFIG_COMMON_CLK_CS2000_CP=y CONFIG_COMMON_CLK_S2MPS11=y CONFIG_CLK_TWL6040=y CONFIG_COMMON_CLK_AXI_CLKGEN=y CONFIG_COMMON_CLK_LOCHNAGAR=y CONFIG_COMMON_CLK_PALMAS=y CONFIG_COMMON_CLK_PWM=y CONFIG_COMMON_CLK_RS9_PCIE=y CONFIG_COMMON_CLK_SI521XX=y CONFIG_COMMON_CLK_VC5=y CONFIG_COMMON_CLK_VC7=y CONFIG_COMMON_CLK_BD718XX=y CONFIG_COMMON_CLK_FIXED_MMIO=y CONFIG_CLK_LGM_CGU=y CONFIG_XILINX_VCU=y CONFIG_COMMON_CLK_XLNX_CLKWZRD=y CONFIG_HWSPINLOCK=y # # Clock Source drivers # CONFIG_CLKSRC_I8253=y CONFIG_CLKEVT_I8253=y CONFIG_I8253_LOCK=y CONFIG_CLKBLD_I8253=y CONFIG_DW_APB_TIMER=y # end of Clock Source drivers CONFIG_MAILBOX=y CONFIG_PLATFORM_MHU=y CONFIG_PCC=y CONFIG_ALTERA_MBOX=y # CONFIG_MAILBOX_TEST is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # # Generic IOMMU Pagetable Support # # end of Generic IOMMU Pagetable Support CONFIG_IOMMU_DEBUGFS=y # CONFIG_IOMMU_DEFAULT_DMA_STRICT is not set CONFIG_IOMMU_DEFAULT_DMA_LAZY=y # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y CONFIG_DMAR_TABLE=y CONFIG_DMAR_PERF=y CONFIG_DMAR_DEBUG=y CONFIG_INTEL_IOMMU=y CONFIG_INTEL_IOMMU_DEBUGFS=y CONFIG_INTEL_IOMMU_DEFAULT_ON=y CONFIG_INTEL_IOMMU_FLOPPY_WA=y CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON=y CONFIG_INTEL_IOMMU_PERF_EVENTS=y CONFIG_IOMMUFD=y # CONFIG_IOMMUFD_TEST is not set CONFIG_HYPERV_IOMMU=y CONFIG_VIRTIO_IOMMU=y # # Remoteproc drivers # CONFIG_REMOTEPROC=y CONFIG_REMOTEPROC_CDEV=y # end of Remoteproc drivers # # Rpmsg drivers # CONFIG_RPMSG=y CONFIG_RPMSG_CHAR=y CONFIG_RPMSG_CTRL=y CONFIG_RPMSG_NS=y CONFIG_RPMSG_QCOM_GLINK=y CONFIG_RPMSG_QCOM_GLINK_RPM=y CONFIG_RPMSG_VIRTIO=y # end of Rpmsg drivers CONFIG_SOUNDWIRE=y # # SoundWire Devices # CONFIG_SOUNDWIRE_AMD=y CONFIG_SOUNDWIRE_CADENCE=y CONFIG_SOUNDWIRE_INTEL=y CONFIG_SOUNDWIRE_QCOM=y CONFIG_SOUNDWIRE_GENERIC_ALLOCATION=y # # SOC (System On Chip) specific Drivers # # # Amlogic SoC drivers # # end of Amlogic SoC drivers # # Broadcom SoC drivers # # end of Broadcom SoC drivers # # NXP/Freescale QorIQ SoC drivers # # end of NXP/Freescale QorIQ SoC drivers # # fujitsu SoC drivers # # end of fujitsu SoC drivers # # i.MX SoC drivers # # end of i.MX SoC drivers # # Enable LiteX SoC Builder specific drivers # CONFIG_LITEX=y CONFIG_LITEX_SOC_CONTROLLER=y # end of Enable LiteX SoC Builder specific drivers CONFIG_WPCM450_SOC=y # # Qualcomm SoC drivers # CONFIG_QCOM_PDR_HELPERS=y CONFIG_QCOM_PMIC_GLINK=y CONFIG_QCOM_QMI_HELPERS=y # end of Qualcomm SoC drivers CONFIG_SOC_TI=y # # Xilinx SoC drivers # # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers CONFIG_PM_DEVFREQ=y # # DEVFREQ Governors # CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y CONFIG_DEVFREQ_GOV_PERFORMANCE=y CONFIG_DEVFREQ_GOV_POWERSAVE=y CONFIG_DEVFREQ_GOV_USERSPACE=y CONFIG_DEVFREQ_GOV_PASSIVE=y # # DEVFREQ Drivers # CONFIG_PM_DEVFREQ_EVENT=y CONFIG_EXTCON=y # # Extcon Device Drivers # CONFIG_EXTCON_ADC_JACK=y CONFIG_EXTCON_AXP288=y CONFIG_EXTCON_FSA9480=y CONFIG_EXTCON_GPIO=y CONFIG_EXTCON_INTEL_INT3496=y CONFIG_EXTCON_INTEL_CHT_WC=y CONFIG_EXTCON_INTEL_MRFLD=y CONFIG_EXTCON_MAX14577=y CONFIG_EXTCON_MAX3355=y CONFIG_EXTCON_MAX77693=y CONFIG_EXTCON_MAX77843=y CONFIG_EXTCON_MAX8997=y CONFIG_EXTCON_PALMAS=y CONFIG_EXTCON_PTN5150=y CONFIG_EXTCON_RT8973A=y CONFIG_EXTCON_SM5502=y CONFIG_EXTCON_USB_GPIO=y CONFIG_EXTCON_USBC_CROS_EC=y CONFIG_EXTCON_USBC_TUSB320=y CONFIG_MEMORY=y CONFIG_FPGA_DFL_EMIF=y CONFIG_IIO=y CONFIG_IIO_BUFFER=y CONFIG_IIO_BUFFER_CB=y CONFIG_IIO_BUFFER_DMA=y CONFIG_IIO_BUFFER_DMAENGINE=y CONFIG_IIO_BUFFER_HW_CONSUMER=y CONFIG_IIO_KFIFO_BUF=y CONFIG_IIO_TRIGGERED_BUFFER=y CONFIG_IIO_CONFIGFS=y CONFIG_IIO_GTS_HELPER=y CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 CONFIG_IIO_SW_DEVICE=y CONFIG_IIO_SW_TRIGGER=y CONFIG_IIO_TRIGGERED_EVENT=y # # Accelerometers # CONFIG_ADIS16201=y CONFIG_ADIS16209=y CONFIG_ADXL313=y CONFIG_ADXL313_I2C=y CONFIG_ADXL313_SPI=y CONFIG_ADXL355=y CONFIG_ADXL355_I2C=y CONFIG_ADXL355_SPI=y CONFIG_ADXL367=y CONFIG_ADXL367_SPI=y CONFIG_ADXL367_I2C=y CONFIG_ADXL372=y CONFIG_ADXL372_SPI=y CONFIG_ADXL372_I2C=y CONFIG_BMA220=y CONFIG_BMA400=y CONFIG_BMA400_I2C=y CONFIG_BMA400_SPI=y CONFIG_BMC150_ACCEL=y CONFIG_BMC150_ACCEL_I2C=y CONFIG_BMC150_ACCEL_SPI=y CONFIG_BMI088_ACCEL=y CONFIG_BMI088_ACCEL_SPI=y CONFIG_DA280=y CONFIG_DA311=y CONFIG_DMARD06=y CONFIG_DMARD09=y CONFIG_DMARD10=y CONFIG_FXLS8962AF=y CONFIG_FXLS8962AF_I2C=y CONFIG_FXLS8962AF_SPI=y CONFIG_HID_SENSOR_ACCEL_3D=y CONFIG_IIO_CROS_EC_ACCEL_LEGACY=y CONFIG_IIO_KX022A=y CONFIG_IIO_KX022A_SPI=y CONFIG_IIO_KX022A_I2C=y CONFIG_KXSD9=y CONFIG_KXSD9_SPI=y CONFIG_KXSD9_I2C=y CONFIG_KXCJK1013=y CONFIG_MC3230=y CONFIG_MMA7455=y CONFIG_MMA7455_I2C=y CONFIG_MMA7455_SPI=y CONFIG_MMA7660=y CONFIG_MMA8452=y CONFIG_MMA9551_CORE=y CONFIG_MMA9551=y CONFIG_MMA9553=y CONFIG_MSA311=y CONFIG_MXC4005=y CONFIG_MXC6255=y CONFIG_SCA3000=y CONFIG_SCA3300=y CONFIG_STK8312=y CONFIG_STK8BA50=y # end of Accelerometers # # Analog to digital converters # CONFIG_AD_SIGMA_DELTA=y CONFIG_AD4130=y CONFIG_AD7091R5=y CONFIG_AD7124=y CONFIG_AD7192=y CONFIG_AD7266=y CONFIG_AD7280=y CONFIG_AD7291=y CONFIG_AD7292=y CONFIG_AD7298=y CONFIG_AD7476=y CONFIG_AD7606=y CONFIG_AD7606_IFACE_PARALLEL=y CONFIG_AD7606_IFACE_SPI=y CONFIG_AD7766=y CONFIG_AD7768_1=y CONFIG_AD7780=y CONFIG_AD7791=y CONFIG_AD7793=y CONFIG_AD7887=y CONFIG_AD7923=y CONFIG_AD7949=y CONFIG_AD799X=y CONFIG_AD9467=y CONFIG_ADI_AXI_ADC=y CONFIG_AXP20X_ADC=y CONFIG_AXP288_ADC=y CONFIG_CC10001_ADC=y CONFIG_CPCAP_ADC=y CONFIG_DA9150_GPADC=y CONFIG_DLN2_ADC=y CONFIG_ENVELOPE_DETECTOR=y CONFIG_HI8435=y CONFIG_HX711=y CONFIG_INTEL_MRFLD_ADC=y CONFIG_LP8788_ADC=y CONFIG_LTC2471=y CONFIG_LTC2485=y CONFIG_LTC2496=y CONFIG_LTC2497=y CONFIG_MAX1027=y CONFIG_MAX11100=y CONFIG_MAX1118=y CONFIG_MAX11205=y CONFIG_MAX11410=y CONFIG_MAX1241=y CONFIG_MAX1363=y CONFIG_MAX9611=y CONFIG_MCP320X=y CONFIG_MCP3422=y CONFIG_MCP3911=y CONFIG_MEDIATEK_MT6360_ADC=y CONFIG_MEDIATEK_MT6370_ADC=y CONFIG_MEN_Z188_ADC=y CONFIG_MP2629_ADC=y CONFIG_NAU7802=y CONFIG_PALMAS_GPADC=y CONFIG_QCOM_VADC_COMMON=y CONFIG_QCOM_SPMI_IADC=y CONFIG_QCOM_SPMI_VADC=y CONFIG_QCOM_SPMI_ADC5=y CONFIG_RN5T618_ADC=y CONFIG_RICHTEK_RTQ6056=y CONFIG_SD_ADC_MODULATOR=y CONFIG_STMPE_ADC=y CONFIG_TI_ADC081C=y CONFIG_TI_ADC0832=y CONFIG_TI_ADC084S021=y CONFIG_TI_ADC12138=y CONFIG_TI_ADC108S102=y CONFIG_TI_ADC128S052=y CONFIG_TI_ADC161S626=y CONFIG_TI_ADS1015=y CONFIG_TI_ADS7924=y CONFIG_TI_ADS1100=y CONFIG_TI_ADS7950=y CONFIG_TI_ADS8344=y CONFIG_TI_ADS8688=y CONFIG_TI_ADS124S08=y CONFIG_TI_ADS131E08=y CONFIG_TI_AM335X_ADC=y CONFIG_TI_LMP92064=y CONFIG_TI_TLC4541=y CONFIG_TI_TSC2046=y CONFIG_TWL4030_MADC=y CONFIG_TWL6030_GPADC=y CONFIG_VF610_ADC=y CONFIG_VIPERBOARD_ADC=y CONFIG_XILINX_XADC=y # end of Analog to digital converters # # Analog to digital and digital to analog converters # CONFIG_AD74115=y CONFIG_AD74413R=y CONFIG_STX104=y # end of Analog to digital and digital to analog converters # # Analog Front Ends # CONFIG_IIO_RESCALE=y # end of Analog Front Ends # # Amplifiers # CONFIG_AD8366=y CONFIG_ADA4250=y CONFIG_HMC425=y # end of Amplifiers # # Capacitance to digital converters # CONFIG_AD7150=y CONFIG_AD7746=y # end of Capacitance to digital converters # # Chemical Sensors # CONFIG_ATLAS_PH_SENSOR=y CONFIG_ATLAS_EZO_SENSOR=y CONFIG_BME680=y CONFIG_BME680_I2C=y CONFIG_BME680_SPI=y CONFIG_CCS811=y CONFIG_IAQCORE=y CONFIG_PMS7003=y CONFIG_SCD30_CORE=y CONFIG_SCD30_I2C=y CONFIG_SCD30_SERIAL=y CONFIG_SCD4X=y CONFIG_SENSIRION_SGP30=y CONFIG_SENSIRION_SGP40=y CONFIG_SPS30=y CONFIG_SPS30_I2C=y CONFIG_SPS30_SERIAL=y CONFIG_SENSEAIR_SUNRISE_CO2=y CONFIG_VZ89X=y # end of Chemical Sensors CONFIG_IIO_CROS_EC_SENSORS_CORE=y CONFIG_IIO_CROS_EC_SENSORS=y CONFIG_IIO_CROS_EC_SENSORS_LID_ANGLE=y # # Hid Sensor IIO Common # CONFIG_HID_SENSOR_IIO_COMMON=y CONFIG_HID_SENSOR_IIO_TRIGGER=y # end of Hid Sensor IIO Common CONFIG_IIO_MS_SENSORS_I2C=y # # IIO SCMI Sensors # # end of IIO SCMI Sensors # # SSP Sensor Common # CONFIG_IIO_SSP_SENSORS_COMMONS=y CONFIG_IIO_SSP_SENSORHUB=y # end of SSP Sensor Common CONFIG_IIO_ST_SENSORS_I2C=y CONFIG_IIO_ST_SENSORS_SPI=y CONFIG_IIO_ST_SENSORS_CORE=y # # Digital to analog converters # CONFIG_AD3552R=y CONFIG_AD5064=y CONFIG_AD5360=y CONFIG_AD5380=y CONFIG_AD5421=y CONFIG_AD5446=y CONFIG_AD5449=y CONFIG_AD5592R_BASE=y CONFIG_AD5592R=y CONFIG_AD5593R=y CONFIG_AD5504=y CONFIG_AD5624R_SPI=y CONFIG_LTC2688=y CONFIG_AD5686=y CONFIG_AD5686_SPI=y CONFIG_AD5696_I2C=y CONFIG_AD5755=y CONFIG_AD5758=y CONFIG_AD5761=y CONFIG_AD5764=y CONFIG_AD5766=y CONFIG_AD5770R=y CONFIG_AD5791=y CONFIG_AD7293=y CONFIG_AD7303=y CONFIG_AD8801=y CONFIG_CIO_DAC=y CONFIG_DPOT_DAC=y CONFIG_DS4424=y CONFIG_LTC1660=y CONFIG_LTC2632=y CONFIG_M62332=y CONFIG_MAX517=y CONFIG_MAX5522=y CONFIG_MAX5821=y CONFIG_MCP4725=y CONFIG_MCP4922=y CONFIG_TI_DAC082S085=y CONFIG_TI_DAC5571=y CONFIG_TI_DAC7311=y CONFIG_TI_DAC7612=y CONFIG_VF610_DAC=y # end of Digital to analog converters # # IIO dummy driver # CONFIG_IIO_DUMMY_EVGEN=y CONFIG_IIO_SIMPLE_DUMMY=y CONFIG_IIO_SIMPLE_DUMMY_EVENTS=y CONFIG_IIO_SIMPLE_DUMMY_BUFFER=y # end of IIO dummy driver # # Filters # # end of Filters # # Frequency Synthesizers DDS/PLL # # # Clock Generator/Distribution # CONFIG_AD9523=y # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # CONFIG_ADF4350=y CONFIG_ADF4371=y CONFIG_ADF4377=y CONFIG_ADMV1013=y CONFIG_ADMV4420=y CONFIG_ADRF6780=y # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # CONFIG_ADIS16080=y CONFIG_ADIS16130=y CONFIG_ADIS16136=y CONFIG_ADIS16260=y CONFIG_ADXRS290=y CONFIG_ADXRS450=y CONFIG_BMG160=y CONFIG_BMG160_I2C=y CONFIG_BMG160_SPI=y CONFIG_FXAS21002C=y CONFIG_FXAS21002C_I2C=y CONFIG_FXAS21002C_SPI=y CONFIG_HID_SENSOR_GYRO_3D=y CONFIG_MPU3050=y CONFIG_MPU3050_I2C=y CONFIG_IIO_ST_GYRO_3AXIS=y CONFIG_IIO_ST_GYRO_I2C_3AXIS=y CONFIG_IIO_ST_GYRO_SPI_3AXIS=y CONFIG_ITG3200=y # end of Digital gyroscope sensors # # Health Sensors # # # Heart Rate Monitors # CONFIG_AFE4403=y CONFIG_AFE4404=y CONFIG_MAX30100=y CONFIG_MAX30102=y # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # CONFIG_AM2315=y CONFIG_DHT11=y CONFIG_HDC100X=y CONFIG_HDC2010=y CONFIG_HID_SENSOR_HUMIDITY=y CONFIG_HTS221=y CONFIG_HTS221_I2C=y CONFIG_HTS221_SPI=y CONFIG_HTU21=y CONFIG_SI7005=y CONFIG_SI7020=y # end of Humidity sensors # # Inertial measurement units # CONFIG_ADIS16400=y CONFIG_ADIS16460=y CONFIG_ADIS16475=y CONFIG_ADIS16480=y CONFIG_BMI160=y CONFIG_BMI160_I2C=y CONFIG_BMI160_SPI=y CONFIG_BOSCH_BNO055=y CONFIG_BOSCH_BNO055_SERIAL=y CONFIG_BOSCH_BNO055_I2C=y CONFIG_FXOS8700=y CONFIG_FXOS8700_I2C=y CONFIG_FXOS8700_SPI=y CONFIG_KMX61=y CONFIG_INV_ICM42600=y CONFIG_INV_ICM42600_I2C=y CONFIG_INV_ICM42600_SPI=y CONFIG_INV_MPU6050_IIO=y CONFIG_INV_MPU6050_I2C=y CONFIG_INV_MPU6050_SPI=y CONFIG_IIO_ST_LSM6DSX=y CONFIG_IIO_ST_LSM6DSX_I2C=y CONFIG_IIO_ST_LSM6DSX_SPI=y CONFIG_IIO_ST_LSM6DSX_I3C=y # end of Inertial measurement units CONFIG_IIO_ADIS_LIB=y CONFIG_IIO_ADIS_LIB_BUFFER=y # # Light sensors # CONFIG_ACPI_ALS=y CONFIG_ADJD_S311=y CONFIG_ADUX1020=y CONFIG_AL3010=y CONFIG_AL3320A=y CONFIG_APDS9300=y CONFIG_APDS9960=y CONFIG_AS73211=y CONFIG_BH1750=y CONFIG_BH1780=y CONFIG_CM32181=y CONFIG_CM3232=y CONFIG_CM3323=y CONFIG_CM3605=y CONFIG_CM36651=y CONFIG_IIO_CROS_EC_LIGHT_PROX=y CONFIG_GP2AP002=y CONFIG_GP2AP020A00F=y CONFIG_IQS621_ALS=y CONFIG_SENSORS_ISL29018=y CONFIG_SENSORS_ISL29028=y CONFIG_ISL29125=y CONFIG_HID_SENSOR_ALS=y CONFIG_HID_SENSOR_PROX=y CONFIG_JSA1212=y CONFIG_ROHM_BU27034=y CONFIG_RPR0521=y CONFIG_SENSORS_LM3533=y CONFIG_LTR501=y CONFIG_LTRF216A=y CONFIG_LV0104CS=y CONFIG_MAX44000=y CONFIG_MAX44009=y CONFIG_NOA1305=y CONFIG_OPT3001=y CONFIG_PA12203001=y CONFIG_SI1133=y CONFIG_SI1145=y CONFIG_STK3310=y CONFIG_ST_UVIS25=y CONFIG_ST_UVIS25_I2C=y CONFIG_ST_UVIS25_SPI=y CONFIG_TCS3414=y CONFIG_TCS3472=y CONFIG_SENSORS_TSL2563=y CONFIG_TSL2583=y CONFIG_TSL2591=y CONFIG_TSL2772=y CONFIG_TSL4531=y CONFIG_US5182D=y CONFIG_VCNL4000=y CONFIG_VCNL4035=y CONFIG_VEML6030=y CONFIG_VEML6070=y CONFIG_VL6180=y CONFIG_ZOPT2201=y # end of Light sensors # # Magnetometer sensors # CONFIG_AK8974=y CONFIG_AK8975=y CONFIG_AK09911=y CONFIG_BMC150_MAGN=y CONFIG_BMC150_MAGN_I2C=y CONFIG_BMC150_MAGN_SPI=y CONFIG_MAG3110=y CONFIG_HID_SENSOR_MAGNETOMETER_3D=y CONFIG_MMC35240=y CONFIG_IIO_ST_MAGN_3AXIS=y CONFIG_IIO_ST_MAGN_I2C_3AXIS=y CONFIG_IIO_ST_MAGN_SPI_3AXIS=y CONFIG_SENSORS_HMC5843=y CONFIG_SENSORS_HMC5843_I2C=y CONFIG_SENSORS_HMC5843_SPI=y CONFIG_SENSORS_RM3100=y CONFIG_SENSORS_RM3100_I2C=y CONFIG_SENSORS_RM3100_SPI=y CONFIG_TI_TMAG5273=y CONFIG_YAMAHA_YAS530=y # end of Magnetometer sensors # # Multiplexers # CONFIG_IIO_MUX=y # end of Multiplexers # # Inclinometer sensors # CONFIG_HID_SENSOR_INCLINOMETER_3D=y CONFIG_HID_SENSOR_DEVICE_ROTATION=y # end of Inclinometer sensors # # Triggers - standalone # CONFIG_IIO_HRTIMER_TRIGGER=y CONFIG_IIO_INTERRUPT_TRIGGER=y CONFIG_IIO_TIGHTLOOP_TRIGGER=y CONFIG_IIO_SYSFS_TRIGGER=y # end of Triggers - standalone # # Linear and angular position sensors # CONFIG_IQS624_POS=y CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=y # end of Linear and angular position sensors # # Digital potentiometers # CONFIG_AD5110=y CONFIG_AD5272=y CONFIG_DS1803=y CONFIG_MAX5432=y CONFIG_MAX5481=y CONFIG_MAX5487=y CONFIG_MCP4018=y CONFIG_MCP4131=y CONFIG_MCP4531=y CONFIG_MCP41010=y CONFIG_TPL0102=y # end of Digital potentiometers # # Digital potentiostats # CONFIG_LMP91000=y # end of Digital potentiostats # # Pressure sensors # CONFIG_ABP060MG=y CONFIG_BMP280=y CONFIG_BMP280_I2C=y CONFIG_BMP280_SPI=y CONFIG_IIO_CROS_EC_BARO=y CONFIG_DLHL60D=y CONFIG_DPS310=y CONFIG_HID_SENSOR_PRESS=y CONFIG_HP03=y CONFIG_ICP10100=y CONFIG_MPL115=y CONFIG_MPL115_I2C=y CONFIG_MPL115_SPI=y CONFIG_MPL3115=y CONFIG_MS5611=y CONFIG_MS5611_I2C=y CONFIG_MS5611_SPI=y CONFIG_MS5637=y CONFIG_IIO_ST_PRESS=y CONFIG_IIO_ST_PRESS_I2C=y CONFIG_IIO_ST_PRESS_SPI=y CONFIG_T5403=y CONFIG_HP206C=y CONFIG_ZPA2326=y CONFIG_ZPA2326_I2C=y CONFIG_ZPA2326_SPI=y # end of Pressure sensors # # Lightning sensors # CONFIG_AS3935=y # end of Lightning sensors # # Proximity and distance sensors # CONFIG_CROS_EC_MKBP_PROXIMITY=y CONFIG_ISL29501=y CONFIG_LIDAR_LITE_V2=y CONFIG_MB1232=y CONFIG_PING=y CONFIG_RFD77402=y CONFIG_SRF04=y CONFIG_SX_COMMON=y CONFIG_SX9310=y CONFIG_SX9324=y CONFIG_SX9360=y CONFIG_SX9500=y CONFIG_SRF08=y CONFIG_VCNL3020=y CONFIG_VL53L0X_I2C=y # end of Proximity and distance sensors # # Resolver to digital converters # CONFIG_AD2S90=y CONFIG_AD2S1200=y # end of Resolver to digital converters # # Temperature sensors # CONFIG_IQS620AT_TEMP=y CONFIG_LTC2983=y CONFIG_MAXIM_THERMOCOUPLE=y CONFIG_HID_SENSOR_TEMP=y CONFIG_MLX90614=y CONFIG_MLX90632=y CONFIG_TMP006=y CONFIG_TMP007=y CONFIG_TMP117=y CONFIG_TSYS01=y CONFIG_TSYS02D=y CONFIG_MAX30208=y CONFIG_MAX31856=y CONFIG_MAX31865=y # end of Temperature sensors CONFIG_NTB=y CONFIG_NTB_MSI=y CONFIG_NTB_IDT=y CONFIG_NTB_EPF=m CONFIG_NTB_SWITCHTEC=y CONFIG_NTB_PINGPONG=y CONFIG_NTB_TOOL=y CONFIG_NTB_PERF=y # CONFIG_NTB_MSI_TEST is not set CONFIG_NTB_TRANSPORT=y CONFIG_PWM=y CONFIG_PWM_SYSFS=y CONFIG_PWM_DEBUG=y CONFIG_PWM_ATMEL_HLCDC_PWM=y CONFIG_PWM_ATMEL_TCB=y CONFIG_PWM_CLK=y CONFIG_PWM_CRC=y CONFIG_PWM_CROS_EC=y CONFIG_PWM_DWC=y CONFIG_PWM_FSL_FTM=y CONFIG_PWM_INTEL_LGM=y CONFIG_PWM_IQS620A=y CONFIG_PWM_LP3943=y CONFIG_PWM_LPSS=y CONFIG_PWM_LPSS_PCI=y CONFIG_PWM_LPSS_PLATFORM=y CONFIG_PWM_NTXEC=y CONFIG_PWM_PCA9685=y CONFIG_PWM_STMPE=y CONFIG_PWM_TWL=y CONFIG_PWM_TWL_LED=y CONFIG_PWM_XILINX=y # # IRQ chip support # CONFIG_IRQCHIP=y CONFIG_AL_FIC=y CONFIG_MADERA_IRQ=y CONFIG_XILINX_INTC=y # end of IRQ chip support CONFIG_IPACK_BUS=y CONFIG_BOARD_TPCI200=y CONFIG_SERIAL_IPOCTAL=y CONFIG_RESET_CONTROLLER=y CONFIG_RESET_INTEL_GW=y CONFIG_RESET_SIMPLE=y CONFIG_RESET_TI_SYSCON=y CONFIG_RESET_TI_TPS380X=y # # PHY Subsystem # CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PHY_MIPI_DPHY=y CONFIG_USB_LGM_PHY=y CONFIG_PHY_CAN_TRANSCEIVER=y # # PHY drivers for Broadcom platforms # CONFIG_BCM_KONA_USB2_PHY=y # end of PHY drivers for Broadcom platforms CONFIG_PHY_CADENCE_TORRENT=y CONFIG_PHY_CADENCE_DPHY=y CONFIG_PHY_CADENCE_DPHY_RX=y CONFIG_PHY_CADENCE_SIERRA=y CONFIG_PHY_CADENCE_SALVO=y CONFIG_PHY_PXA_28NM_HSIC=y CONFIG_PHY_PXA_28NM_USB2=y CONFIG_PHY_LAN966X_SERDES=y CONFIG_PHY_CPCAP_USB=y CONFIG_PHY_MAPPHONE_MDM6600=y CONFIG_PHY_OCELOT_SERDES=y CONFIG_PHY_QCOM_USB_HS=y CONFIG_PHY_QCOM_USB_HSIC=y CONFIG_PHY_TUSB1210=y CONFIG_PHY_INTEL_LGM_COMBO=y CONFIG_PHY_INTEL_LGM_EMMC=y # end of PHY Subsystem CONFIG_POWERCAP=y CONFIG_INTEL_RAPL_CORE=y CONFIG_INTEL_RAPL=y CONFIG_IDLE_INJECT=y CONFIG_DTPM=y CONFIG_DTPM_CPU=y CONFIG_DTPM_DEVFREQ=y CONFIG_MCB=y CONFIG_MCB_PCI=y CONFIG_MCB_LPC=y # # Performance monitor support # # end of Performance monitor support CONFIG_RAS=y CONFIG_RAS_CEC=y CONFIG_RAS_CEC_DEBUG=y CONFIG_USB4=y CONFIG_USB4_DEBUGFS_WRITE=y CONFIG_USB4_DEBUGFS_MARGINING=y # CONFIG_USB4_DMA_TEST is not set # # Android # CONFIG_ANDROID_BINDER_IPC=y CONFIG_ANDROID_BINDERFS=y CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" # CONFIG_ANDROID_BINDER_IPC_SELFTEST is not set # end of Android CONFIG_DAX=y CONFIG_DEV_DAX=y CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y # # Layout Types # CONFIG_NVMEM_LAYOUT_SL28_VPD=y CONFIG_NVMEM_LAYOUT_ONIE_TLV=y # end of Layout Types CONFIG_NVMEM_RAVE_SP_EEPROM=y CONFIG_NVMEM_RMEM=y CONFIG_NVMEM_SPMI_SDAM=y CONFIG_NVMEM_U_BOOT_ENV=y # # HW tracing support # CONFIG_STM=y CONFIG_STM_PROTO_BASIC=y CONFIG_STM_PROTO_SYS_T=y CONFIG_STM_DUMMY=y CONFIG_STM_SOURCE_CONSOLE=y CONFIG_STM_SOURCE_HEARTBEAT=y CONFIG_STM_SOURCE_FTRACE=y CONFIG_INTEL_TH=y CONFIG_INTEL_TH_PCI=y CONFIG_INTEL_TH_ACPI=y CONFIG_INTEL_TH_GTH=y CONFIG_INTEL_TH_STH=y CONFIG_INTEL_TH_MSU=y CONFIG_INTEL_TH_PTI=y CONFIG_INTEL_TH_DEBUG=y # end of HW tracing support CONFIG_FPGA=y CONFIG_ALTERA_PR_IP_CORE=y CONFIG_ALTERA_PR_IP_CORE_PLAT=y CONFIG_FPGA_MGR_ALTERA_PS_SPI=y CONFIG_FPGA_MGR_ALTERA_CVP=y CONFIG_FPGA_MGR_XILINX_SPI=y CONFIG_FPGA_MGR_ICE40_SPI=y CONFIG_FPGA_MGR_MACHXO2_SPI=y CONFIG_FPGA_BRIDGE=y CONFIG_ALTERA_FREEZE_BRIDGE=y CONFIG_XILINX_PR_DECOUPLER=y CONFIG_FPGA_REGION=y CONFIG_OF_FPGA_REGION=y CONFIG_FPGA_DFL=y CONFIG_FPGA_DFL_FME=y CONFIG_FPGA_DFL_FME_MGR=y CONFIG_FPGA_DFL_FME_BRIDGE=y CONFIG_FPGA_DFL_FME_REGION=y CONFIG_FPGA_DFL_AFU=y CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000=y CONFIG_FPGA_DFL_PCI=y CONFIG_FPGA_M10_BMC_SEC_UPDATE=y CONFIG_FPGA_MGR_MICROCHIP_SPI=y CONFIG_FPGA_MGR_LATTICE_SYSCONFIG=y CONFIG_FPGA_MGR_LATTICE_SYSCONFIG_SPI=y CONFIG_FSI=y CONFIG_FSI_NEW_DEV_NODE=y CONFIG_FSI_MASTER_GPIO=y CONFIG_FSI_MASTER_HUB=y CONFIG_FSI_MASTER_ASPEED=y CONFIG_FSI_SCOM=y CONFIG_FSI_SBEFIFO=y CONFIG_FSI_OCC=y CONFIG_MULTIPLEXER=y # # Multiplexer drivers # CONFIG_MUX_ADG792A=y CONFIG_MUX_ADGS1408=y CONFIG_MUX_GPIO=y CONFIG_MUX_MMIO=y # end of Multiplexer drivers CONFIG_PM_OPP=y CONFIG_SIOX=y CONFIG_SIOX_BUS_GPIO=y CONFIG_SLIMBUS=y CONFIG_SLIM_QCOM_CTRL=y CONFIG_INTERCONNECT=y CONFIG_COUNTER=y CONFIG_104_QUAD_8=y CONFIG_INTEL_QEP=y CONFIG_INTERRUPT_CNT=y CONFIG_MOST=y CONFIG_MOST_USB_HDM=y CONFIG_MOST_CDEV=y CONFIG_MOST_SND=y CONFIG_PECI=y CONFIG_PECI_CPU=y CONFIG_HTE=y # end of Device Drivers # # File systems # CONFIG_DCACHE_WORD_ACCESS=y CONFIG_VALIDATE_FS_PARSER=y CONFIG_FS_IOMAP=y CONFIG_LEGACY_DIRECT_IO=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y CONFIG_EXT3_FS=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y CONFIG_EXT4_DEBUG=y CONFIG_JBD2=y CONFIG_JBD2_DEBUG=y CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=y CONFIG_REISERFS_CHECK=y CONFIG_REISERFS_PROC_INFO=y CONFIG_REISERFS_FS_XATTR=y CONFIG_REISERFS_FS_POSIX_ACL=y CONFIG_REISERFS_FS_SECURITY=y CONFIG_JFS_FS=y CONFIG_JFS_POSIX_ACL=y CONFIG_JFS_SECURITY=y CONFIG_JFS_DEBUG=y CONFIG_JFS_STATISTICS=y CONFIG_XFS_FS=y CONFIG_XFS_SUPPORT_V4=y CONFIG_XFS_SUPPORT_ASCII_CI=y CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y CONFIG_XFS_RT=y CONFIG_XFS_DRAIN_INTENTS=y CONFIG_XFS_ONLINE_SCRUB=y CONFIG_XFS_ONLINE_REPAIR=y CONFIG_XFS_DEBUG=y CONFIG_XFS_ASSERT_FATAL=y CONFIG_GFS2_FS=y CONFIG_GFS2_FS_LOCKING_DLM=y CONFIG_OCFS2_FS=y CONFIG_OCFS2_FS_O2CB=y CONFIG_OCFS2_FS_USERSPACE_CLUSTER=y CONFIG_OCFS2_FS_STATS=y CONFIG_OCFS2_DEBUG_MASKLOG=y CONFIG_OCFS2_DEBUG_FS=y CONFIG_BTRFS_FS=y CONFIG_BTRFS_FS_POSIX_ACL=y CONFIG_BTRFS_FS_CHECK_INTEGRITY=y # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set CONFIG_BTRFS_DEBUG=y CONFIG_BTRFS_ASSERT=y CONFIG_BTRFS_FS_REF_VERIFY=y CONFIG_NILFS2_FS=y CONFIG_F2FS_FS=y CONFIG_F2FS_STAT_FS=y CONFIG_F2FS_FS_XATTR=y CONFIG_F2FS_FS_POSIX_ACL=y CONFIG_F2FS_FS_SECURITY=y CONFIG_F2FS_CHECK_FS=y CONFIG_F2FS_FAULT_INJECTION=y CONFIG_F2FS_FS_COMPRESSION=y CONFIG_F2FS_FS_LZO=y CONFIG_F2FS_FS_LZORLE=y CONFIG_F2FS_FS_LZ4=y CONFIG_F2FS_FS_LZ4HC=y CONFIG_F2FS_FS_ZSTD=y CONFIG_F2FS_IOSTAT=y CONFIG_F2FS_UNFAIR_RWSEM=y CONFIG_ZONEFS_FS=y CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y CONFIG_EXPORTFS_BLOCK_OPS=y CONFIG_FILE_LOCKING=y CONFIG_FS_ENCRYPTION=y CONFIG_FS_ENCRYPTION_ALGS=y CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y CONFIG_FS_VERITY=y CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY_USER=y CONFIG_FANOTIFY=y CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y CONFIG_QUOTA=y CONFIG_QUOTA_NETLINK_INTERFACE=y CONFIG_QUOTA_DEBUG=y CONFIG_QUOTA_TREE=y CONFIG_QFMT_V1=y CONFIG_QFMT_V2=y CONFIG_QUOTACTL=y CONFIG_AUTOFS4_FS=y CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=y CONFIG_CUSE=y CONFIG_VIRTIO_FS=y CONFIG_OVERLAY_FS=y CONFIG_OVERLAY_FS_REDIRECT_DIR=y CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y CONFIG_OVERLAY_FS_INDEX=y CONFIG_OVERLAY_FS_METACOPY=y # # Caches # CONFIG_NETFS_SUPPORT=y CONFIG_NETFS_STATS=y CONFIG_FSCACHE=y CONFIG_FSCACHE_STATS=y CONFIG_FSCACHE_DEBUG=y CONFIG_CACHEFILES=y CONFIG_CACHEFILES_DEBUG=y CONFIG_CACHEFILES_ERROR_INJECTION=y CONFIG_CACHEFILES_ONDEMAND=y # end of Caches # # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=y CONFIG_JOLIET=y CONFIG_ZISOFS=y CONFIG_UDF_FS=y # end of CD-ROM/DVD Filesystems # # DOS/FAT/EXFAT/NT Filesystems # CONFIG_FAT_FS=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_FAT_DEFAULT_UTF8=y CONFIG_EXFAT_FS=y CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8" CONFIG_NTFS_FS=y CONFIG_NTFS_DEBUG=y CONFIG_NTFS_RW=y CONFIG_NTFS3_FS=y CONFIG_NTFS3_LZX_XPRESS=y CONFIG_NTFS3_FS_POSIX_ACL=y # end of DOS/FAT/EXFAT/NT Filesystems # # Pseudo filesystems # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_PROC_VMCORE=y CONFIG_PROC_VMCORE_DEVICE_DUMP=y CONFIG_PROC_SYSCTL=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_CHILDREN=y CONFIG_PROC_PID_ARCH_STATUS=y CONFIG_PROC_CPU_RESCTRL=y CONFIG_KERNFS=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TMPFS_XATTR=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y CONFIG_MEMFD_CREATE=y CONFIG_CONFIGFS_FS=y CONFIG_EFIVAR_FS=y # end of Pseudo filesystems CONFIG_MISC_FILESYSTEMS=y CONFIG_ORANGEFS_FS=y CONFIG_ADFS_FS=y CONFIG_ADFS_FS_RW=y CONFIG_AFFS_FS=y CONFIG_ECRYPT_FS=y CONFIG_ECRYPT_FS_MESSAGING=y CONFIG_HFS_FS=y CONFIG_HFSPLUS_FS=y CONFIG_BEFS_FS=y CONFIG_BEFS_DEBUG=y CONFIG_BFS_FS=y CONFIG_EFS_FS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y CONFIG_JFFS2_FS_WBUF_VERIFY=y CONFIG_JFFS2_SUMMARY=y CONFIG_JFFS2_FS_XATTR=y CONFIG_JFFS2_FS_POSIX_ACL=y CONFIG_JFFS2_FS_SECURITY=y CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_ZLIB=y CONFIG_JFFS2_LZO=y CONFIG_JFFS2_RTIME=y CONFIG_JFFS2_RUBIN=y # CONFIG_JFFS2_CMODE_NONE is not set CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set # CONFIG_JFFS2_CMODE_FAVOURLZO is not set CONFIG_UBIFS_FS=y CONFIG_UBIFS_FS_ADVANCED_COMPR=y CONFIG_UBIFS_FS_LZO=y CONFIG_UBIFS_FS_ZLIB=y CONFIG_UBIFS_FS_ZSTD=y CONFIG_UBIFS_ATIME_SUPPORT=y CONFIG_UBIFS_FS_XATTR=y CONFIG_UBIFS_FS_SECURITY=y CONFIG_UBIFS_FS_AUTHENTICATION=y CONFIG_CRAMFS=y CONFIG_CRAMFS_BLOCKDEV=y CONFIG_CRAMFS_MTD=y CONFIG_SQUASHFS=y CONFIG_SQUASHFS_FILE_CACHE=y # CONFIG_SQUASHFS_FILE_DIRECT is not set CONFIG_SQUASHFS_DECOMP_SINGLE=y CONFIG_SQUASHFS_DECOMP_MULTI=y CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT=y CONFIG_SQUASHFS_MOUNT_DECOMP_THREADS=y CONFIG_SQUASHFS_XATTR=y CONFIG_SQUASHFS_ZLIB=y CONFIG_SQUASHFS_LZ4=y CONFIG_SQUASHFS_LZO=y CONFIG_SQUASHFS_XZ=y CONFIG_SQUASHFS_ZSTD=y CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y CONFIG_SQUASHFS_EMBEDDED=y CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 CONFIG_VXFS_FS=y CONFIG_MINIX_FS=y CONFIG_OMFS_FS=y CONFIG_HPFS_FS=y CONFIG_QNX4FS_FS=y CONFIG_QNX6FS_FS=y CONFIG_QNX6FS_DEBUG=y CONFIG_ROMFS_FS=y CONFIG_ROMFS_BACKED_BY_BLOCK=y # CONFIG_ROMFS_BACKED_BY_MTD is not set # CONFIG_ROMFS_BACKED_BY_BOTH is not set CONFIG_ROMFS_ON_BLOCK=y CONFIG_PSTORE=y CONFIG_PSTORE_DEFAULT_KMSG_BYTES=10240 CONFIG_PSTORE_DEFLATE_COMPRESS=y CONFIG_PSTORE_LZO_COMPRESS=y CONFIG_PSTORE_LZ4_COMPRESS=y CONFIG_PSTORE_LZ4HC_COMPRESS=y CONFIG_PSTORE_842_COMPRESS=y CONFIG_PSTORE_ZSTD_COMPRESS=y CONFIG_PSTORE_COMPRESS=y CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y # CONFIG_PSTORE_LZO_COMPRESS_DEFAULT is not set # CONFIG_PSTORE_LZ4_COMPRESS_DEFAULT is not set # CONFIG_PSTORE_LZ4HC_COMPRESS_DEFAULT is not set # CONFIG_PSTORE_842_COMPRESS_DEFAULT is not set # CONFIG_PSTORE_ZSTD_COMPRESS_DEFAULT is not set CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_PMSG=y CONFIG_PSTORE_FTRACE=y CONFIG_PSTORE_RAM=y CONFIG_PSTORE_ZONE=y CONFIG_PSTORE_BLK=y CONFIG_PSTORE_BLK_BLKDEV="" CONFIG_PSTORE_BLK_KMSG_SIZE=64 CONFIG_PSTORE_BLK_MAX_REASON=2 CONFIG_PSTORE_BLK_PMSG_SIZE=64 CONFIG_PSTORE_BLK_CONSOLE_SIZE=64 CONFIG_PSTORE_BLK_FTRACE_SIZE=64 CONFIG_SYSV_FS=y CONFIG_UFS_FS=y CONFIG_UFS_FS_WRITE=y CONFIG_UFS_DEBUG=y CONFIG_EROFS_FS=y CONFIG_EROFS_FS_DEBUG=y CONFIG_EROFS_FS_XATTR=y CONFIG_EROFS_FS_POSIX_ACL=y CONFIG_EROFS_FS_SECURITY=y CONFIG_EROFS_FS_ZIP=y CONFIG_EROFS_FS_ZIP_LZMA=y CONFIG_EROFS_FS_ONDEMAND=y CONFIG_EROFS_FS_PCPU_KTHREAD=y CONFIG_EROFS_FS_PCPU_KTHREAD_HIPRI=y CONFIG_VBOXSF_FS=y CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V2=y CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y CONFIG_NFS_SWAP=y CONFIG_NFS_V4_1=y CONFIG_NFS_V4_2=y CONFIG_PNFS_FILE_LAYOUT=y CONFIG_PNFS_BLOCK=y CONFIG_PNFS_FLEXFILE_LAYOUT=y CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" CONFIG_NFS_V4_1_MIGRATION=y CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y CONFIG_NFS_FSCACHE=y CONFIG_NFS_USE_LEGACY_DNS=y CONFIG_NFS_DEBUG=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y CONFIG_NFS_V4_2_READ_PLUS=y CONFIG_NFSD=y CONFIG_NFSD_V2=y CONFIG_NFSD_V2_ACL=y CONFIG_NFSD_V3_ACL=y CONFIG_NFSD_V4=y CONFIG_NFSD_PNFS=y CONFIG_NFSD_BLOCKLAYOUT=y CONFIG_NFSD_SCSILAYOUT=y CONFIG_NFSD_FLEXFILELAYOUT=y CONFIG_NFSD_V4_2_INTER_SSC=y CONFIG_NFSD_V4_SECURITY_LABEL=y CONFIG_GRACE_PERIOD=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_NFS_V4_2_SSC_HELPER=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=y CONFIG_SUNRPC_BACKCHANNEL=y CONFIG_SUNRPC_SWAP=y CONFIG_RPCSEC_GSS_KRB5=y CONFIG_RPCSEC_GSS_KRB5_SIMPLIFIED=y CONFIG_RPCSEC_GSS_KRB5_CRYPTOSYSTEM=y CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_DES=y CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA1=y CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_CAMELLIA=y CONFIG_RPCSEC_GSS_KRB5_ENCTYPES_AES_SHA2=y CONFIG_SUNRPC_DEBUG=y CONFIG_SUNRPC_XPRT_RDMA=y CONFIG_CEPH_FS=y CONFIG_CEPH_FSCACHE=y CONFIG_CEPH_FS_POSIX_ACL=y CONFIG_CEPH_FS_SECURITY_LABEL=y CONFIG_CIFS=y CONFIG_CIFS_STATS2=y CONFIG_CIFS_ALLOW_INSECURE_LEGACY=y CONFIG_CIFS_UPCALL=y CONFIG_CIFS_XATTR=y CONFIG_CIFS_POSIX=y CONFIG_CIFS_DEBUG=y CONFIG_CIFS_DEBUG2=y CONFIG_CIFS_DEBUG_DUMP_KEYS=y CONFIG_CIFS_DFS_UPCALL=y CONFIG_CIFS_SWN_UPCALL=y CONFIG_CIFS_SMB_DIRECT=y CONFIG_CIFS_FSCACHE=y CONFIG_CIFS_ROOT=y CONFIG_SMB_SERVER=y CONFIG_SMB_SERVER_SMBDIRECT=y CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y CONFIG_SMB_SERVER_KERBEROS5=y CONFIG_SMBFS_COMMON=y CONFIG_CODA_FS=y CONFIG_AFS_FS=y CONFIG_AFS_DEBUG=y CONFIG_AFS_FSCACHE=y CONFIG_AFS_DEBUG_CURSOR=y CONFIG_9P_FS=y CONFIG_9P_FSCACHE=y CONFIG_9P_FS_POSIX_ACL=y CONFIG_9P_FS_SECURITY=y CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_737=y CONFIG_NLS_CODEPAGE_775=y CONFIG_NLS_CODEPAGE_850=y CONFIG_NLS_CODEPAGE_852=y CONFIG_NLS_CODEPAGE_855=y CONFIG_NLS_CODEPAGE_857=y CONFIG_NLS_CODEPAGE_860=y CONFIG_NLS_CODEPAGE_861=y CONFIG_NLS_CODEPAGE_862=y CONFIG_NLS_CODEPAGE_863=y CONFIG_NLS_CODEPAGE_864=y CONFIG_NLS_CODEPAGE_865=y CONFIG_NLS_CODEPAGE_866=y CONFIG_NLS_CODEPAGE_869=y CONFIG_NLS_CODEPAGE_936=y CONFIG_NLS_CODEPAGE_950=y CONFIG_NLS_CODEPAGE_932=y CONFIG_NLS_CODEPAGE_949=y CONFIG_NLS_CODEPAGE_874=y CONFIG_NLS_ISO8859_8=y CONFIG_NLS_CODEPAGE_1250=y CONFIG_NLS_CODEPAGE_1251=y CONFIG_NLS_ASCII=y CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_2=y CONFIG_NLS_ISO8859_3=y CONFIG_NLS_ISO8859_4=y CONFIG_NLS_ISO8859_5=y CONFIG_NLS_ISO8859_6=y CONFIG_NLS_ISO8859_7=y CONFIG_NLS_ISO8859_9=y CONFIG_NLS_ISO8859_13=y CONFIG_NLS_ISO8859_14=y CONFIG_NLS_ISO8859_15=y CONFIG_NLS_KOI8_R=y CONFIG_NLS_KOI8_U=y CONFIG_NLS_MAC_ROMAN=y CONFIG_NLS_MAC_CELTIC=y CONFIG_NLS_MAC_CENTEURO=y CONFIG_NLS_MAC_CROATIAN=y CONFIG_NLS_MAC_CYRILLIC=y CONFIG_NLS_MAC_GAELIC=y CONFIG_NLS_MAC_GREEK=y CONFIG_NLS_MAC_ICELAND=y CONFIG_NLS_MAC_INUIT=y CONFIG_NLS_MAC_ROMANIAN=y CONFIG_NLS_MAC_TURKISH=y CONFIG_NLS_UTF8=y CONFIG_DLM=y CONFIG_DLM_DEBUG=y CONFIG_UNICODE=y # CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set CONFIG_IO_WQ=y # end of File systems # # Security options # CONFIG_KEYS=y CONFIG_KEYS_REQUEST_CACHE=y CONFIG_PERSISTENT_KEYRINGS=y CONFIG_BIG_KEYS=y CONFIG_TRUSTED_KEYS=y CONFIG_TRUSTED_KEYS_TPM=y CONFIG_ENCRYPTED_KEYS=y CONFIG_USER_DECRYPTED_DATA=y CONFIG_KEY_DH_OPERATIONS=y CONFIG_KEY_NOTIFICATIONS=y CONFIG_SECURITY_DMESG_RESTRICT=y CONFIG_SECURITY=y CONFIG_SECURITYFS=y CONFIG_SECURITY_NETWORK=y CONFIG_SECURITY_INFINIBAND=y CONFIG_SECURITY_NETWORK_XFRM=y CONFIG_SECURITY_PATH=y CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=65536 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y CONFIG_HARDENED_USERCOPY=y CONFIG_STATIC_USERMODEHELPER=y CONFIG_STATIC_USERMODEHELPER_PATH="/sbin/usermode-helper" CONFIG_SECURITY_SELINUX=y CONFIG_SECURITY_SELINUX_BOOTPARAM=y CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y CONFIG_SECURITY_SELINUX_SIDTAB_HASH_BITS=9 CONFIG_SECURITY_SELINUX_SID2STR_CACHE_SIZE=256 CONFIG_SECURITY_SMACK=y CONFIG_SECURITY_SMACK_BRINGUP=y CONFIG_SECURITY_SMACK_NETFILTER=y CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y # CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y CONFIG_SECURITY_APPARMOR_DEBUG=y CONFIG_SECURITY_APPARMOR_DEBUG_ASSERTS=y CONFIG_SECURITY_APPARMOR_DEBUG_MESSAGES=y CONFIG_SECURITY_APPARMOR_INTROSPECT_POLICY=y CONFIG_SECURITY_APPARMOR_HASH=y CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y CONFIG_SECURITY_APPARMOR_EXPORT_BINARY=y CONFIG_SECURITY_APPARMOR_PARANOID_LOAD=y CONFIG_SECURITY_LOADPIN=y CONFIG_SECURITY_LOADPIN_ENFORCE=y CONFIG_SECURITY_LOADPIN_VERITY=y CONFIG_SECURITY_YAMA=y CONFIG_SECURITY_SAFESETID=y CONFIG_SECURITY_LOCKDOWN_LSM=y CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y CONFIG_LOCK_DOWN_KERNEL_FORCE_NONE=y # CONFIG_LOCK_DOWN_KERNEL_FORCE_INTEGRITY is not set # CONFIG_LOCK_DOWN_KERNEL_FORCE_CONFIDENTIALITY is not set CONFIG_SECURITY_LANDLOCK=y CONFIG_INTEGRITY=y CONFIG_INTEGRITY_SIGNATURE=y CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y CONFIG_INTEGRITY_TRUSTED_KEYRING=y CONFIG_INTEGRITY_PLATFORM_KEYRING=y CONFIG_INTEGRITY_MACHINE_KEYRING=y CONFIG_INTEGRITY_CA_MACHINE_KEYRING=y CONFIG_INTEGRITY_CA_MACHINE_KEYRING_MAX=y CONFIG_LOAD_UEFI_KEYS=y CONFIG_INTEGRITY_AUDIT=y CONFIG_IMA=y CONFIG_IMA_MEASURE_PCR_IDX=10 CONFIG_IMA_LSM_RULES=y CONFIG_IMA_NG_TEMPLATE=y # CONFIG_IMA_SIG_TEMPLATE is not set CONFIG_IMA_DEFAULT_TEMPLATE="ima-ng" CONFIG_IMA_DEFAULT_HASH_SHA1=y # CONFIG_IMA_DEFAULT_HASH_SHA256 is not set # CONFIG_IMA_DEFAULT_HASH_SHA512 is not set # CONFIG_IMA_DEFAULT_HASH_WP512 is not set # CONFIG_IMA_DEFAULT_HASH_SM3 is not set CONFIG_IMA_DEFAULT_HASH="sha1" CONFIG_IMA_WRITE_POLICY=y CONFIG_IMA_READ_POLICY=y CONFIG_IMA_APPRAISE=y CONFIG_IMA_ARCH_POLICY=y CONFIG_IMA_APPRAISE_BUILD_POLICY=y CONFIG_IMA_APPRAISE_REQUIRE_FIRMWARE_SIGS=y CONFIG_IMA_APPRAISE_REQUIRE_KEXEC_SIGS=y # CONFIG_IMA_APPRAISE_REQUIRE_MODULE_SIGS is not set CONFIG_IMA_APPRAISE_REQUIRE_POLICY_SIGS=y CONFIG_IMA_APPRAISE_BOOTPARAM=y CONFIG_IMA_APPRAISE_MODSIG=y CONFIG_IMA_TRUSTED_KEYRING=y CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY=y CONFIG_IMA_BLACKLIST_KEYRING=y CONFIG_IMA_LOAD_X509=y CONFIG_IMA_X509_PATH="/etc/keys/x509_ima.der" CONFIG_IMA_APPRAISE_SIGNED_INIT=y CONFIG_IMA_MEASURE_ASYMMETRIC_KEYS=y CONFIG_IMA_QUEUE_EARLY_BOOT_KEYS=y CONFIG_IMA_SECURE_AND_OR_TRUSTED_BOOT=y CONFIG_IMA_DISABLE_HTABLE=y CONFIG_EVM=y CONFIG_EVM_ATTR_FSUUID=y CONFIG_EVM_EXTRA_SMACK_XATTRS=y CONFIG_EVM_ADD_XATTRS=y CONFIG_EVM_LOAD_X509=y CONFIG_EVM_X509_PATH="/etc/keys/x509_evm.der" CONFIG_DEFAULT_SECURITY_SELINUX=y # CONFIG_DEFAULT_SECURITY_SMACK is not set # CONFIG_DEFAULT_SECURITY_APPARMOR is not set # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,selinux,smack,tomoyo,apparmor,bpf" # # Kernel hardening options # # # Memory initialization # CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_ENABLER=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y # CONFIG_INIT_STACK_NONE is not set CONFIG_INIT_STACK_ALL_PATTERN=y # CONFIG_INIT_STACK_ALL_ZERO is not set CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y CONFIG_INIT_ON_FREE_DEFAULT_ON=y # end of Memory initialization CONFIG_RANDSTRUCT_NONE=y # end of Kernel hardening options # end of Security options CONFIG_XOR_BLOCKS=y CONFIG_ASYNC_CORE=y CONFIG_ASYNC_MEMCPY=y CONFIG_ASYNC_XOR=y CONFIG_ASYNC_PQ=y CONFIG_ASYNC_RAID6_RECOV=y CONFIG_CRYPTO=y # # Crypto core or helper # CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_SKCIPHER=y CONFIG_CRYPTO_SKCIPHER2=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_RNG_DEFAULT=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_KPP2=y CONFIG_CRYPTO_KPP=y CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=y CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=y CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_AUTHENC=y # CONFIG_CRYPTO_TEST is not set CONFIG_CRYPTO_SIMD=y CONFIG_CRYPTO_ENGINE=y # end of Crypto core or helper # # Public-key cryptography # CONFIG_CRYPTO_RSA=y CONFIG_CRYPTO_DH=y CONFIG_CRYPTO_DH_RFC7919_GROUPS=y CONFIG_CRYPTO_ECC=y CONFIG_CRYPTO_ECDH=y CONFIG_CRYPTO_ECDSA=y CONFIG_CRYPTO_ECRDSA=y CONFIG_CRYPTO_SM2=y CONFIG_CRYPTO_CURVE25519=y # end of Public-key cryptography # # Block ciphers # CONFIG_CRYPTO_AES=y CONFIG_CRYPTO_AES_TI=y CONFIG_CRYPTO_ANUBIS=y CONFIG_CRYPTO_ARIA=y CONFIG_CRYPTO_BLOWFISH=y CONFIG_CRYPTO_BLOWFISH_COMMON=y CONFIG_CRYPTO_CAMELLIA=y CONFIG_CRYPTO_CAST_COMMON=y CONFIG_CRYPTO_CAST5=y CONFIG_CRYPTO_CAST6=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_FCRYPT=y CONFIG_CRYPTO_KHAZAD=y CONFIG_CRYPTO_SEED=y CONFIG_CRYPTO_SERPENT=y CONFIG_CRYPTO_SM4=y CONFIG_CRYPTO_SM4_GENERIC=y CONFIG_CRYPTO_TEA=y CONFIG_CRYPTO_TWOFISH=y CONFIG_CRYPTO_TWOFISH_COMMON=y # end of Block ciphers # # Length-preserving ciphers and modes # CONFIG_CRYPTO_ADIANTUM=y CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_CHACHA20=y CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CFB=y CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_HCTR2=y CONFIG_CRYPTO_KEYWRAP=y CONFIG_CRYPTO_LRW=y CONFIG_CRYPTO_OFB=y CONFIG_CRYPTO_PCBC=y CONFIG_CRYPTO_XCTR=y CONFIG_CRYPTO_XTS=y CONFIG_CRYPTO_NHPOLY1305=y # end of Length-preserving ciphers and modes # # AEAD (authenticated encryption with associated data) ciphers # CONFIG_CRYPTO_AEGIS128=y CONFIG_CRYPTO_CHACHA20POLY1305=y CONFIG_CRYPTO_CCM=y CONFIG_CRYPTO_GCM=y CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_ECHAINIV=y CONFIG_CRYPTO_ESSIV=y # end of AEAD (authenticated encryption with associated data) ciphers # # Hashes, digests, and MACs # CONFIG_CRYPTO_BLAKE2B=y CONFIG_CRYPTO_CMAC=y CONFIG_CRYPTO_GHASH=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=y CONFIG_CRYPTO_POLYVAL=y CONFIG_CRYPTO_POLY1305=y CONFIG_CRYPTO_RMD160=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=y CONFIG_CRYPTO_SM3=y CONFIG_CRYPTO_SM3_GENERIC=y CONFIG_CRYPTO_STREEBOG=y CONFIG_CRYPTO_VMAC=y CONFIG_CRYPTO_WP512=y CONFIG_CRYPTO_XCBC=y CONFIG_CRYPTO_XXHASH=y # end of Hashes, digests, and MACs # # CRCs (cyclic redundancy checks) # CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_CRC64_ROCKSOFT=y # end of CRCs (cyclic redundancy checks) # # Compression # CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_842=y CONFIG_CRYPTO_LZ4=y CONFIG_CRYPTO_LZ4HC=y CONFIG_CRYPTO_ZSTD=y # end of Compression # # Random number generation # CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DRBG_MENU=y CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG_HASH=y CONFIG_CRYPTO_DRBG_CTR=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_KDF800108_CTR=y # end of Random number generation # # Userspace interface # CONFIG_CRYPTO_USER_API=y # CONFIG_CRYPTO_USER_API_HASH is not set CONFIG_CRYPTO_USER_API_SKCIPHER=y CONFIG_CRYPTO_USER_API_RNG=y CONFIG_CRYPTO_USER_API_RNG_CAVP=y CONFIG_CRYPTO_USER_API_AEAD=y CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y CONFIG_CRYPTO_STATS=y # end of Userspace interface CONFIG_CRYPTO_HASH_INFO=y # # Accelerated Cryptographic Algorithms for CPU (x86) # CONFIG_CRYPTO_AES_NI_INTEL=y CONFIG_CRYPTO_SERPENT_SSE2_586=y CONFIG_CRYPTO_TWOFISH_586=y CONFIG_CRYPTO_CRC32C_INTEL=y CONFIG_CRYPTO_CRC32_PCLMUL=y # end of Accelerated Cryptographic Algorithms for CPU (x86) CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_DEV_PADLOCK=y CONFIG_CRYPTO_DEV_PADLOCK_AES=y CONFIG_CRYPTO_DEV_PADLOCK_SHA=y CONFIG_CRYPTO_DEV_GEODE=y CONFIG_CRYPTO_DEV_HIFN_795X=y CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y CONFIG_CRYPTO_DEV_ATMEL_I2C=y CONFIG_CRYPTO_DEV_ATMEL_ECC=y CONFIG_CRYPTO_DEV_ATMEL_SHA204A=y CONFIG_CRYPTO_DEV_CCP=y CONFIG_CRYPTO_DEV_QAT=y CONFIG_CRYPTO_DEV_QAT_DH895xCC=y CONFIG_CRYPTO_DEV_QAT_C3XXX=y CONFIG_CRYPTO_DEV_QAT_C62X=y CONFIG_CRYPTO_DEV_QAT_4XXX=y CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=y CONFIG_CRYPTO_DEV_QAT_C3XXXVF=y CONFIG_CRYPTO_DEV_QAT_C62XVF=y CONFIG_CRYPTO_DEV_CHELSIO=y CONFIG_CRYPTO_DEV_VIRTIO=y CONFIG_CRYPTO_DEV_SAFEXCEL=y CONFIG_CRYPTO_DEV_CCREE=y CONFIG_CRYPTO_DEV_AMLOGIC_GXL=y CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG=y CONFIG_ASYMMETRIC_KEY_TYPE=y CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y CONFIG_X509_CERTIFICATE_PARSER=y CONFIG_PKCS8_PRIVATE_KEY_PARSER=y CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set CONFIG_SIGNED_PE_FILE_VERIFICATION=y # CONFIG_FIPS_SIGNATURE_SELFTEST is not set # # Certificates for signature checking # CONFIG_MODULE_SIG_KEY="certs/signing_key.pem" CONFIG_MODULE_SIG_KEY_TYPE_RSA=y # CONFIG_MODULE_SIG_KEY_TYPE_ECDSA is not set CONFIG_SYSTEM_TRUSTED_KEYRING=y CONFIG_SYSTEM_TRUSTED_KEYS="" CONFIG_SYSTEM_EXTRA_CERTIFICATE=y CONFIG_SYSTEM_EXTRA_CERTIFICATE_SIZE=4096 CONFIG_SECONDARY_TRUSTED_KEYRING=y CONFIG_SYSTEM_BLACKLIST_KEYRING=y CONFIG_SYSTEM_BLACKLIST_HASH_LIST="" CONFIG_SYSTEM_REVOCATION_LIST=y CONFIG_SYSTEM_REVOCATION_KEYS="" CONFIG_SYSTEM_BLACKLIST_AUTH_UPDATE=y # end of Certificates for signature checking CONFIG_BINARY_PRINTF=y # # Library routines # CONFIG_RAID6_PQ=y CONFIG_RAID6_PQ_BENCHMARK=y CONFIG_LINEAR_RANGES=y CONFIG_PACKING=y CONFIG_BITREVERSE=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_NET_UTILS=y CONFIG_CORDIC=y CONFIG_PRIME_NUMBERS=y CONFIG_RATIONAL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # # Crypto library routines # CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_ARC4=y CONFIG_CRYPTO_LIB_GF128MUL=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y CONFIG_CRYPTO_LIB_CHACHA=y CONFIG_CRYPTO_LIB_CURVE25519_GENERIC=y CONFIG_CRYPTO_LIB_CURVE25519=y CONFIG_CRYPTO_LIB_DES=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305=y CONFIG_CRYPTO_LIB_CHACHA20POLY1305=y CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y # end of Crypto library routines CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_CRC64_ROCKSOFT=y CONFIG_CRC_ITU_T=y CONFIG_CRC32=y # CONFIG_CRC32_SELFTEST is not set CONFIG_CRC32_SLICEBY8=y # CONFIG_CRC32_SLICEBY4 is not set # CONFIG_CRC32_SARWATE is not set # CONFIG_CRC32_BIT is not set CONFIG_CRC64=y CONFIG_CRC4=y CONFIG_CRC7=y CONFIG_LIBCRC32C=y CONFIG_CRC8=y CONFIG_XXHASH=y CONFIG_AUDIT_GENERIC=y # CONFIG_RANDOM32_SELFTEST is not set CONFIG_842_COMPRESS=y CONFIG_842_DECOMPRESS=y CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_COMPRESS=y CONFIG_LZ4HC_COMPRESS=y CONFIG_LZ4_DECOMPRESS=y CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y CONFIG_XZ_DEC_MICROLZMA=y CONFIG_XZ_DEC_BCJ=y # CONFIG_XZ_DEC_TEST is not set CONFIG_DECOMPRESS_GZIP=y CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y CONFIG_DECOMPRESS_LZ4=y CONFIG_DECOMPRESS_ZSTD=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=y CONFIG_REED_SOLOMON_ENC8=y CONFIG_REED_SOLOMON_DEC8=y CONFIG_REED_SOLOMON_DEC16=y CONFIG_BCH=y CONFIG_TEXTSEARCH=y CONFIG_TEXTSEARCH_KMP=y CONFIG_TEXTSEARCH_BM=y CONFIG_TEXTSEARCH_FSM=y CONFIG_BTREE=y CONFIG_INTERVAL_TREE=y CONFIG_INTERVAL_TREE_SPAN_ITER=y CONFIG_XARRAY_MULTI=y CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_IOPORT_MAP=y CONFIG_HAS_DMA=y CONFIG_DMA_OPS=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_SWIOTLB=y CONFIG_DMA_RESTRICTED_POOL=y CONFIG_DMA_CMA=y CONFIG_DMA_PERNUMA_CMA=y # # Default contiguous memory area size: # CONFIG_CMA_SIZE_MBYTES=0 CONFIG_CMA_SIZE_SEL_MBYTES=y # CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set # CONFIG_CMA_SIZE_SEL_MIN is not set # CONFIG_CMA_SIZE_SEL_MAX is not set CONFIG_CMA_ALIGNMENT=8 # CONFIG_DMA_API_DEBUG is not set CONFIG_DMA_MAP_BENCHMARK=y CONFIG_SGL_ALLOC=y CONFIG_CHECK_SIGNATURE=y CONFIG_CPUMASK_OFFSTACK=y # CONFIG_FORCE_NR_CPUS is not set CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y # CONFIG_GLOB_SELFTEST is not set CONFIG_NLATTR=y CONFIG_LRU_CACHE=y CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y CONFIG_SIGNATURE=y CONFIG_DIMLIB=y CONFIG_LIBFDT=y CONFIG_OID_REGISTRY=y CONFIG_UCS2_STRING=y CONFIG_HAVE_GENERIC_VDSO=y CONFIG_GENERIC_GETTIMEOFDAY=y CONFIG_GENERIC_VDSO_32=y CONFIG_GENERIC_VDSO_TIME_NS=y CONFIG_FONT_SUPPORT=y CONFIG_FONTS=y CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_FONT_6x11=y CONFIG_FONT_7x14=y CONFIG_FONT_PEARL_8x8=y CONFIG_FONT_ACORN_8x8=y CONFIG_FONT_MINI_4x6=y CONFIG_FONT_6x10=y CONFIG_FONT_10x18=y CONFIG_FONT_SUN8x16=y CONFIG_FONT_SUN12x22=y CONFIG_FONT_TER16x32=y CONFIG_FONT_6x8=y CONFIG_SG_POOL=y CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y CONFIG_REF_TRACKER=y CONFIG_SBITMAP=y CONFIG_PARMAN=y CONFIG_OBJAGG=y # end of Library routines CONFIG_PLDMFW=y CONFIG_ASN1_ENCODER=y CONFIG_POLYNOMIAL=y # # Kernel hacking # # # printk and dmesg options # CONFIG_PRINTK_TIME=y CONFIG_PRINTK_CALLER=y CONFIG_STACKTRACE_BUILD_ID=y CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7 CONFIG_CONSOLE_LOGLEVEL_QUIET=4 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 CONFIG_BOOT_PRINTK_DELAY=y CONFIG_DYNAMIC_DEBUG=y CONFIG_DYNAMIC_DEBUG_CORE=y CONFIG_SYMBOLIC_ERRNAME=y CONFIG_DEBUG_BUGVERBOSE=y # end of printk and dmesg options CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # CONFIG_DEBUG_INFO=y CONFIG_AS_HAS_NON_CONST_LEB128=y # CONFIG_DEBUG_INFO_NONE is not set CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y # CONFIG_DEBUG_INFO_DWARF4 is not set # CONFIG_DEBUG_INFO_DWARF5 is not set CONFIG_DEBUG_INFO_REDUCED=y CONFIG_DEBUG_INFO_COMPRESSED_NONE=y # CONFIG_DEBUG_INFO_SPLIT is not set CONFIG_PAHOLE_HAS_SPLIT_BTF=y CONFIG_PAHOLE_HAS_BTF_TAG=y CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y # CONFIG_GDB_SCRIPTS is not set CONFIG_FRAME_WARN=1024 CONFIG_STRIP_ASM_SYMS=y CONFIG_HEADERS_INSTALL=y CONFIG_SECTION_MISMATCH_WARN_ONLY=y CONFIG_FRAME_POINTER=y CONFIG_VMLINUX_MAP=y CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y # end of Compile-time checks and compiler options # # Generic Kernel Debugging Instruments # CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 CONFIG_MAGIC_SYSRQ_SERIAL=y CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE="" CONFIG_DEBUG_FS=y CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y # CONFIG_UBSAN is not set CONFIG_HAVE_KCSAN_COMPILER=y # end of Generic Kernel Debugging Instruments # # Networking Debugging # CONFIG_NET_DEV_REFCNT_TRACKER=y CONFIG_NET_NS_REFCNT_TRACKER=y CONFIG_DEBUG_NET=y # end of Networking Debugging # # Memory Debugging # CONFIG_PAGE_EXTENSION=y # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_PAGE_OWNER is not set CONFIG_PAGE_POISONING=y CONFIG_DEBUG_PAGE_REF=y # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y CONFIG_DEBUG_WX=y CONFIG_GENERIC_PTDUMP=y CONFIG_PTDUMP_CORE=y CONFIG_PTDUMP_DEBUGFS=y CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set CONFIG_DEBUG_OBJECTS=y # CONFIG_DEBUG_OBJECTS_SELFTEST is not set CONFIG_DEBUG_OBJECTS_FREE=y CONFIG_DEBUG_OBJECTS_TIMERS=y CONFIG_DEBUG_OBJECTS_WORK=y CONFIG_DEBUG_OBJECTS_RCU_HEAD=y CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1 CONFIG_SHRINKER_DEBUG=y CONFIG_DEBUG_STACK_USAGE=y CONFIG_SCHED_STACK_END_CHECK=y CONFIG_ARCH_HAS_DEBUG_VM_PGTABLE=y CONFIG_DEBUG_VM_IRQSOFF=y CONFIG_DEBUG_VM=y CONFIG_DEBUG_VM_MAPLE_TREE=y CONFIG_DEBUG_VM_RB=y CONFIG_DEBUG_VM_PGFLAGS=y CONFIG_DEBUG_VM_PGTABLE=y CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_DEBUG_VIRTUAL=y CONFIG_DEBUG_MEMORY_INIT=y CONFIG_DEBUG_PER_CPU_MAPS=y CONFIG_DEBUG_KMAP_LOCAL=y CONFIG_ARCH_SUPPORTS_KMAP_LOCAL_FORCE_MAP=y CONFIG_DEBUG_KMAP_LOCAL_FORCE_MAP=y CONFIG_DEBUG_HIGHMEM=y CONFIG_HAVE_DEBUG_STACKOVERFLOW=y CONFIG_DEBUG_STACKOVERFLOW=y CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CC_HAS_KASAN_SW_TAGS=y CONFIG_CC_HAS_WORKING_NOSANITIZE_ADDRESS=y CONFIG_HAVE_ARCH_KFENCE=y # CONFIG_KFENCE is not set CONFIG_HAVE_KMSAN_COMPILER=y # end of Memory Debugging CONFIG_DEBUG_SHIRQ=y # # Debug Oops, Lockups and Hangs # CONFIG_PANIC_ON_OOPS=y CONFIG_PANIC_ON_OOPS_VALUE=1 CONFIG_PANIC_TIMEOUT=0 CONFIG_LOCKUP_DETECTOR=y CONFIG_SOFTLOCKUP_DETECTOR=y CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y CONFIG_HARDLOCKUP_DETECTOR_PERF=y CONFIG_HARDLOCKUP_DETECTOR=y CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y CONFIG_DETECT_HUNG_TASK=y CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=480 CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y CONFIG_WQ_WATCHDOG=y # CONFIG_TEST_LOCKUP is not set # end of Debug Oops, Lockups and Hangs # # Scheduler Debugging # CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y # end of Scheduler Debugging CONFIG_DEBUG_TIMEKEEPING=y # # Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_PROVE_LOCKING is not set CONFIG_LOCK_STAT=y CONFIG_DEBUG_RT_MUTEXES=y CONFIG_DEBUG_SPINLOCK=y CONFIG_DEBUG_MUTEXES=y CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y CONFIG_DEBUG_RWSEMS=y CONFIG_DEBUG_LOCK_ALLOC=y CONFIG_LOCKDEP=y CONFIG_LOCKDEP_BITS=15 CONFIG_LOCKDEP_CHAINS_BITS=16 CONFIG_LOCKDEP_STACK_TRACE_BITS=19 CONFIG_LOCKDEP_STACK_TRACE_HASH_BITS=14 CONFIG_LOCKDEP_CIRCULAR_QUEUE_BITS=12 # CONFIG_DEBUG_LOCKDEP is not set CONFIG_DEBUG_ATOMIC_SLEEP=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_LOCK_TORTURE_TEST is not set # CONFIG_WW_MUTEX_SELFTEST is not set # CONFIG_SCF_TORTURE_TEST is not set # end of Lock Debugging (spinlocks, mutexes, etc...) CONFIG_TRACE_IRQFLAGS=y CONFIG_TRACE_IRQFLAGS_NMI=y CONFIG_NMI_CHECK_CPU=y CONFIG_DEBUG_IRQFLAGS=y CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set # CONFIG_DEBUG_KOBJECT_RELEASE is not set # # Debug kernel data structures # CONFIG_DEBUG_LIST=y CONFIG_DEBUG_PLIST=y CONFIG_DEBUG_SG=y CONFIG_DEBUG_NOTIFIERS=y CONFIG_BUG_ON_DATA_CORRUPTION=y CONFIG_DEBUG_MAPLE_TREE=y # end of Debug kernel data structures CONFIG_DEBUG_CREDENTIALS=y # # RCU Debugging # # CONFIG_RCU_SCALE_TEST is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 CONFIG_RCU_CPU_STALL_CPUTIME=y CONFIG_RCU_TRACE=y CONFIG_RCU_EQS_DEBUG=y # end of RCU Debugging CONFIG_DEBUG_WQ_FORCE_RR_CPU=y CONFIG_CPU_HOTPLUG_STATE_CONTROL=y CONFIG_LATENCYTOP=y CONFIG_DEBUG_CGROUP_REF=y CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_NOP_TRACER=y CONFIG_HAVE_RETHOOK=y CONFIG_RETHOOK=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_HAVE_DYNAMIC_FTRACE_NO_PATCHABLE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_FENTRY=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_BUILDTIME_MCOUNT_SORT=y CONFIG_BUILDTIME_MCOUNT_SORT=y CONFIG_TRACER_MAX_TRACE=y CONFIG_TRACE_CLOCK=y CONFIG_RING_BUFFER=y CONFIG_EVENT_TRACING=y CONFIG_CONTEXT_SWITCH_TRACER=y CONFIG_RING_BUFFER_ALLOW_SWAP=y CONFIG_PREEMPTIRQ_TRACEPOINTS=y CONFIG_TRACING=y CONFIG_GENERIC_TRACER=y CONFIG_TRACING_SUPPORT=y CONFIG_FTRACE=y CONFIG_BOOTTIME_TRACING=y CONFIG_FUNCTION_TRACER=y CONFIG_FUNCTION_GRAPH_TRACER=y CONFIG_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE_WITH_REGS=y CONFIG_DYNAMIC_FTRACE_WITH_DIRECT_CALLS=y CONFIG_FPROBE=y CONFIG_FUNCTION_PROFILER=y CONFIG_STACK_TRACER=y CONFIG_IRQSOFF_TRACER=y CONFIG_SCHED_TRACER=y CONFIG_HWLAT_TRACER=y CONFIG_OSNOISE_TRACER=y CONFIG_TIMERLAT_TRACER=y CONFIG_MMIOTRACE=y CONFIG_FTRACE_SYSCALLS=y CONFIG_TRACER_SNAPSHOT=y CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y CONFIG_BRANCH_PROFILE_NONE=y # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set # CONFIG_PROFILE_ALL_BRANCHES is not set # CONFIG_BLK_DEV_IO_TRACE is not set CONFIG_KPROBE_EVENTS=y CONFIG_KPROBE_EVENTS_ON_NOTRACE=y CONFIG_UPROBE_EVENTS=y CONFIG_BPF_EVENTS=y CONFIG_DYNAMIC_EVENTS=y CONFIG_PROBE_EVENTS=y CONFIG_BPF_KPROBE_OVERRIDE=y CONFIG_FTRACE_MCOUNT_RECORD=y CONFIG_FTRACE_MCOUNT_USE_RECORDMCOUNT=y CONFIG_TRACING_MAP=y CONFIG_SYNTH_EVENTS=y CONFIG_USER_EVENTS=y CONFIG_HIST_TRIGGERS=y CONFIG_TRACE_EVENT_INJECT=y CONFIG_TRACEPOINT_BENCHMARK=y CONFIG_RING_BUFFER_BENCHMARK=y CONFIG_TRACE_EVAL_MAP_FILE=y CONFIG_FTRACE_RECORD_RECURSION=y CONFIG_FTRACE_RECORD_RECURSION_SIZE=128 CONFIG_RING_BUFFER_RECORD_RECURSION=y CONFIG_GCOV_PROFILE_FTRACE=y # CONFIG_FTRACE_STARTUP_TEST is not set # CONFIG_FTRACE_SORT_STARTUP_TEST is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS=y # CONFIG_MMIOTRACE_TEST is not set # CONFIG_PREEMPTIRQ_DELAY_TEST is not set # CONFIG_SYNTH_EVENT_GEN_TEST is not set # CONFIG_KPROBE_EVENT_GEN_TEST is not set CONFIG_HIST_TRIGGERS_DEBUG=y CONFIG_DA_MON_EVENTS=y CONFIG_DA_MON_EVENTS_ID=y CONFIG_RV=y CONFIG_RV_MON_WWNR=y CONFIG_RV_REACTORS=y CONFIG_RV_REACT_PRINTK=y CONFIG_RV_REACT_PANIC=y CONFIG_PROVIDE_OHCI1394_DMA_INIT=y CONFIG_SAMPLES=y CONFIG_SAMPLE_AUXDISPLAY=y CONFIG_SAMPLE_TRACE_EVENTS=m CONFIG_SAMPLE_TRACE_CUSTOM_EVENTS=m CONFIG_SAMPLE_TRACE_PRINTK=m CONFIG_SAMPLE_FTRACE_OPS=y CONFIG_SAMPLE_TRACE_ARRAY=m CONFIG_SAMPLE_KOBJECT=y CONFIG_SAMPLE_KPROBES=m CONFIG_SAMPLE_KRETPROBES=m CONFIG_SAMPLE_HW_BREAKPOINT=m CONFIG_SAMPLE_FPROBE=m CONFIG_SAMPLE_KFIFO=m CONFIG_SAMPLE_RPMSG_CLIENT=m CONFIG_SAMPLE_CONFIGFS=m CONFIG_SAMPLE_CONNECTOR=m CONFIG_SAMPLE_FANOTIFY_ERROR=y CONFIG_SAMPLE_HIDRAW=y CONFIG_SAMPLE_LANDLOCK=y CONFIG_SAMPLE_PIDFD=y CONFIG_SAMPLE_SECCOMP=y CONFIG_SAMPLE_TIMER=y CONFIG_SAMPLE_UHID=y CONFIG_SAMPLE_VFIO_MDEV_MTTY=y CONFIG_SAMPLE_VFIO_MDEV_MDPY=y CONFIG_SAMPLE_VFIO_MDEV_MDPY_FB=y CONFIG_SAMPLE_VFIO_MDEV_MBOCHS=y CONFIG_SAMPLE_ANDROID_BINDERFS=y CONFIG_SAMPLE_VFS=y CONFIG_SAMPLE_INTEL_MEI=y CONFIG_SAMPLE_WATCHDOG=y CONFIG_SAMPLE_WATCH_QUEUE=y CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y CONFIG_STRICT_DEVMEM=y CONFIG_IO_STRICT_DEVMEM=y # # x86 Debugging # CONFIG_EARLY_PRINTK_USB=y CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK_DBGP=y CONFIG_EARLY_PRINTK_USB_XDBC=y CONFIG_EFI_PGT_DUMP=y CONFIG_DEBUG_TLBFLUSH=y CONFIG_HAVE_MMIOTRACE_SUPPORT=y # CONFIG_X86_DECODER_SELFTEST is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_UDELAY is not set # CONFIG_IO_DELAY_NONE is not set CONFIG_DEBUG_BOOT_PARAMS=y # CONFIG_CPA_DEBUG is not set CONFIG_DEBUG_ENTRY=y # CONFIG_DEBUG_NMI_SELFTEST is not set # CONFIG_DEBUG_IMR_SELFTEST is not set CONFIG_X86_DEBUG_FPU=y CONFIG_PUNIT_ATOM_DEBUG=y CONFIG_UNWINDER_FRAME_POINTER=y # end of x86 Debugging # # Kernel Testing and Coverage # # CONFIG_KUNIT is not set CONFIG_NOTIFIER_ERROR_INJECTION=y CONFIG_PM_NOTIFIER_ERROR_INJECT=y CONFIG_OF_RECONFIG_NOTIFIER_ERROR_INJECT=y CONFIG_NETDEV_NOTIFIER_ERROR_INJECT=y CONFIG_FUNCTION_ERROR_INJECTION=y CONFIG_FAULT_INJECTION=y CONFIG_FAILSLAB=y CONFIG_FAIL_PAGE_ALLOC=y CONFIG_FAULT_INJECTION_USERCOPY=y CONFIG_FAIL_MAKE_REQUEST=y CONFIG_FAIL_IO_TIMEOUT=y CONFIG_FAIL_FUTEX=y CONFIG_FAULT_INJECTION_DEBUG_FS=y CONFIG_FAIL_FUNCTION=y CONFIG_FAIL_MMC_REQUEST=y CONFIG_FAIL_SUNRPC=y CONFIG_FAULT_INJECTION_CONFIGFS=y CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y CONFIG_CC_HAS_SANCOV_TRACE_PC=y CONFIG_RUNTIME_TESTING_MENU=y CONFIG_TEST_DHRY=y # CONFIG_LKDTM is not set # CONFIG_TEST_MIN_HEAP is not set # CONFIG_TEST_DIV64 is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_TEST_REF_TRACKER is not set # CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set # CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_TEST_HEXDUMP is not set # CONFIG_STRING_SELFTEST is not set # CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set # CONFIG_TEST_SCANF is not set # CONFIG_TEST_BITMAP is not set # CONFIG_TEST_UUID is not set # CONFIG_TEST_XARRAY is not set # CONFIG_TEST_MAPLE_TREE is not set # CONFIG_TEST_RHASHTABLE is not set # CONFIG_TEST_IDA is not set # CONFIG_TEST_PARMAN is not set # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set # CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set # CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set # CONFIG_TEST_FIRMWARE is not set # CONFIG_TEST_SYSCTL is not set # CONFIG_TEST_UDELAY is not set # CONFIG_TEST_STATIC_KEYS is not set # CONFIG_TEST_DYNAMIC_DEBUG is not set # CONFIG_TEST_KMOD is not set # CONFIG_TEST_DEBUG_VIRTUAL is not set # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_OBJAGG is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set # CONFIG_TEST_FPU is not set # CONFIG_TEST_CLOCKSOURCE_WATCHDOG is not set CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y CONFIG_HYPERV_TESTING=y # end of Kernel Testing and Coverage # # Rust hacking # # end of Rust hacking # end of Kernel hacking ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 3/3] dt-bindings: phy: realtek: Add the doc about the Realtek SoC USB 2.0/3.0 PHY 2023-05-19 4:58 [PATCH v1 1/3] usb: phy: add usb phy notify port status API Stanley Chang 2023-05-19 4:58 ` [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY Stanley Chang @ 2023-05-19 4:58 ` Stanley Chang 1 sibling, 0 replies; 12+ messages in thread From: Stanley Chang @ 2023-05-19 4:58 UTC (permalink / raw) To: Greg Kroah-Hartman Cc: Stanley Chang, Vinod Koul, Kishon Vijay Abraham I, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Alan Stern, Ray Chi, Michael Grzeschik, Bhuvanesh Surachari, Flavio Suligoi, Mathias Nyman, Paul Cercueil, Arnd Bergmann, Linus Walleij, linux-phy, devicetree, linux-kernel, linux-usb From: stanley_chang <stanley_chang@realtek.com> Two documentations explain the property about realtek USB PHY drivers. Realtek DHC (digital home center) RTD SoCs support DWC3 XHCI USB 2.0/3.0 controller. Added two drivers to drive the USB 2.0/3.0 PHY transceivers. For USB 3.0 transceivers, a driver phy-rtk-usb3 is provided. The driver phy-rtk-usb2 is used to support USB 2.0 transceivers. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> --- .../bindings/phy/realtek,usb2phy.yaml | 249 ++++++++++++++++++ .../bindings/phy/realtek,usb3phy.yaml | 195 ++++++++++++++ 2 files changed, 444 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml create mode 100644 Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml diff --git a/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml new file mode 100644 index 000000000000..47ffdf308f27 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml @@ -0,0 +1,249 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC SoCs USB2 PHY + +maintainers: + - Stanley Chang <stanley_chang@realtek.com> + +description: | + Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs. + +properties: + compatible: + enum: + - realtek,usb2phy + - realtek,rtd-usb2phy + - realtek,rtd1295-usb2phy + - realtek,rtd1395-usb2phy + - realtek,rtd1619-usb2phy + - realtek,rtd1319-usb2phy + - realtek,rtd1619b-usb2phy + - realtek,rtd1312c-usb2phy + - realtek,rtd1319d-usb2phy + - realtek,rtd1315e-usb2phy + + reg: + items: + - description: PHY data registers + - description: PHY control registers + + realtek,usb: + description: The phandler of realtek dwc3 node + $ref: /schemas/types.yaml#/definitions/phandle + + realtek,mac: + description: The phandler of dwc3 node + $ref: /schemas/types.yaml#/definitions/phandle + + realtek,usb_ctrl: + description: The phandler of usb power control node + $ref: /schemas/types.yaml#/definitions/phandle + + realtek,port-index: + description: The index of USB 2.0 PHY + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phyN: + description: The total amount of USB 2.0 PHY + $ref: /schemas/types.yaml#/definitions/uint32 + + phy0: + description: The child node of PHY for the parameter v1. + type: object + properties: + realtek,phy-data-page0-size: + description: PHY data page 0 size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phy-data-page0-addr: + description: PHY data page 0 address + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,phy-data-page0-A00: + description: PHY data page 0 value + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,phy-data-page1-size: + description: PHY data page 1 size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phy-data-page1-addr: + description: PHY data page 1 address + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,phy-data-page1-A00: + description: PHY data page 1 value + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,phy-data-page2-size: + description: PHY data page 2 size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phy-data-page2-addr: + description: PHY data page 2 address + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,phy-data-page2-A00: + description: PHY data page 2 value + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,do-toggle: + description: Do PHY parameter toggle when port status change + type: boolean + + realtek,check-efuse: + description: Enable to fix PHY parameter from reading otp table + type: boolean + + realtek,use-default-parameter: + description: Don't set parameter and use default value + type: boolean + + realtek,is-double-sensitivity-mode: + description: Enable double sensitivity mode + type: boolean + + realtek,ldo-page0-e4-compensate: + description: Adjust the PHY parameter for page 0 0xE4 for ldo mode + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,page0-e4-compensate: + description: Adjust the PHY parameter for page 0 0xE4 + for efuse table v2 + $ref: /schemas/types.yaml#/definitions/uint32 + + phy0_data: + description: The child node of PHY for parameter v2. + type: object + properties: + realtek,page0-size: + description: PHY data page 0 size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,page0-data-A00: + description: PHY data page 0 address and value + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,page1-size: + description: PHY data page 1 size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,page1-data-A00: + description: PHY data page 1 address and value + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,page2-size: + description: PHY data page 2 size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,page2-data-A00: + description: PHY data page 2 address and value + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,do-toggle: + description: Do PHY parameter toggle when port status change + type: boolean + + realtek,do-toggle-driving: + description: Do PHY parameter toggle for driving when port + status change + type: boolean + + realtek,check-efuse: + description: Enable to fix PHY parameter from reading otp table + type: boolean + + realtek,use-default-parameter: + description: Don't set parameter and use default value + type: boolean + + realtek,is-double-sensitivity-mode: + description: Enable double sensitivity mode + type: boolean + + realtek,ldo-force-enable: + description: Force enable ldo mode + type: boolean + + realtek,ldo-page0-e4-compensate: + description: Adjust the PHY parameter for page0 0xE4 for ldo mode + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,page0-e4-compensate: + description: Adjust the PHY parameter for page0 0xE4 + for efuse table v2 + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + dwc3_u3drd_usb2phy: dwc3_u3drd_usb2phy@98013e14 { + compatible = "realtek,usb2phy"; + reg = <0x98013e14 0x4>, <0x98058280 0x4>; + status = "okay"; + realtek,phyN = <1>; + + phy0 { + realtek,phy-data-page0-size = <16>; + realtek,phy-data-page0-addr = /bits/ 8 + <0xE0 0xE1 0xE2 0xE3 0xE4 0xE5 0xE6 0xE7 0xF0 0xF1 + 0xF2 0xF3 0xF4 0xF5 0xF6 0xF7>; + realtek,phy-data-page0-A00 = /bits/ 8 + <0xE0 0x30 0x79 0x8D 0x6A 0x65 0x01 0x71 0xFC 0x8C + 0x00 0x11 0x9B 0x00 0x00 0x0A>; + realtek,phy-data-page0-B00 = /bits/ 8 + <0x18 0x30 0x79 0x8D 0x6A 0x65 0x01 0x71 0xFC 0x8C + 0x00 0x11 0x9B 0x00 0x00 0x32>; + realtek,phy-data-page1-size = <8>; + realtek,phy-data-page1-addr = /bits/ 8 + <0xE0 0xE1 0xE2 0xE3 0xE4 0xE5 0xE6 0xE7>; + realtek,phy-data-page1-A00 = /bits/ 8 + <0x25 0xEF 0x60 0x44 0x00 0x0F 0x18 0xE3>; + realtek,phy-data-page2-size = <1>; + realtek,phy-data-page2-addr = /bits/ 8 + <0xE0>; + realtek,phy-data-page2-A00 = /bits/ 8 + <0x01>; + realtek,do-toggle; + realtek,check-efuse; + realtek,is-double-sensitivity-mode; + realtek,ldo-page0-e4-compensate = <(-2)>; + }; + }; + + - | + usb_port0_usb2phy: usb_port0_usb2phy@13214 { + compatible = "realtek,usb2phy"; + reg = <0x13214 0x4>, <0x28280 0x4>; + realtek,usb = <&usb_port0>; + realtek,mac = <&port0_dwc3>; + realtek,usb_ctrl = <&usb_ctrl>; + + realtek,port-index = <0>; + realtek,phyN = <1>; + phy0_data { + realtek,page0-size = <16>; + realtek,page0-data-A00 = /* < addr data > */ + <0xE0 0xA3>, <0xE4 0xB2>, <0xE5 0x4F>, <0xE6 0x42>; + realtek,page1-size = <8>; + realtek,page1-data-A00 = <0xE3 0x64>; + realtek,page2-size = <8>; + realtek,page2-data-A00 = <0xE7 0x45>; + realtek,do-toggle; + realtek.do-toggle-driving; + realtek,disconnect-driving-updated = <0x8>; + realtek,check-efuse; + realtek,is-double-sensitivity-mode; + realtek,ldo-force-enable; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml b/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml new file mode 100644 index 000000000000..b4e9e0f061b7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/realtek,usb3phy.yaml @@ -0,0 +1,195 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/realtek,usb3phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC SoCs USB3 PHY + +maintainers: + - Stanley Chang <stanley_chang@realtek.com> + +description: | + Realtek USB 3.0 PHY support the digital home center (DHC) RTD series SoCs. + +properties: + compatible: + enum: + - realtek,usb3phy + - realtek,rtd-usb3phy + - realtek,rtd1295-usb3phy + - realtek,rtd1619-usb3phy + - realtek,rtd1319-usb3phy + - realtek,rtd1619b-usb3phy + - realtek,rtd1319d-usb3phy + + reg: + maxItems: 1 + + realtek,usb: + description: The phandler of realtek dwc3 node + $ref: /schemas/types.yaml#/definitions/phandle + + realtek,mac: + description: The phandler of dwc3 node + $ref: /schemas/types.yaml#/definitions/phandle + + realtek,usb_ctrl: + description: The phandler of usb power control node + $ref: /schemas/types.yaml#/definitions/phandle + + realtek,port-index: + description: The index of USB 3.0 PHY + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phyN: + description: The total amount of USB 3.0 PHY + $ref: /schemas/types.yaml#/definitions/uint32 + + phy0: + description: The child node of PHY for parameter v1. + type: object + properties: + realtek,phy-data-size: + description: PHY data size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phy-data-addr: + description: PHY data address + $ref: /schemas/types.yaml#/definitions/uint8-array + + realtek,phy-data-A00: + description: PHY data value + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,do-toggle: + description: Do PHY parameter toggle when port status change + type: boolean + + realtek,do-toggle-once: + description: Do PHY parameter toggle only on PHY init + type: boolean + + realtek,check-efuse: + description: Enable to fix PHY parameter from reading otp table + type: boolean + + realtek,use-default-parameter: + description: Don't set parameter and use default value + type: boolean + + realtek,check-rx-front-end-offset: + description: Enable to check rx front end offset + type: boolean + + phy0_data: + description: The child node of PHY for parameter v2. + type: object + properties: + realtek,phy-data-size: + description: PHY data size + $ref: /schemas/types.yaml#/definitions/uint32 + + realtek,phy-data-A00: + description: PHY data address and value + $ref: /schemas/types.yaml#/definitions/uint32-array + + realtek,do-toggle: + description: Do PHY parameter toggle when port status change + type: boolean + + realtek,do-toggle-once: + description: Do PHY parameter toggle only on phy init + type: boolean + + realtek,check-efuse: + description: Enable to fix PHY parameter from reading otp table + type: boolean + + realtek,use-default-parameter: + description: Don't set parameter and use default value + type: boolean + + realtek,check-rx-front-end-offset: + description: Enable to check rx front end offset + type: boolean + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + dwc3_u3drd_usb3phy: dwc3_u3drd_usb3phy@98013e10 { + compatible = "realtek,usb3phy"; + reg = <0x98013e10 0x4>; + status = "okay"; + realtek,port-index = <0>; /* index in u3 port */ + realtek,phyN = <1>; + + phy0 { + realtek,phy-data-size = <0x30>; + realtek,phy-data-addr = /bits/ 8 + <0x00 0x01 0x02 0x03 0x04 0x05 0x06 + 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D + 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 + 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B + 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 + 0x23 0x24 0x25 0x26 0x27 0x28 0x29 + 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F>; + realtek,phy-data-A00 = /bits/ 16 + <0x400C 0xAC86 0x6042 0x2771 0x72F5 0x2AD3 0x0003 + 0x2E00 0x3591 0x925C 0xA608 0xA905 0xC000 0xEF1E + 0x2010 0x8D50 0x000C 0x4C10 0xFC00 0x0C81 0xDE01 + 0x0000 0x0000 0x0000 0x0000 0x6000 0x0085 0x2014 + 0xC900 0xA03F 0xC2E0 0x7E00 0x705A 0xF645 0x0013 + 0xCB66 0x4770 0x126C 0x840A 0x01D6 0xF802 0xff04 + 0x3040 0x8028 0xFFFF 0xFFFF 0x0000 0x8600>; + realtek,phy-data-B00 = /bits/ 16 + <0x400C 0xAC86 0x6042 0x2771 0x72F5 0x2AD3 0x0003 + 0x2E00 0x3591 0x924C 0xA608 0xB905 0xC000 0xEF1E + 0x2010 0x8D50 0x000C 0x4C10 0xFC00 0x0C81 0xDE01 + 0x0000 0x0000 0x0000 0x0000 0x6000 0x0085 0x2014 + 0xC900 0xA03F 0xC2E0 0x7E00 0x705A 0xF645 0x0013 + 0xCB66 0x4770 0x126C 0x840A 0x01D6 0xF802 0xff04 + 0x3040 0x8028 0xFFFF 0xFFFF 0x0000 0x8600>; + realtek,do-toggle; + }; + }; + + - | + usb_port2_usb3phy: usb_port2_usb3phy@13e10 { + compatible = "realtek,usb3phy"; + reg = <0x13e10 0x4>; + realtek,usb = <&usb_port2>; + realtek,mac = <&port2_dwc3>; + realtek,usb_ctrl = <&usb_ctrl>; + + realtek,port-index = <0>; /* index in u3 port */ + realtek,phyN = <1>; + phy0_data { + realtek,phy-data-size = <0x30>; + realtek,phy-data-A00 = /* <addr data> */ + <0x01 0xAC8C>, + <0x06 0x0017>, + <0x09 0x724C>, + <0x0B 0xB90D>, + <0x0A 0xB610>, + <0x0D 0xEF2A>, + <0x0F 0x9050>, + <0x10 0x000C>, + <0x20 0x70FF>, + <0x21 0xCFAA>, + <0x22 0x0013>, + <0x23 0xDB66>, + <0x26 0x8609>, + <0x29 0xFF13>, + <0x2A 0x3070>; + realtek,do-toggle-once; + realtek,check_efuse; + }; + }; + -- 2.34.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-05-20 9:04 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-05-19 4:58 [PATCH v1 1/3] usb: phy: add usb phy notify port status API Stanley Chang 2023-05-19 4:58 ` [PATCH v1 2/3] usb: phy: Add driver for the Realtek SoC USB 2.0/3.0 PHY Stanley Chang 2023-05-19 6:28 ` Arnd Bergmann 2023-05-19 10:40 ` Stanley Chang[昌育德] 2023-05-19 8:16 ` Paul Cercueil 2023-05-19 10:58 ` Stanley Chang[昌育德] 2023-05-19 11:01 ` Arnd Bergmann 2023-05-19 17:40 ` Vinod Koul 2023-05-20 5:18 ` Stanley Chang[昌育德] 2023-05-20 5:10 ` Stanley Chang[昌育德] 2023-05-20 9:04 ` kernel test robot 2023-05-19 4:58 ` [PATCH v1 3/3] dt-bindings: phy: realtek: Add the doc about " Stanley Chang
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