From: Krzysztof Kozlowski <krzk@kernel.org>
To: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Oded Gabbay" <ogabbay@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Sumit Semwal" <sumit.semwal@linaro.org>,
"Christian König" <christian.koenig@amd.com>,
"Sebastian Reichel" <sebastian.reichel@collabora.com>,
"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>,
"Jeff Hugo" <jeff.hugo@oss.qualcomm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-doc@vger.kernel.org,
linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org
Subject: Re: [PATCH v3 02/10] arm64: dts: rockchip: Add nodes for NPU and its MMU to rk3588s
Date: Mon, 19 May 2025 10:47:57 +0200 [thread overview]
Message-ID: <f8cf2c4e-0ae2-4799-bda8-654b4f515846@kernel.org> (raw)
In-Reply-To: <CAAObsKDsO=5uK3BEn6BOgatb+y73jc-Se6mmSbhwG9P_1nVtwg@mail.gmail.com>
On 19/05/2025 10:27, Tomeu Vizoso wrote:
> On Mon, May 19, 2025 at 8:08 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>
>> On 16/05/2025 18:53, Tomeu Vizoso wrote:
>>> See Chapter 36 "RKNN" from the RK3588 TRM (Part 1).
>>>
>>> This is a derivative of NVIDIA's NVDLA, but with its own front-end
>>> processor.
>>>
>>> The IP is divided in three cores, programmed independently. The first
>>> core though is special, requiring to be powered on before any of the
>>> others can be used.
>>>
>>> The IOMMU of the first core is also special in that it has two subunits
>>> (read/write?) that need to be programmed in sync.
>>>
>>> v2:
>>> - Have one device for each NPU core (Sebastian Reichel)
>>> - Have one device for each IOMMU (Sebastian Reichel)
>>> - Correctly sort nodes (Diederik de Haas)
>>> - Add rockchip,iommu compatible to IOMMU nodes (Sebastian Reichel)
>>>
>>> v3:
>>> - Adapt to a split of the register block in the DT bindings (Nicolas
>>> Frattaroli)
>>>
>>> Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
>>> ---
>>> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 85 +++++++++++++++++++++++++++
>>> 1 file changed, 85 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
>>> index 1e18ad93ba0ebdad31642b88ff0f90ef4e8dc76f..7b961ab838212fad8e4a70390fdc917a828433a9 100644
>>> --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
>>> +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
>>> @@ -1136,6 +1136,91 @@ power-domain@RK3588_PD_SDMMC {
>>> };
>>> };
>>>
>>> + rknn_core_top: npu-core@fdab0000 {
>>
>> npu@
>>
>>> + compatible = "rockchip,rk3588-rknn-core-top", "rockchip,rknn-core-top";
>>
>> You never tested this. Test before sending instead of relying on us or
>> after merging.
>
> Can you please extend on this? I have tested this series before
> sending and I don't understand what you mean here.
I mean exactly that: it was not tested, because warnings are clearly
visible/expected. I also found now Rob's report which even shows you the
warnings, so how come you still claim this was tested?
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-05-19 8:48 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-16 16:53 [PATCH v3 00/10] New DRM accel driver for Rockchip's RKNN NPU Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 01/10] dt-bindings: npu: rockchip,rknn: Add bindings Tomeu Vizoso
2025-05-16 18:30 ` Rob Herring (Arm)
2025-05-16 19:31 ` Rob Herring (Arm)
2025-05-17 3:33 ` Rob Herring (Arm)
2025-05-17 18:22 ` Rob Herring (Arm)
2025-05-17 20:22 ` Rob Herring (Arm)
2025-05-18 5:25 ` Rob Herring (Arm)
2025-05-18 7:25 ` Rob Herring (Arm)
2025-05-18 8:26 ` Rob Herring (Arm)
2025-05-18 9:26 ` Rob Herring (Arm)
2025-05-18 19:29 ` Rob Herring (Arm)
2025-05-19 0:00 ` Rob Herring (Arm)
2025-05-19 0:31 ` Rob Herring (Arm)
2025-05-19 3:16 ` Rob Herring (Arm)
2025-05-19 4:32 ` Rob Herring (Arm)
2025-05-19 6:32 ` Rob Herring (Arm)
2025-05-19 7:18 ` Rob Herring (Arm)
2025-05-19 8:18 ` Rob Herring (Arm)
2025-05-19 9:18 ` Rob Herring (Arm)
2025-05-19 9:34 ` Rob Herring (Arm)
2025-05-19 9:49 ` Rob Herring (Arm)
2025-05-19 10:34 ` Rob Herring (Arm)
2025-05-19 11:19 ` Rob Herring (Arm)
2025-05-19 11:35 ` Rob Herring (Arm)
2025-05-22 18:03 ` Nicolas Dufresne
2025-05-19 6:07 ` Krzysztof Kozlowski
2025-05-16 16:53 ` [PATCH v3 02/10] arm64: dts: rockchip: Add nodes for NPU and its MMU to rk3588s Tomeu Vizoso
2025-05-19 6:08 ` Krzysztof Kozlowski
2025-05-19 8:27 ` Tomeu Vizoso
2025-05-19 8:47 ` Krzysztof Kozlowski [this message]
2025-05-19 10:06 ` Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 03/10] arm64: dts: rockchip: Enable the NPU on quartzpro64 Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 04/10] accel/rocket: Add registers header Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 05/10] accel/rocket: Add a new driver for Rockchip's NPU Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 06/10] accel/rocket: Add IOCTL for BO creation Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 07/10] accel/rocket: Add job submission IOCTL Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 08/10] accel/rocket: Add IOCTLs for synchronizing memory accesses Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 09/10] arm64: dts: rockchip: add pd_npu label for RK3588 power domains Tomeu Vizoso
2025-05-16 16:53 ` [PATCH v3 10/10] arm64: dts: rockchip: enable NPU on ROCK 5B Tomeu Vizoso
2025-05-17 13:18 ` [PATCH v3 00/10] New DRM accel driver for Rockchip's RKNN NPU Rob Herring (Arm)
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