From: Vivek Gautam <vivek.gautam@codeaurora.org>
To: Rob Herring <robh@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>,
Jordan Crouse <jcrouse@codeaurora.org>,
Joerg Roedel <joro@8bytes.org>,
Andy Gross <andy.gross@linaro.org>,
Will Deacon <will.deacon@arm.com>,
"list@263.net:IOMMU DRIVERS"
<iommu@lists.linux-foundation.org>Joerg Roedel
<joro@8bytes.org>iommu@lists.linux-foundation.org,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, Mark Rutland <mark.rutland@arm.com>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
open list <linux-kernel@vger.kernel.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 3/3] dts: arm64/sdm845: Add node for qcom,smmu-v2
Date: Mon, 27 Aug 2018 14:26:21 +0530 [thread overview]
Message-ID: <f8d638bd-d0cb-e03d-bac2-3bc2e30c5422@codeaurora.org> (raw)
In-Reply-To: <20180814225750.GA31263@rob-hp-laptop>
Hi Rob, Robin,
On 8/15/2018 4:27 AM, Rob Herring wrote:
> On Wed, Aug 15, 2018 at 01:09:43AM +0530, Vivek Gautam wrote:
>> Adding Jordan here.
>>
>> On Tue, Aug 14, 2018 at 4:19 PM, Robin Murphy <robin.murphy@arm.com> wrote:
>>> Hi Vivek,
>>>
>>> On 14/08/18 11:27, Vivek Gautam wrote:
>>>> Add device node for qcom,smmu-v2 available on sdm845.
>>>> This smmu is available only to GPU device.
>>>>
>>>> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
>>>> ---
>>>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 23 +++++++++++++++++++++++
>>>> 1 file changed, 23 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>> index 1c2be2082f33..bd1ec5fa5146 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
>>>> @@ -6,6 +6,7 @@
>>>> */
>>>> #include <dt-bindings/clock/qcom,gcc-sdm845.h>
>>>> +#include <dt-bindings/clock/qcom,gpucc-sdm845.h>
>>>> #include <dt-bindings/clock/qcom,rpmh.h>
>>>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>>>> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>>>> @@ -989,6 +990,28 @@
>>>> cell-index = <0>;
>>>> };
>>>> + gpu_smmu: iommu@5040000 {
>>>> + compatible = "qcom,sdm845-smmu-v2",
>>>> "qcom,smmu-v2";
>>>
>>> Which of "sdm845" or "msm8996"[1] is the actual SoC name here?
>> Well, the bindings use the SoC prefix with smmu-v2, so it should be
>> sdm845 for this SoC. This is same as I posted in my v1 of the series [2].
>> Using 8996 based string in sdm845 makes things look awful.
> You need to list valid values of '<soc>' in the binding. Otherwise we
> get this confusion.
Sorry for delayed response, I was away on vacation.
I will list down the valid values for '<soc>' as suggested, and respin
this series, and
smmu bindings patch that comes as part of the runtime pm series [1].
[1] https://lore.kernel.org/patchwork/patch/968017/
Best regards
Vivek
>
> Rob
next prev parent reply other threads:[~2018-08-27 8:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-14 10:27 [PATCH v2 0/3] Enable smmu support on sdm845 Vivek Gautam
2018-08-14 10:27 ` [PATCH v2 1/3] dt-bindings: arm-smmu: Add binding doc for Qcom smmu-500 Vivek Gautam
2018-08-14 10:27 ` [PATCH v2 2/3] dts: arm64/sdm845: Add node for arm,mmu-500 Vivek Gautam
2018-08-14 10:27 ` [PATCH v2 3/3] dts: arm64/sdm845: Add node for qcom,smmu-v2 Vivek Gautam
2018-08-14 10:49 ` Robin Murphy
2018-08-14 19:39 ` Vivek Gautam
2018-08-14 22:57 ` Rob Herring
2018-08-27 8:56 ` Vivek Gautam [this message]
[not found] ` <f8d638bd-d0cb-e03d-bac2-3bc2e30c5422-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-08-27 11:12 ` Vivek Gautam
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