[PATCH v2 0/6] soc: qcom: Add support for SM4450

[PATCH v2 0/6] soc: qcom: Add support for SM4450

[Tengfei Fan]

This series adds CPU, SoC and board compatible support for SM4450.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
v1 -> v2:
  - use hypens replace of underscores in node name
  - add empty lines before child nodes
  - drop SCM node
  - document qcom,sm4450-pdc compatible
  - drop clock-frequecny
  - align vertically
  - add reg after conmpatible, then ranges follow
  - update core compatible to standard ARM core name
  - add dcc related parameters in bootargs node
  - keep patch code have reasonable sort
  - drop unnecessary copyright
  - separate bindings to a single patch

previous discussion here:
[1] https://lore.kernel.org/linux-arm-msm/20230719100135.21325-1-quic_tengfan@quicinc.com/

Tengfei Fan (6):
  dt-bindings: qcom,pdc: add qcom,sm4450-pdc compatible
  dt-bindings: arm: qcom: Document SM4450 SoC and boards
  arm64: dts: qcom: Adds base SM4450 DTSI
  arm64: dts: qcom: Add base SM4450 QRD DTS
  dt-bindings: arm: qcom,ids: add SoC ID for SM4450
  soc: qcom: socinfo: add SM4450 ID

 .../devicetree/bindings/arm/qcom.yaml         |   6 +
 .../interrupt-controller/qcom,pdc.yaml        |   1 +
 arch/arm64/boot/dts/qcom/Makefile             |   1 +
 arch/arm64/boot/dts/qcom/sm4450-qrd.dts       |  18 +
 arch/arm64/boot/dts/qcom/sm4450.dtsi          | 431 ++++++++++++++++++
 drivers/soc/qcom/socinfo.c                    |   1 +
 include/dt-bindings/arm/qcom,ids.h            |   1 +
 7 files changed, 459 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
 create mode 100644 arch/arm64/boot/dts/qcom/sm4450.dtsi


base-commit: ccff6d117d8dc8d8d86e8695a75e5f8b01e573bf
-- 
2.17.1

[PATCH v2 1/6] dt-bindings: qcom,pdc: add qcom,sm4450-pdc compatible

[Tengfei Fan]

Document qcom,sm4450-pdc compatible for support SM4450 DT upstream.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index a106ba6e810b..bf7648f55125 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -34,6 +34,7 @@ properties:
           - qcom,sdm845-pdc
           - qcom,sdx55-pdc
           - qcom,sdx65-pdc
+          - qcom,sm4450-pdc
           - qcom,sm6350-pdc
           - qcom,sm8150-pdc
           - qcom,sm8250-pdc
-- 
2.17.1

Re: [PATCH v2 1/6] dt-bindings: qcom,pdc: add qcom,sm4450-pdc compatible

[Krzysztof Kozlowski]

On 27/07/2023 04:35, Tengfei Fan wrote:
> Document qcom,sm4450-pdc compatible for support SM4450 DT upstream.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH v2 2/6] dt-bindings: arm: qcom: Document SM4450 SoC and boards

[Tengfei Fan]

Document the SM4450 SoC binding and also the boards using it.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 450f616774e0..5c6a82b2efea 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -72,6 +72,7 @@ description: |
         sdx65
         sdx75
         sm4250
+        sm4450
         sm6115
         sm6115p
         sm6125
@@ -902,6 +903,11 @@ properties:
           - const: qcom,qrb4210
           - const: qcom,sm4250
 
+      - items:
+          - enum:
+              - qcom,sm4450-qrd
+          - const: qcom,sm4450
+
       - items:
           - enum:
               - fxtec,pro1x
-- 
2.17.1

Re: [PATCH v2 2/6] dt-bindings: arm: qcom: Document SM4450 SoC and boards

[Krzysztof Kozlowski]

On 27/07/2023 04:35, Tengfei Fan wrote:
> Document the SM4450 SoC binding and also the boards using it.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

[PATCH v2 3/6] arm64: dts: qcom: Adds base SM4450 DTSI

[Tengfei Fan]

This add based DTSI for SM4450 SoC and includes base description of
CPUs and interrupt-controller which helps to boot to shell with dcc
console on boards with this SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sm4450.dtsi | 431 +++++++++++++++++++++++++++
 1 file changed, 431 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm4450.dtsi

diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
new file mode 100644
index 000000000000..c4e5b33f5169
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
@@ -0,0 +1,431 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	interrupt-parent = <&intc>;
+
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clocks{
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			clock-frequency = <76800000>;
+			#clock-cells = <0>;
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32000>;
+			#clock-cells = <0>;
+		};
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		CPU0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+			next-level-cache = <&L2_0>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_0: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+
+				L3_0: l3-cache {
+					compatible = "cache";
+					cache-level = <3>;
+					cache-unified;
+				};
+			};
+		};
+
+		CPU1: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x100>;
+			enable-method = "psci";
+			next-level-cache = <&L2_100>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_100: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU2: cpu@200 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x200>;
+			enable-method = "psci";
+			next-level-cache = <&L2_200>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_200: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU3: cpu@300 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x300>;
+			enable-method = "psci";
+			next-level-cache = <&L2_300>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_300: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU4: cpu@400 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x400>;
+			enable-method = "psci";
+			next-level-cache = <&L2_400>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_400: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU5: cpu@500 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a55";
+			reg = <0x0 0x500>;
+			enable-method = "psci";
+			next-level-cache = <&L2_500>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_500: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU6: cpu@600 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78";
+			reg = <0x0 0x600>;
+			enable-method = "psci";
+			next-level-cache = <&L2_600>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_600: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		CPU7: cpu@700 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a78";
+			reg = <0x0 0x700>;
+			enable-method = "psci";
+			next-level-cache = <&L2_700>;
+			power-domains = <&CPU_PD0>;
+			power-domain-names = "psci";
+			#cooling-cells = <2>;
+
+			L2_700: l2-cache {
+				compatible = "cache";
+				cache-level = <2>;
+				cache-unified;
+				next-level-cache = <&L3_0>;
+			};
+		};
+
+		cpu-map {
+			cluster0 {
+				core0 {
+					cpu = <&CPU0>;
+				};
+
+				core1 {
+					cpu = <&CPU1>;
+				};
+
+				core2 {
+					cpu = <&CPU2>;
+				};
+
+				core3 {
+					cpu = <&CPU3>;
+				};
+
+				core4 {
+					cpu = <&CPU4>;
+				};
+
+				core5 {
+					cpu = <&CPU5>;
+				};
+
+				core6 {
+					cpu = <&CPU6>;
+				};
+
+				core7 {
+					cpu = <&CPU7>;
+				};
+			};
+		};
+
+		idle-states {
+			entry-method = "psci";
+
+			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x40000004>;
+				entry-latency-us = <800>;
+				exit-latency-us = <750>;
+				min-residency-us = <4090>;
+				local-timer-stop;
+			};
+
+			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x40000004>;
+				entry-latency-us = <600>;
+				exit-latency-us = <1550>;
+				min-residency-us = <4791>;
+				local-timer-stop;
+			};
+		};
+
+		domain-idle-states {
+			CLUSTER_SLEEP_0: cluster-sleep-0 {
+				compatible = "domain-idle-state";
+				arm,psci-suspend-param = <0x41000044>;
+				entry-latency-us = <1050>;
+				exit-latency-us = <2500>;
+				min-residency-us = <5309>;
+			};
+
+			CLUSTER_SLEEP_1: cluster-sleep-1 {
+				compatible = "domain-idle-state";
+				arm,psci-suspend-param = <0x41003344>;
+				entry-latency-us = <1561>;
+				exit-latency-us = <2801>;
+				min-residency-us = <8550>;
+			};
+		};
+	};
+
+	memory@a0000000 {
+		device_type = "memory";
+		/* We expect the bootloader to fill in the size */
+		reg = <0x0 0xa0000000 0x0 0x0>;
+	};
+
+	pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	psci {
+		compatible = "arm,psci-1.0";
+		method = "smc";
+
+		CPU_PD0: power-domain-cpu0 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD1: power-domain-cpu1 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD2: power-domain-cpu2 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD3: power-domain-cpu3 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+		};
+
+		CPU_PD4: power-domain-cpu4 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CPU_PD5: power-domain-cpu5 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CPU_PD6: power-domain-cpu6 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CPU_PD7: power-domain-cpu7 {
+			#power-domain-cells = <0>;
+			power-domains = <&CLUSTER_PD>;
+			domain-idle-states = <&BIG_CPU_SLEEP_0>;
+		};
+
+		CLUSTER_PD: power-domain-cpu-cluster0 {
+			#power-domain-cells = <0>;
+			domain-idle-states = <&CLUSTER_SLEEP_0>, <&CLUSTER_SLEEP_1>;
+		};
+	};
+
+	soc: soc@0 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0 0 0 0 0x10 0>;
+		dma-ranges = <0 0 0 0 0x10 0>;
+		compatible = "simple-bus";
+
+		tcsr_mutex: hwlock@1f40000 {
+			compatible = "qcom,tcsr-mutex";
+			reg = <0x0 0x01f40000 0x0 0x40000>;
+			#hwlock-cells = <1>;
+		};
+
+		pdc: interrupt-controller@b220000 {
+			compatible = "qcom,sm4450-pdc", "qcom,pdc";
+			reg = <0 0x0b220000 0 0x30000>, <0 0x174000f0 0 0x64>;
+			qcom,pdc-ranges = <0 480 94>, <94 494 31>,
+					  <125 63 1>;
+			#interrupt-cells = <2>;
+			interrupt-parent = <&intc>;
+			interrupt-controller;
+		};
+
+		intc: interrupt-controller@17200000 {
+			compatible = "arm,gic-v3";
+			reg = <0x0 0x17200000 0x0 0x10000>,     /* GICD */
+			      <0x0 0x17260000 0x0 0x100000>;    /* GICR * 8 */
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			#redistributor-regions = <1>;
+			redistributor-stride = <0x0 0x20000>;
+		};
+
+		timer@17420000 {
+			compatible = "arm,armv7-timer-mem";
+			reg = <0x0 0x17420000 0x0 0x1000>;
+			ranges = <0 0 0 0x20000000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			frame@17421000 {
+				reg = <0x17421000 0x1000>,
+				      <0x17422000 0x1000>;
+				frame-number = <0>;
+				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+			};
+
+			frame@17423000 {
+				reg = <0x17423000 0x1000>;
+				frame-number = <1>;
+				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			frame@17425000 {
+				reg = <0x17425000 0x1000>;
+				frame-number = <2>;
+				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			frame@17427000 {
+				reg = <0x17427000 0x1000>;
+				frame-number = <3>;
+				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			frame@17429000 {
+				reg = <0x17429000 0x1000>;
+				frame-number = <4>;
+				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			frame@1742b000 {
+				reg = <0x1742b000 0x1000>;
+				frame-number = <5>;
+				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+
+			frame@1742d000 {
+				reg = <0x1742d000 0x1000>;
+				frame-number = <6>;
+				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+};
-- 
2.17.1

Re: [PATCH v2 3/6] arm64: dts: qcom: Adds base SM4450 DTSI

[Krzysztof Kozlowski]

On 27/07/2023 04:35, Tengfei Fan wrote:
> This add based DTSI for SM4450 SoC and includes base description of

Nit, no need to resend, Please do not use "This commit/patch", but
imperative mood. See longer explanation here:
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95

> CPUs and interrupt-controller which helps to boot to shell with dcc
> console on boards with this SoC.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sm4450.dtsi | 431 +++++++++++++++++++++++++++
>  1 file changed, 431 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sm4450.dtsi
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH v2 3/6] arm64: dts: qcom: Adds base SM4450 DTSI

[Tengfei Fan]

在 7/27/2023 2:53 PM, Krzysztof Kozlowski 写道:
> On 27/07/2023 04:35, Tengfei Fan wrote:
>> This add based DTSI for SM4450 SoC and includes base description of
> 
> Nit, no need to resend, Please do not use "This commit/patch", but
> imperative mood. See longer explanation here:
> https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
Thanks review this patch, sure, I will pay attention to the relevant 
rules in the future.
> 
>> CPUs and interrupt-controller which helps to boot to shell with dcc
>> console on boards with this SoC.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sm4450.dtsi | 431 +++++++++++++++++++++++++++
>>   1 file changed, 431 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/qcom/sm4450.dtsi
>>
> 
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> 
> Best regards,
> Krzysztof
> 

-- 
Thx and BRs,
Tengfei Fan

[PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Tengfei Fan]

Add DTS for Qualcomm QRD platform which uses SM4450 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 arch/arm64/boot/dts/qcom/Makefile       |  1 +
 arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
 2 files changed, 19 insertions(+)
 create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 337abc4ceb17..db805d0929c8 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
new file mode 100644
index 000000000000..04ad1dd4285a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "sm4450.dtsi"
+/ {
+	model = "Qualcomm Technologies, Inc. SM4450 QRD";
+	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
+
+	aliases { };
+
+	chosen {
+		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
+	};
+};
-- 
2.17.1

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Krzysztof Kozlowski]

On 27/07/2023 04:35, Tengfei Fan wrote:
> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/Makefile       |  1 +
>  arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>  2 files changed, 19 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 337abc4ceb17..db805d0929c8 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
> new file mode 100644
> index 000000000000..04ad1dd4285a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
> @@ -0,0 +1,18 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include "sm4450.dtsi"
> +/ {
> +	model = "Qualcomm Technologies, Inc. SM4450 QRD";
> +	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
> +
> +	aliases { };
> +
> +	chosen {
> +		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";

No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
(again don't add fake stuff). So the only suitable argument is console,
but this should be actually used via stdout path, although it seems
there is no device node for such usage?



Best regards,
Krzysztof

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Konrad Dybcio]

On 27.07.2023 08:56, Krzysztof Kozlowski wrote:
> On 27/07/2023 04:35, Tengfei Fan wrote:
>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>  arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>  arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>  2 files changed, 19 insertions(+)
>>  create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 337abc4ceb17..db805d0929c8 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>>  dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
>>  dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
>>  dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
>> +dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
>>  dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>> new file mode 100644
>> index 000000000000..04ad1dd4285a
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>> @@ -0,0 +1,18 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sm4450.dtsi"
>> +/ {
>> +	model = "Qualcomm Technologies, Inc. SM4450 QRD";
>> +	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>> +
>> +	aliases { };
>> +
>> +	chosen {
>> +		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
> 
> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
> (again don't add fake stuff). So the only suitable argument is console,
> but this should be actually used via stdout path, although it seems
> there is no device node for such usage?
hvc totally comes from Qualcomm downstream and all the Gunyah
shenanigans..

Tengfei, please ensure the patches are tested against linux-next
with no additional changes or modules, with a clean Linux userspace
(or at least a ramdisk).

Konrad

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Tengfei Fan]

在 7/27/2023 3:59 PM, Konrad Dybcio 写道:
> On 27.07.2023 08:56, Krzysztof Kozlowski wrote:
>> On 27/07/2023 04:35, Tengfei Fan wrote:
>>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>>
>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>>   arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>>   2 files changed, 19 insertions(+)
>>>   create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>> index 337abc4ceb17..db805d0929c8 100644
>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
>>> +dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
>>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>> new file mode 100644
>>> index 000000000000..04ad1dd4285a
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>> @@ -0,0 +1,18 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "sm4450.dtsi"
>>> +/ {
>>> +	model = "Qualcomm Technologies, Inc. SM4450 QRD";
>>> +	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>>> +
>>> +	aliases { };
>>> +
>>> +	chosen {
>>> +		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
>>
>> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
>> (again don't add fake stuff). So the only suitable argument is console,
>> but this should be actually used via stdout path, although it seems
>> there is no device node for such usage?
> hvc totally comes from Qualcomm downstream and all the Gunyah
> shenanigans..
> 
> Tengfei, please ensure the patches are tested against linux-next
> with no additional changes or modules, with a clean Linux userspace
> (or at least a ramdisk).
> 
> Konrad
Hi Konrad,
All these patches are tesed on linux-next, and get DCC console.
For support this test, I did a temporal for enable CONFIG_HVC_DCC(this 
change haven't push to upstream).

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Konrad Dybcio]

On 27.07.2023 10:49, Tengfei Fan wrote:
> 
> 
> 在 7/27/2023 3:59 PM, Konrad Dybcio 写道:
>> On 27.07.2023 08:56, Krzysztof Kozlowski wrote:
>>> On 27/07/2023 04:35, Tengfei Fan wrote:
>>>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>>>
>>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>>> ---
>>>>   arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>>>   arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>>>   2 files changed, 19 insertions(+)
>>>>   create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>>> index 337abc4ceb17..db805d0929c8 100644
>>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)    += sdm850-lenovo-yoga-c630.dtb
>>>>   dtb-$(CONFIG_ARCH_QCOM)    += sdm850-samsung-w737.dtb
>>>>   dtb-$(CONFIG_ARCH_QCOM)    += sdx75-idp.dtb
>>>>   dtb-$(CONFIG_ARCH_QCOM)    += sm4250-oneplus-billie2.dtb
>>>> +dtb-$(CONFIG_ARCH_QCOM)    += sm4450-qrd.dtb
>>>>   dtb-$(CONFIG_ARCH_QCOM)    += sm6115-fxtec-pro1x.dtb
>>>>   dtb-$(CONFIG_ARCH_QCOM)    += sm6115p-lenovo-j606f.dtb
>>>>   dtb-$(CONFIG_ARCH_QCOM)    += sm6125-sony-xperia-seine-pdx201.dtb
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>> new file mode 100644
>>>> index 000000000000..04ad1dd4285a
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>> @@ -0,0 +1,18 @@
>>>> +// SPDX-License-Identifier: BSD-3-Clause
>>>> +/*
>>>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +
>>>> +#include "sm4450.dtsi"
>>>> +/ {
>>>> +    model = "Qualcomm Technologies, Inc. SM4450 QRD";
>>>> +    compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>>>> +
>>>> +    aliases { };
>>>> +
>>>> +    chosen {
>>>> +        bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
>>>
>>> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
>>> (again don't add fake stuff). So the only suitable argument is console,
>>> but this should be actually used via stdout path, although it seems
>>> there is no device node for such usage?
>> hvc totally comes from Qualcomm downstream and all the Gunyah
>> shenanigans..
>>
>> Tengfei, please ensure the patches are tested against linux-next
>> with no additional changes or modules, with a clean Linux userspace
>> (or at least a ramdisk).
>>
>> Konrad
> Hi Konrad,
> All these patches are tesed on linux-next, and get DCC console.
> For support this test, I did a temporal for enable CONFIG_HVC_DCC(this change haven't push to upstream).
So what you've said is that you've not tested against linux-next + this patchset.

You're supposed to `git checkout linux-next/master && (pick the series
you're sending)` and test just that. No less, no more. Preferably with
the upstream arm64 defconfig.

Konrad

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Tengfei Fan]

在 7/27/2023 9:08 PM, Konrad Dybcio 写道:
> On 27.07.2023 10:49, Tengfei Fan wrote:
>>
>>
>> 在 7/27/2023 3:59 PM, Konrad Dybcio 写道:
>>> On 27.07.2023 08:56, Krzysztof Kozlowski wrote:
>>>> On 27/07/2023 04:35, Tengfei Fan wrote:
>>>>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>>>>
>>>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>>>>    arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>>>>    2 files changed, 19 insertions(+)
>>>>>    create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>>>> index 337abc4ceb17..db805d0929c8 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>>>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)    += sdm850-lenovo-yoga-c630.dtb
>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sdm850-samsung-w737.dtb
>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sdx75-idp.dtb
>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm4250-oneplus-billie2.dtb
>>>>> +dtb-$(CONFIG_ARCH_QCOM)    += sm4450-qrd.dtb
>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm6115-fxtec-pro1x.dtb
>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm6115p-lenovo-j606f.dtb
>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm6125-sony-xperia-seine-pdx201.dtb
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>> new file mode 100644
>>>>> index 000000000000..04ad1dd4285a
>>>>> --- /dev/null
>>>>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>> @@ -0,0 +1,18 @@
>>>>> +// SPDX-License-Identifier: BSD-3-Clause
>>>>> +/*
>>>>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>>>>> + */
>>>>> +
>>>>> +/dts-v1/;
>>>>> +
>>>>> +#include "sm4450.dtsi"
>>>>> +/ {
>>>>> +    model = "Qualcomm Technologies, Inc. SM4450 QRD";
>>>>> +    compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>>>>> +
>>>>> +    aliases { };
>>>>> +
>>>>> +    chosen {
>>>>> +        bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
>>>>
>>>> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
>>>> (again don't add fake stuff). So the only suitable argument is console,
>>>> but this should be actually used via stdout path, although it seems
>>>> there is no device node for such usage?
>>> hvc totally comes from Qualcomm downstream and all the Gunyah
>>> shenanigans..
>>>
>>> Tengfei, please ensure the patches are tested against linux-next
>>> with no additional changes or modules, with a clean Linux userspace
>>> (or at least a ramdisk).
>>>
>>> Konrad
>> Hi Konrad,
>> All these patches are tesed on linux-next, and get DCC console.
>> For support this test, I did a temporal for enable CONFIG_HVC_DCC(this change haven't push to upstream).
> So what you've said is that you've not tested against linux-next + this patchset.
> 
> You're supposed to `git checkout linux-next/master && (pick the series
> you're sending)` and test just that. No less, no more. Preferably with
> the upstream arm64 defconfig.
> 
> Konrad
Hi Konrad,
Sorry, my explain isn't enough before.

My tested against linux-next + this patchset, all my test code from 
upstream linux-next, haven't downstream code related.

About the temporal patch which enable CONFIG_HVC_DCC, because we haven't 
enable uart, so I enable CONFIG_HVC_DCC for verify if we can get DCC 
console through "make ARCH=arm64 menuconfig" on linux-next/master, but 
this patchset haven't contain this enable CONFIG_HVC_DCC patch, because 
upstream seems don't want to enable CONFIG_HVC_DCC defaultly.

Besides these, I all do dtbs_check and checkpatch.pl check, all these 
check passed.


-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Trilok Soni]

On 7/27/2023 5:49 PM, Tengfei Fan wrote:
> 
> 
> 在 7/27/2023 9:08 PM, Konrad Dybcio 写道:
>> On 27.07.2023 10:49, Tengfei Fan wrote:
>>>
>>>
>>> 在 7/27/2023 3:59 PM, Konrad Dybcio 写道:
>>>> On 27.07.2023 08:56, Krzysztof Kozlowski wrote:
>>>>> On 27/07/2023 04:35, Tengfei Fan wrote:
>>>>>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>>>>>
>>>>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>>>>> ---
>>>>>>    arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>>>>>    arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>>>>>    2 files changed, 19 insertions(+)
>>>>>>    create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>>>
>>>>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile 
>>>>>> b/arch/arm64/boot/dts/qcom/Makefile
>>>>>> index 337abc4ceb17..db805d0929c8 100644
>>>>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>>>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>>>>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)    += 
>>>>>> sdm850-lenovo-yoga-c630.dtb
>>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sdm850-samsung-w737.dtb
>>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sdx75-idp.dtb
>>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm4250-oneplus-billie2.dtb
>>>>>> +dtb-$(CONFIG_ARCH_QCOM)    += sm4450-qrd.dtb
>>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm6115-fxtec-pro1x.dtb
>>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm6115p-lenovo-j606f.dtb
>>>>>>    dtb-$(CONFIG_ARCH_QCOM)    += sm6125-sony-xperia-seine-pdx201.dtb
>>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts 
>>>>>> b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>>> new file mode 100644
>>>>>> index 000000000000..04ad1dd4285a
>>>>>> --- /dev/null
>>>>>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>>> @@ -0,0 +1,18 @@
>>>>>> +// SPDX-License-Identifier: BSD-3-Clause
>>>>>> +/*
>>>>>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All 
>>>>>> rights reserved.
>>>>>> + */
>>>>>> +
>>>>>> +/dts-v1/;
>>>>>> +
>>>>>> +#include "sm4450.dtsi"
>>>>>> +/ {
>>>>>> +    model = "Qualcomm Technologies, Inc. SM4450 QRD";
>>>>>> +    compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>>>>>> +
>>>>>> +    aliases { };
>>>>>> +
>>>>>> +    chosen {
>>>>>> +        bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 
>>>>>> cpuidle.off=1";
>>>>>
>>>>> No earlycon, no hvc.enable (there is no such parameter), no 
>>>>> cpuidle.off
>>>>> (again don't add fake stuff). So the only suitable argument is 
>>>>> console,
>>>>> but this should be actually used via stdout path, although it seems
>>>>> there is no device node for such usage?
>>>> hvc totally comes from Qualcomm downstream and all the Gunyah
>>>> shenanigans..
>>>>
>>>> Tengfei, please ensure the patches are tested against linux-next
>>>> with no additional changes or modules, with a clean Linux userspace
>>>> (or at least a ramdisk).
>>>>
>>>> Konrad
>>> Hi Konrad,
>>> All these patches are tesed on linux-next, and get DCC console.
>>> For support this test, I did a temporal for enable 
>>> CONFIG_HVC_DCC(this change haven't push to upstream).
>> So what you've said is that you've not tested against linux-next + 
>> this patchset.
>>
>> You're supposed to `git checkout linux-next/master && (pick the series
>> you're sending)` and test just that. No less, no more. Preferably with
>> the upstream arm64 defconfig.
>>
>> Konrad
> Hi Konrad,
> Sorry, my explain isn't enough before.
> 
> My tested against linux-next + this patchset, all my test code from 
> upstream linux-next, haven't downstream code related.
> 
> About the temporal patch which enable CONFIG_HVC_DCC, because we haven't 
> enable uart, so I enable CONFIG_HVC_DCC for verify if we can get DCC 
> console through "make ARCH=arm64 menuconfig" on linux-next/master, but 
> this patchset haven't contain this enable CONFIG_HVC_DCC patch, because 
> upstream seems don't want to enable CONFIG_HVC_DCC defaultly.
> 
> Besides these, I all do dtbs_check and checkpatch.pl check, all these 
> check passed.

CONFIG_HVC_DCC is at upstream. It is not necessary to have UART to test 
the kernel w/ the console.

One can boot the kernel w/ JTAG console too. This will allow us to 
submit the patches without submitting the UART / clocks dependencies.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/tty/hvc/hvc_dcc.c


-- 
---Trilok Soni

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Tengfei Fan]

在 7/27/2023 2:56 PM, Krzysztof Kozlowski 写道:
> On 27/07/2023 04:35, Tengfei Fan wrote:
>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>   arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>   2 files changed, 19 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 337abc4ceb17..db805d0929c8 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
>> +dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>> new file mode 100644
>> index 000000000000..04ad1dd4285a
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>> @@ -0,0 +1,18 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sm4450.dtsi"
>> +/ {
>> +	model = "Qualcomm Technologies, Inc. SM4450 QRD";
>> +	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>> +
>> +	aliases { };
>> +
>> +	chosen {
>> +		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
> 
> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
> (again don't add fake stuff). So the only suitable argument is console,
> but this should be actually used via stdout path, although it seems
> there is no device node for such usage?
Hi Krzysztof,
Checked upstream linux kernel code, there is not "hvc_dcc.enable", but 
have other parameters, like earlycon, cpuidle.off.
Do you mean we should not set "earlycon=hvc0 cpuidle.off=1" parameters, 
right? only need: bootargs = "console=hvc0" ?
> 
> 
> 
> Best regards,
> Krzysztof
> 

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Krzysztof Kozlowski]

On 27/07/2023 10:27, Tengfei Fan wrote:
> 
> 
> 在 7/27/2023 2:56 PM, Krzysztof Kozlowski 写道:
>> On 27/07/2023 04:35, Tengfei Fan wrote:
>>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>>
>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>>   arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>>   2 files changed, 19 insertions(+)
>>>   create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>> index 337abc4ceb17..db805d0929c8 100644
>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
>>> +dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
>>>   dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
>>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>> new file mode 100644
>>> index 000000000000..04ad1dd4285a
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>> @@ -0,0 +1,18 @@
>>> +// SPDX-License-Identifier: BSD-3-Clause
>>> +/*
>>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "sm4450.dtsi"
>>> +/ {
>>> +	model = "Qualcomm Technologies, Inc. SM4450 QRD";
>>> +	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>>> +
>>> +	aliases { };
>>> +
>>> +	chosen {
>>> +		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
>>
>> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
>> (again don't add fake stuff). So the only suitable argument is console,
>> but this should be actually used via stdout path, although it seems
>> there is no device node for such usage?
> Hi Krzysztof,
> Checked upstream linux kernel code, there is not "hvc_dcc.enable", but 
> have other parameters, like earlycon, cpuidle.off.
> Do you mean we should not set "earlycon=hvc0 cpuidle.off=1" parameters, 

Of course not. Why production code would have earlycon? This is debug
argument, not suitable for each user of this DTS.

cpuidle.off is neither explained nor needed. Otherwise please add a
comment why this is part of hardware description.

> right? only need: bootargs = "console=hvc0" ?

You should use stdout-path if possible. If not, then only console.

Best regards,
Krzysztof

Re: [PATCH v2 4/6] arm64: dts: qcom: Add base SM4450 QRD DTS

[Tengfei Fan]

在 7/27/2023 4:50 PM, Krzysztof Kozlowski 写道:
> On 27/07/2023 10:27, Tengfei Fan wrote:
>>
>>
>> 在 7/27/2023 2:56 PM, Krzysztof Kozlowski 写道:
>>> On 27/07/2023 04:35, Tengfei Fan wrote:
>>>> Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
>>>>
>>>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/Makefile       |  1 +
>>>>    arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 18 ++++++++++++++++++
>>>>    2 files changed, 19 insertions(+)
>>>>    create mode 100644 arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>>>> index 337abc4ceb17..db805d0929c8 100644
>>>> --- a/arch/arm64/boot/dts/qcom/Makefile
>>>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>>>> @@ -186,6 +186,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-lenovo-yoga-c630.dtb
>>>>    dtb-$(CONFIG_ARCH_QCOM)	+= sdm850-samsung-w737.dtb
>>>>    dtb-$(CONFIG_ARCH_QCOM)	+= sdx75-idp.dtb
>>>>    dtb-$(CONFIG_ARCH_QCOM)	+= sm4250-oneplus-billie2.dtb
>>>> +dtb-$(CONFIG_ARCH_QCOM)	+= sm4450-qrd.dtb
>>>>    dtb-$(CONFIG_ARCH_QCOM)	+= sm6115-fxtec-pro1x.dtb
>>>>    dtb-$(CONFIG_ARCH_QCOM)	+= sm6115p-lenovo-j606f.dtb
>>>>    dtb-$(CONFIG_ARCH_QCOM)	+= sm6125-sony-xperia-seine-pdx201.dtb
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>> new file mode 100644
>>>> index 000000000000..04ad1dd4285a
>>>> --- /dev/null
>>>> +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts
>>>> @@ -0,0 +1,18 @@
>>>> +// SPDX-License-Identifier: BSD-3-Clause
>>>> +/*
>>>> + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
>>>> + */
>>>> +
>>>> +/dts-v1/;
>>>> +
>>>> +#include "sm4450.dtsi"
>>>> +/ {
>>>> +	model = "Qualcomm Technologies, Inc. SM4450 QRD";
>>>> +	compatible = "qcom,sm4450-qrd", "qcom,sm4450";
>>>> +
>>>> +	aliases { };
>>>> +
>>>> +	chosen {
>>>> +		bootargs = "console=hvc0 earlycon=hvc0 hvc_dcc.enable=1 cpuidle.off=1";
>>>
>>> No earlycon, no hvc.enable (there is no such parameter), no cpuidle.off
>>> (again don't add fake stuff). So the only suitable argument is console,
>>> but this should be actually used via stdout path, although it seems
>>> there is no device node for such usage?
>> Hi Krzysztof,
>> Checked upstream linux kernel code, there is not "hvc_dcc.enable", but
>> have other parameters, like earlycon, cpuidle.off.
>> Do you mean we should not set "earlycon=hvc0 cpuidle.off=1" parameters,
> 
> Of course not. Why production code would have earlycon? This is debug
> argument, not suitable for each user of this DTS.
> 
> cpuidle.off is neither explained nor needed. Otherwise please add a
> comment why this is part of hardware description.
> 
>> right? only need: bootargs = "console=hvc0" ?
> 
> You should use stdout-path if possible. If not, then only console.
> 
> Best regards,
> Krzysztof
> 
Sure, will update this patch for have right boorargs parameter.

-- 
Thx and BRs,
Tengfei Fan

[PATCH v2 5/6] dt-bindings: arm: qcom,ids: add SoC ID for SM4450

[Tengfei Fan]

Add the ID for the Qualcomm SM4450 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 include/dt-bindings/arm/qcom,ids.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h
index bcbe9ee2cdaf..72dccbc7a777 100644
--- a/include/dt-bindings/arm/qcom,ids.h
+++ b/include/dt-bindings/arm/qcom,ids.h
@@ -250,6 +250,7 @@
 #define QCOM_ID_QRU1000			539
 #define QCOM_ID_QDU1000			545
 #define QCOM_ID_QDU1010			587
+#define QCOM_ID_SM4450			568
 #define QCOM_ID_IPQ5019			569
 #define QCOM_ID_QRU1032			588
 #define QCOM_ID_QRU1052			589
-- 
2.17.1

Re: [PATCH v2 5/6] dt-bindings: arm: qcom,ids: add SoC ID for SM4450

[Krzysztof Kozlowski]

On 27/07/2023 04:35, Tengfei Fan wrote:
> Add the ID for the Qualcomm SM4450 SoC.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  include/dt-bindings/arm/qcom,ids.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h
> index bcbe9ee2cdaf..72dccbc7a777 100644
> --- a/include/dt-bindings/arm/qcom,ids.h
> +++ b/include/dt-bindings/arm/qcom,ids.h
> @@ -250,6 +250,7 @@
>  #define QCOM_ID_QRU1000			539
>  #define QCOM_ID_QDU1000			545
>  #define QCOM_ID_QDU1010			587
> +#define QCOM_ID_SM4450			568

Does not look correctly placed.

Best regards,
Krzysztof

Re: [PATCH v2 5/6] dt-bindings: arm: qcom,ids: add SoC ID for SM4450

[Tengfei Fan]

在 7/27/2023 2:57 PM, Krzysztof Kozlowski 写道:
> On 27/07/2023 04:35, Tengfei Fan wrote:
>> Add the ID for the Qualcomm SM4450 SoC.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   include/dt-bindings/arm/qcom,ids.h | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h
>> index bcbe9ee2cdaf..72dccbc7a777 100644
>> --- a/include/dt-bindings/arm/qcom,ids.h
>> +++ b/include/dt-bindings/arm/qcom,ids.h
>> @@ -250,6 +250,7 @@
>>   #define QCOM_ID_QRU1000			539
>>   #define QCOM_ID_QDU1000			545
>>   #define QCOM_ID_QDU1010			587
>> +#define QCOM_ID_SM4450			568
> 
> Does not look correctly placed.
sure, will update place.
Due to this below have "#define QCOM_ID_IPQ5019                 569", so 
placed this location, next will update the place of QCOM_ID_IPQ5019 and 
QCOM_ID_SM4450.
> 
> Best regards,
> Krzysztof
> 

-- 
Thx and BRs,
Tengfei Fan

[PATCH v2 6/6] soc: qcom: socinfo: add SM4450 ID

[Tengfei Fan]

Add the ID for the Qualcomm SM4450 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/soc/qcom/socinfo.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index 4d49945b3a35..ca3c08d67a32 100644
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc/qcom/socinfo.c
@@ -406,6 +406,7 @@ static const struct soc_id soc_id[] = {
 	{ qcom_board_id(QRU1000) },
 	{ qcom_board_id(QDU1000) },
 	{ qcom_board_id(QDU1010) },
+	{ qcom_board_id(SM4450) },
 	{ qcom_board_id(IPQ5019) },
 	{ qcom_board_id(QRU1032) },
 	{ qcom_board_id(QRU1052) },
-- 
2.17.1

Re: [PATCH v2 6/6] soc: qcom: socinfo: add SM4450 ID

[Krzysztof Kozlowski]

On 27/07/2023 04:35, Tengfei Fan wrote:
> Add the ID for the Qualcomm SM4450 SoC.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  drivers/soc/qcom/socinfo.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
> index 4d49945b3a35..ca3c08d67a32 100644
> --- a/drivers/soc/qcom/socinfo.c
> +++ b/drivers/soc/qcom/socinfo.c
> @@ -406,6 +406,7 @@ static const struct soc_id soc_id[] = {
>  	{ qcom_board_id(QRU1000) },
>  	{ qcom_board_id(QDU1000) },
>  	{ qcom_board_id(QDU1010) },
> +	{ qcom_board_id(SM4450) },

Neither here...

Best regards,
Krzysztof

Re: [PATCH v2 6/6] soc: qcom: socinfo: add SM4450 ID

[Tengfei Fan]

在 7/27/2023 2:57 PM, Krzysztof Kozlowski 写道:
> On 27/07/2023 04:35, Tengfei Fan wrote:
>> Add the ID for the Qualcomm SM4450 SoC.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   drivers/soc/qcom/socinfo.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
>> index 4d49945b3a35..ca3c08d67a32 100644
>> --- a/drivers/soc/qcom/socinfo.c
>> +++ b/drivers/soc/qcom/socinfo.c
>> @@ -406,6 +406,7 @@ static const struct soc_id soc_id[] = {
>>   	{ qcom_board_id(QRU1000) },
>>   	{ qcom_board_id(QDU1000) },
>>   	{ qcom_board_id(QDU1010) },
>> +	{ qcom_board_id(SM4450) },
> 
> Neither here...
Also will update.
> 
> Best regards,
> Krzysztof
> 

-- 
Thx and BRs,
Tengfei Fan