From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E881C2D0A8 for ; Tue, 29 Sep 2020 03:06:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E05142075E for ; Tue, 29 Sep 2020 03:05:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727315AbgI2DF7 (ORCPT ); Mon, 28 Sep 2020 23:05:59 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:58390 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727262AbgI2DF7 (ORCPT ); Mon, 28 Sep 2020 23:05:59 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id E66DA94227C7F1786525; Tue, 29 Sep 2020 11:05:57 +0800 (CST) Received: from [127.0.0.1] (10.174.177.253) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Tue, 29 Sep 2020 11:05:50 +0800 Subject: Re: [PATCH v4 03/20] dt-bindings: arm: hisilicon: add binding for SD5203 SoC To: Rob Herring CC: Wei Xu , Jonathan Cameron , devicetree , linux-arm-kernel , linux-kernel , Libin , Kefeng Wang References: <20200928151324.2134-1-thunder.leizhen@huawei.com> <20200928151324.2134-4-thunder.leizhen@huawei.com> <20200928190748.GA3090434@bogus> From: "Leizhen (ThunderTown)" Message-ID: Date: Tue, 29 Sep 2020 11:05:49 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20200928190748.GA3090434@bogus> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 2020/9/29 3:07, Rob Herring wrote: > On Mon, Sep 28, 2020 at 11:13:07PM +0800, Zhen Lei wrote: >> Add devicetree binding for Hisilicon SD5203 SoC. >> >> Signed-off-by: Zhen Lei >> --- >> Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml >> index 6d17309c7c84308..3337eebc61da812 100644 >> --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml >> +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml >> @@ -59,4 +59,8 @@ properties: >> - description: HiP07 D05 Board >> items: >> - const: hisilicon,hip07-d05 >> + >> + - description: SD5203 Board > > This should be a board compatible and then a SoC compatible. OK, I will fix it. > >> + items: >> + - const: hisilicon,sd5203 >> ... >> -- >> 1.8.3 >> >> > > . >