From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 790C644C9A; Sun, 17 Dec 2023 17:55:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="G2CLrRfK" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=1BS2BYxI0fjRhDPFU1muWML+fVQMCFHH/gSfWLLCKhQ=; b=G2CLrRfKFu0XcBhesoEsUYs2NU fxQLK5S6970mi84T28XkFi+YuyqJFPT022Y931plnt/t9hTREG7bJHDkoTTpueHZrvzH0AXeKjvs4 1dg4PhWHBHJzsdJol+cswDkvxUHQBln5quFlcko9UOJOdTmZlClCwz2ZMsl45BJIVkeU=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1rEvM6-003AGP-QV; Sun, 17 Dec 2023 18:55:10 +0100 Date: Sun, 17 Dec 2023 18:55:10 +0100 From: Andrew Lunn To: Cristian Ciocaltea Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Hal Feng , Michael Turquette , Stephen Boyd , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Emil Renner Berthing Subject: Re: [PATCH v3 6/9] riscv: dts: starfive: visionfive-v1: Setup ethernet phy Message-ID: References: <20231215204050.2296404-1-cristian.ciocaltea@collabora.com> <20231215204050.2296404-7-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231215204050.2296404-7-cristian.ciocaltea@collabora.com> On Fri, Dec 15, 2023 at 10:40:45PM +0200, Cristian Ciocaltea wrote: > The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting > RGMII-ID, but requires manual adjustment of the RX internal delay to > work properly. > > The default RX delay provided by the driver is 1.95 ns, which proves to > be too high. Applying a 50% reduction seems to mitigate the issue. > > Also note this adjustment is not necessary on BeagleV Starlight SBC, > which uses a Microchip PHY. Hence, there is no indication of a > miss-behaviour on the GMAC side, but most likely the issue stems from > the Motorcomm PHY. I suggest you make a similar comment in the .dts file, just to explain the odd setting. Andrew