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Fri, 15 Sep 2023 02:10:18 -0700 (PDT) Received: from [192.168.1.20] ([178.197.214.188]) by smtp.gmail.com with ESMTPSA id d22-20020a170906345600b009a9fbeb15f2sm2120791ejb.62.2023.09.15.02.10.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 Sep 2023 02:10:17 -0700 (PDT) Message-ID: Date: Fri, 15 Sep 2023 11:10:14 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.0 Subject: Re: [PATCH v2 4/8] dt-bindings: arm-smmu: Add compatible for SM4450 SoC To: Tengfei Fan , will@kernel.org, robin.murphy@arm.com, joro@8bytes.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, catalin.marinas@arm.com Cc: geert+renesas@glider.be, arnd@arndb.de, neil.armstrong@linaro.org, nfraprado@collabora.com, rafal@milecki.pl, peng.fan@nxp.com, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, quic_tsoni@quicinc.com, quic_shashim@quicinc.com, quic_kaushalk@quicinc.com, quic_tdas@quicinc.com, quic_tingweiz@quicinc.com, quic_aiquny@quicinc.com, kernel@quicinc.com References: <20230915021509.25773-1-quic_tengfan@quicinc.com> <20230915021509.25773-3-quic_tengfan@quicinc.com> <5a386be4-facc-8aef-aad7-da6508aa0505@linaro.org> Content-Language: en-US From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net On 15/09/2023 10:52, Tengfei Fan wrote: > > > 在 9/15/2023 3:11 PM, Krzysztof Kozlowski 写道: >> On 15/09/2023 04:15, Tengfei Fan wrote: >>> Add the SoC specific compatible for SM4450 implementing arm,mmu-500. >>> >>> Signed-off-by: Tengfei Fan >>> --- >>> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >>> index cf29ab10501c..b57751c8ad90 100644 >>> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >>> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml >>> @@ -47,6 +47,7 @@ properties: >>> - qcom,sdx55-smmu-500 >>> - qcom,sdx65-smmu-500 >>> - qcom,sdx75-smmu-500 >>> + - qcom,sm4450-smmu-500 >>> - qcom,sm6115-smmu-500 >>> - qcom,sm6125-smmu-500 >>> - qcom,sm6350-smmu-500 >>> @@ -70,6 +71,7 @@ properties: >>> - qcom,sc8180x-smmu-500 >>> - qcom,sc8280xp-smmu-500 >>> - qcom,sdm845-smmu-500 >>> + - qcom,sm4450-smmu-500 >> >> Isn't there comment just few lines above your edit? Comment saying DON'T? >> >> >> Best regards, >> Krzysztof >> > Hi Kraysztof > I seems haven't understand your comments totaly. > I want to confirm that if you think only need "qcom,smmu-500" and > "arm,mmu-500" compitbale name, needn't specific compitable name for each > platform? No, please read the comment. It tells you explicitly what to do - which compatible add where. Best regards, Krzysztof