From: Adrian Hunter <adrian.hunter@intel.com>
To: Sebastian Reichel <sebastian.reichel@collabora.com>,
Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Ulf Hansson <ulf.hansson@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org, linux-mmc@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel@lists.collabora.co.uk,
kernel@collabora.com
Subject: Re: [PATCHv1 09/19] mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
Date: Wed, 27 Apr 2022 10:51:10 +0300 [thread overview]
Message-ID: <f94d82bb-297b-e1cd-9dd1-b25eccc64744@intel.com> (raw)
In-Reply-To: <20220422170920.401914-10-sebastian.reichel@collabora.com>
On 22/04/22 20:09, Sebastian Reichel wrote:
> Prepare driver for rk3588 support by renaming the internal data
> structures.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> drivers/mmc/host/sdhci-of-dwcmshc.c | 46 ++++++++++++++---------------
> 1 file changed, 23 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index d95ae6ca1256..54ae0268e002 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -56,14 +56,14 @@
> #define DLL_LOCK_WO_TMOUT(x) \
> ((((x) & DWCMSHC_EMMC_DLL_LOCKED) == DWCMSHC_EMMC_DLL_LOCKED) && \
> (((x) & DWCMSHC_EMMC_DLL_TIMEOUT) == 0))
> -#define RK3568_MAX_CLKS 3
> +#define RK35xx_MAX_CLKS 3
>
> #define BOUNDARY_OK(addr, len) \
> ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
>
> -struct rk3568_priv {
> +struct rk35xx_priv {
> /* Rockchip specified optional clocks */
> - struct clk_bulk_data rockchip_clks[RK3568_MAX_CLKS];
> + struct clk_bulk_data rockchip_clks[RK35xx_MAX_CLKS];
> struct reset_control *reset;
> u8 txclk_tapnum;
> };
> @@ -178,7 +178,7 @@ static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock
> {
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host);
> - struct rk3568_priv *priv = dwc_priv->priv;
> + struct rk35xx_priv *priv = dwc_priv->priv;
> u8 txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
> u32 extra, reg;
> int err;
> @@ -283,7 +283,7 @@ static const struct sdhci_ops sdhci_dwcmshc_ops = {
> .adma_write_desc = dwcmshc_adma_write_desc,
> };
>
> -static const struct sdhci_ops sdhci_dwcmshc_rk3568_ops = {
> +static const struct sdhci_ops sdhci_dwcmshc_rk35xx_ops = {
> .set_clock = dwcmshc_rk3568_set_clock,
> .set_bus_width = sdhci_set_bus_width,
> .set_uhs_signaling = dwcmshc_set_uhs_signaling,
> @@ -298,18 +298,18 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
> };
>
> -static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
> - .ops = &sdhci_dwcmshc_rk3568_ops,
> +static const struct sdhci_pltfm_data sdhci_dwcmshc_rk35xx_pdata = {
> + .ops = &sdhci_dwcmshc_rk35xx_ops,
> .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
> SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
> .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
> SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
> };
>
> -static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
> +static int dwcmshc_rk35xx_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
> {
> int err;
> - struct rk3568_priv *priv = dwc_priv->priv;
> + struct rk35xx_priv *priv = dwc_priv->priv;
>
> priv->reset = devm_reset_control_array_get_exclusive(mmc_dev(host->mmc));
> if (IS_ERR_OR_NULL(priv->reset)) {
> @@ -321,14 +321,14 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
> priv->rockchip_clks[0].id = "axi";
> priv->rockchip_clks[1].id = "block";
> priv->rockchip_clks[2].id = "timer";
> - err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
> + err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK35xx_MAX_CLKS,
> priv->rockchip_clks);
> if (err) {
> dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
> return err;
> }
>
> - err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
> + err = clk_bulk_prepare_enable(RK35xx_MAX_CLKS, priv->rockchip_clks);
> if (err) {
> dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
> return err;
> @@ -350,7 +350,7 @@ static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc
> static const struct of_device_id sdhci_dwcmshc_dt_ids[] = {
> {
> .compatible = "rockchip,rk3568-dwcmshc",
> - .data = &sdhci_dwcmshc_rk3568_pdata,
> + .data = &sdhci_dwcmshc_rk35xx_pdata,
> },
> {
> .compatible = "snps,dwcmshc-sdhci",
> @@ -373,7 +373,7 @@ static int dwcmshc_probe(struct platform_device *pdev)
> struct sdhci_pltfm_host *pltfm_host;
> struct sdhci_host *host;
> struct dwcmshc_priv *priv;
> - struct rk3568_priv *rk_priv = NULL;
> + struct rk35xx_priv *rk_priv = NULL;
> const struct sdhci_pltfm_data *pltfm_data;
> int err;
> u32 extra;
> @@ -428,8 +428,8 @@ static int dwcmshc_probe(struct platform_device *pdev)
> host->mmc_host_ops.request = dwcmshc_request;
> host->mmc_host_ops.hs400_enhanced_strobe = dwcmshc_hs400_enhanced_strobe;
>
> - if (pltfm_data == &sdhci_dwcmshc_rk3568_pdata) {
> - rk_priv = devm_kzalloc(&pdev->dev, sizeof(struct rk3568_priv), GFP_KERNEL);
> + if (pltfm_data == &sdhci_dwcmshc_rk35xx_pdata) {
> + rk_priv = devm_kzalloc(&pdev->dev, sizeof(struct rk35xx_priv), GFP_KERNEL);
> if (!rk_priv) {
> err = -ENOMEM;
> goto err_clk;
> @@ -437,7 +437,7 @@ static int dwcmshc_probe(struct platform_device *pdev)
>
> priv->priv = rk_priv;
>
> - err = dwcmshc_rk3568_init(host, priv);
> + err = dwcmshc_rk35xx_init(host, priv);
> if (err)
> goto err_clk;
> }
> @@ -454,7 +454,7 @@ static int dwcmshc_probe(struct platform_device *pdev)
> clk_disable_unprepare(pltfm_host->clk);
> clk_disable_unprepare(priv->bus_clk);
> if (rk_priv)
> - clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
> + clk_bulk_disable_unprepare(RK35xx_MAX_CLKS,
> rk_priv->rockchip_clks);
> free_pltfm:
> sdhci_pltfm_free(pdev);
> @@ -466,14 +466,14 @@ static int dwcmshc_remove(struct platform_device *pdev)
> struct sdhci_host *host = platform_get_drvdata(pdev);
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
> - struct rk3568_priv *rk_priv = priv->priv;
> + struct rk35xx_priv *rk_priv = priv->priv;
>
> sdhci_remove_host(host, 0);
>
> clk_disable_unprepare(pltfm_host->clk);
> clk_disable_unprepare(priv->bus_clk);
> if (rk_priv)
> - clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
> + clk_bulk_disable_unprepare(RK35xx_MAX_CLKS,
> rk_priv->rockchip_clks);
> sdhci_pltfm_free(pdev);
>
> @@ -486,7 +486,7 @@ static int dwcmshc_suspend(struct device *dev)
> struct sdhci_host *host = dev_get_drvdata(dev);
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
> - struct rk3568_priv *rk_priv = priv->priv;
> + struct rk35xx_priv *rk_priv = priv->priv;
> int ret;
>
> ret = sdhci_suspend_host(host);
> @@ -498,7 +498,7 @@ static int dwcmshc_suspend(struct device *dev)
> clk_disable_unprepare(priv->bus_clk);
>
> if (rk_priv)
> - clk_bulk_disable_unprepare(RK3568_MAX_CLKS,
> + clk_bulk_disable_unprepare(RK35xx_MAX_CLKS,
> rk_priv->rockchip_clks);
>
> return ret;
> @@ -509,7 +509,7 @@ static int dwcmshc_resume(struct device *dev)
> struct sdhci_host *host = dev_get_drvdata(dev);
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host);
> - struct rk3568_priv *rk_priv = priv->priv;
> + struct rk35xx_priv *rk_priv = priv->priv;
> int ret;
>
> ret = clk_prepare_enable(pltfm_host->clk);
> @@ -523,7 +523,7 @@ static int dwcmshc_resume(struct device *dev)
> }
>
> if (rk_priv) {
> - ret = clk_bulk_prepare_enable(RK3568_MAX_CLKS,
> + ret = clk_bulk_prepare_enable(RK35xx_MAX_CLKS,
> rk_priv->rockchip_clks);
> if (ret)
> return ret;
next prev parent reply other threads:[~2022-04-27 7:51 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 17:09 [PATCHv1 00/19] Basic RK3588 Support Sebastian Reichel
2022-04-22 17:09 ` [PATCHv1 01/19] dt-binding: clock: Document rockchip,rk3588-cru bindings Sebastian Reichel
2022-04-23 10:01 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 02/19] clk: rockchip: add register offset of the cores select parent Sebastian Reichel
2022-04-22 17:09 ` [PATCHv1 03/19] clk: rockchip: add pll type for RK3588 Sebastian Reichel
2022-04-27 13:36 ` Nicolas Dufresne
2022-04-30 0:02 ` Heiko Stübner
2022-04-29 1:56 ` kernel test robot
2022-04-22 17:09 ` [PATCHv1 04/19] clk: rockchip: clk-cpu: add mux setting for cpu change frequency Sebastian Reichel
2022-04-22 17:09 ` [PATCHv1 05/19] clk: rockchip: add dt-binding header for rk3588 Sebastian Reichel
2022-05-02 22:15 ` Rob Herring
2022-04-22 17:09 ` [PATCHv1 06/19] clk: rockchip: Add clock controller for the RK3588 Sebastian Reichel
2022-04-29 19:31 ` kernel test robot
2022-04-22 17:09 ` [PATCHv1 07/19] dt-bindings: mmc: sdhci-of-dwcmhsc: Add rk3588 Sebastian Reichel
2022-04-23 10:01 ` Krzysztof Kozlowski
2022-05-04 10:37 ` Ulf Hansson
2022-04-22 17:09 ` [PATCHv1 08/19] mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs Sebastian Reichel
2022-04-23 10:32 ` Dmitry Osipenko
2022-04-27 7:50 ` Adrian Hunter
2022-04-22 17:09 ` [PATCHv1 09/19] mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx Sebastian Reichel
2022-04-27 7:51 ` Adrian Hunter [this message]
2022-04-22 17:09 ` [PATCHv1 10/19] mmc: sdhci-of-dwcmshc: add support for rk3588 Sebastian Reichel
2022-04-27 7:51 ` Adrian Hunter
2022-04-22 17:09 ` [PATCHv1 11/19] dt-bindings: pinctrl: rockchip: add rk3588 Sebastian Reichel
2022-04-23 10:02 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 12/19] pinctrl/rockchip: add error handling for pull/drive register getters Sebastian Reichel
2022-04-22 20:50 ` Heiko Stuebner
2022-04-28 22:54 ` Linus Walleij
2022-04-22 17:09 ` [PATCHv1 13/19] pinctrl/rockchip: add rk3588 support Sebastian Reichel
2022-04-28 22:55 ` Linus Walleij
2022-04-30 14:12 ` Heiko Stuebner
2022-04-22 17:09 ` [PATCHv1 14/19] gpio: rockchip: add support for rk3588 Sebastian Reichel
2022-04-22 20:35 ` Linus Walleij
2022-04-22 17:09 ` [PATCHv1 15/19] dt-bindings: serial: snps-dw-apb-uart: Add Rockchip RK3588 Sebastian Reichel
2022-04-23 10:02 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 16/19] dt-bindings: soc: rockchip: add initial rk3588 syscon compatibles Sebastian Reichel
2022-04-23 10:03 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 17/19] arm64: dts: rockchip: Add rk3588s pinctrl data Sebastian Reichel
2022-04-22 20:45 ` Linus Walleij
2022-04-22 17:09 ` [PATCHv1 18/19] arm64: dts: rockchip: Add base DT for rk3588 SoC Sebastian Reichel
2022-04-22 18:16 ` Robin Murphy
2022-04-25 18:14 ` Sebastian Reichel
2022-04-25 19:37 ` Peter Geis
2022-04-23 10:07 ` Krzysztof Kozlowski
2022-05-02 22:20 ` Rob Herring
2022-04-22 17:09 ` [PATCHv1 19/19] arm64: dts: rockchip: Add rk3588-evb1 board Sebastian Reichel
2022-04-23 10:09 ` Krzysztof Kozlowski
2022-04-25 19:44 ` Rob Herring
2022-04-22 20:44 ` [PATCHv1 00/19] Basic RK3588 Support Linus Walleij
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