From: ALOK TIWARI <alok.a.tiwari@oracle.com>
To: Prabhakar <prabhakar.csengg@gmail.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Biju Das <biju.das.jz@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Magnus Damm <magnus.damm@gmail.com>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v4 01/15] clk: renesas: rzv2h-cpg: Add support for DSI clocks
Date: Thu, 1 May 2025 15:20:49 +0530 [thread overview]
Message-ID: <f9a7c9fd-bd49-4cf0-9a86-a8e65b4fb6a5@oracle.com> (raw)
In-Reply-To: <20250430204112.342123-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
On 01-05-2025 02:10, Prabhakar wrote:
> From: Lad Prabhakar<prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add support for PLLDSI and PLLDSI divider clocks.
>
> Introduce the `renesas-rzv2h-dsi.h` header to centralize and share
> PLLDSI-related data structures, limits, and algorithms between the RZ/V2H
> CPG and DSI drivers.
>
> The DSI PLL is functionally similar to the CPG's PLLDSI, but has slightly
> different parameter limits and omits the programmable divider present in
> CPG. To ensure precise frequency calculations-especially for milliHz-level
> accuracy needed by the DSI driver-the shared algorithm allows both drivers
> to compute PLL parameters consistently using the same logic and input
> clock.
>
> Co-developed-by: Fabrizio Castro<fabrizio.castro.jz@renesas.com>
> Signed-off-by: Fabrizio Castro<fabrizio.castro.jz@renesas.com>
> Signed-off-by: Lad Prabhakar<prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Alok Tiwari <alok.a.tiwari@oracle.com>
Thanks,
Alok
next prev parent reply other threads:[~2025-05-01 9:51 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 20:40 [PATCH v4 00/15] Add support for DU and DSI on the Renesas RZ/V2H(P) SoC Prabhakar
2025-04-30 20:40 ` [PATCH v4 01/15] clk: renesas: rzv2h-cpg: Add support for DSI clocks Prabhakar
2025-05-01 9:50 ` ALOK TIWARI [this message]
2025-05-01 10:38 ` Fabrizio Castro
2025-05-01 11:02 ` Lad, Prabhakar
2025-04-30 20:40 ` [PATCH v4 02/15] clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC Prabhakar
2025-04-30 20:41 ` [PATCH v4 03/15] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/V2H(P) SoC Prabhakar
2025-05-01 10:05 ` Biju Das
2025-04-30 20:41 ` [PATCH v4 04/15] dt-bindings: display: bridge: renesas,dsi: " Prabhakar
2025-04-30 20:41 ` [PATCH v4 05/15] drm: renesas: rz-du: " Prabhakar
2025-05-01 10:01 ` Biju Das
2025-04-30 20:41 ` [PATCH v4 06/15] drm: renesas: rz-du: mipi_dsi: Add min check for VCLK range Prabhakar
2025-04-30 20:41 ` [PATCH v4 07/15] drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ calculation Prabhakar
2025-04-30 20:41 ` [PATCH v4 08/15] drm: renesas: rz-du: mipi_dsi: Use VCLK for " Prabhakar
2025-05-04 12:33 ` Biju Das
2025-05-12 14:42 ` Lad, Prabhakar
2025-04-30 20:41 ` [PATCH v4 09/15] drm: renesas: rz-du: mipi_dsi: Add OF data support Prabhakar
2025-05-04 12:41 ` Biju Das
2025-05-12 15:08 ` Lad, Prabhakar
2025-04-30 20:41 ` [PATCH v4 10/15] drm: renesas: rz-du: mipi_dsi: Use mHz for D-PHY frequency calculations Prabhakar
2025-05-04 12:51 ` Biju Das
2025-04-30 20:41 ` [PATCH v4 11/15] drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support Prabhakar
2025-05-04 12:52 ` Biju Das
2025-04-30 20:41 ` [PATCH v4 12/15] drm: renesas: rz-du: mipi_dsi: Add dphy_late_init() callback for RZ/V2H(P) Prabhakar
2025-05-04 12:53 ` Biju Das
2025-04-30 20:41 ` [PATCH v4 13/15] drm: renesas: rz-du: mipi_dsi: Add function pointers for configuring VCLK and mode validation Prabhakar
2025-05-04 12:56 ` Biju Das
2025-04-30 20:41 ` [PATCH v4 14/15] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK handling Prabhakar
2025-05-04 13:00 ` Biju Das
2025-05-12 15:58 ` Lad, Prabhakar
2025-04-30 20:41 ` [PATCH v4 15/15] drm: renesas: rz-du: mipi_dsi: Add support for RZ/V2H(P) SoC Prabhakar
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