From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8467BC48BDF for ; Tue, 15 Jun 2021 18:49:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7022D60FE6 for ; Tue, 15 Jun 2021 18:49:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229957AbhFOSvI (ORCPT ); Tue, 15 Jun 2021 14:51:08 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48478 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230162AbhFOSvH (ORCPT ); Tue, 15 Jun 2021 14:51:07 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 15FImx6R083332; Tue, 15 Jun 2021 13:48:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1623782939; bh=sGTfVXTf9Uv8YPu2HvI7M/XSUBbbQy70yqibgg7DH7w=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=BB7rPRsPltYZRhD/xQufUS9cWXfnFpAiktfsuiWh3W7Il8trFos1+DEBWTMXLuR13 NSYBuwXAe4JfJiypEoxfo6Z1DZ6DTPUCH6090+G0+NvSRbrnisdf0roc2ISzZ5TQTz ZucM9JVmjBWz99wG/5bHA7Vu12EfQ7eIBtfXTfn0= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 15FImxHq006693 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 15 Jun 2021 13:48:59 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 15 Jun 2021 13:48:59 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 15 Jun 2021 13:48:59 -0500 Received: from [10.250.35.153] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 15FImxhx126745; Tue, 15 Jun 2021 13:48:59 -0500 Subject: Re: [PATCH v4 3/3] arm64: dts: ti: k3-am64-main: Update the location of TF-A To: Aswath Govindraju CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Nishanth Menon , Tero Kristo , Rob Herring , , , References: <20210615174325.22853-1-a-govindraju@ti.com> <20210615174325.22853-4-a-govindraju@ti.com> From: Suman Anna Message-ID: Date: Tue, 15 Jun 2021 13:48:59 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210615174325.22853-4-a-govindraju@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 6/15/21 12:43 PM, Aswath Govindraju wrote: > Due to a limitation for USB DFU boot mode, SPL load address has to be less > than or equal to 0x70001000. So, load address of SPL and TF-A have been > moved to 0x70000000 and 0x701c4000 respectively. > > Therefore, update TF-A's location in the device tree node. > > Signed-off-by: Aswath Govindraju Reviewed-by: Suman Anna > --- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index 6a883f4349cb..7ab3652dfdfb 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -24,8 +24,8 @@ > #size-cells = <1>; > ranges = <0x0 0x00 0x70000000 0x200000>; > > - tfa-sram@0 { > - reg = <0x0 0x1c000>; > + tfa-sram@1c4000 { > + reg = <0x1c4000 0x1c000>; > }; > > dmsc-sram@1e0000 { >