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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Inochi Amaoto <inochiama@outlook.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Chao Wei <chao.wei@sophgo.com>,
	Chen Wang <unicorn_wang@outlook.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Jisheng Zhang <jszhang@kernel.org>,
	Liu Gui <kenneth.liu@sophgo.com>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	qiujingbao.dlmu@gmail.com, dlan@gentoo.org,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v3 3/4] riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
Date: Thu, 7 Dec 2023 10:19:33 +0100	[thread overview]
Message-ID: <f9db367c-a96b-4789-9884-f2062499765a@linaro.org> (raw)
In-Reply-To: <IA1PR20MB495373158F3B690EF3BF2901BB8BA@IA1PR20MB4953.namprd20.prod.outlook.com>

On 07/12/2023 09:37, Inochi Amaoto wrote:
> Add clock generator node for CV1800B and CV1812H.
> 
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://github.com/milkv-duo/duo-files/blob/main/hardware/CV1800B/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
> ---
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++
>  arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 4 ++++
>  arch/riscv/boot/dts/sophgo/cv18xx.dtsi  | 6 ++++++
>  3 files changed, 14 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index 165e9e320a8c..baf641829e72 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -16,3 +16,7 @@ &plic {
>  &clint {
>  	compatible = "sophgo,cv1800b-clint", "thead,c900-clint";
>  };
> +
> +&clk {
> +	compatible = "sophgo,cv1800-clk";
> +};
> diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> index 9a375935b00c..83243c918204 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi
> @@ -21,3 +21,7 @@ &plic {
>  &clint {
>  	compatible = "sophgo,cv1812h-clint", "thead,c900-clint";
>  };
> +
> +&clk {
> +	compatible = "sophgo,cv1810-clk";
> +};
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 2d6f4a4b1e58..6ea1b2784db9 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -53,6 +53,12 @@ soc {
>  		dma-noncoherent;
>  		ranges;
> 
> +		clk: clock-controller@3002000 {
> +			reg = <0x03002000 0x1000>;
> +			clocks = <&osc>;
> +			#clock-cells = <1>;

I don't find such layout readable and maintainable. I did some parts
like this long, long time ago for one of my SoCs (Exynos54xx), but I
find it over time unmaintainable approach. I strongly suggest to have
compatible and other properties in one place, so cv1800 and cv1812, even
if it duplicates the code.

Best regards,
Krzysztof


  reply	other threads:[~2023-12-07  9:19 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-07  8:36 [PATCH v3 0/4] riscv: sophgo: add clock support for Sophgo CV1800 SoCs Inochi Amaoto
2023-12-07  8:37 ` [PATCH v3 1/4] dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC Inochi Amaoto
2023-12-07  9:17   ` Krzysztof Kozlowski
2023-12-07  8:37 ` [PATCH v3 2/4] clk: sophgo: Add CV1800 series clock controller driver Inochi Amaoto
2023-12-11 17:48   ` Rob Herring
2023-12-18  4:06     ` Inochi Amaoto
2023-12-07  8:37 ` [PATCH v3 3/4] riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC Inochi Amaoto
2023-12-07  9:19   ` Krzysztof Kozlowski [this message]
2023-12-07  9:42     ` Inochi Amaoto
2023-12-07 12:52       ` Krzysztof Kozlowski
2023-12-07 17:31         ` Conor Dooley
2023-12-08  1:13           ` Inochi Amaoto
2023-12-08 15:02             ` Conor Dooley
2023-12-09  2:40               ` Inochi Amaoto
2023-12-07  8:37 ` [PATCH v3 4/4] riscv: dts: sophgo: add uart clock " Inochi Amaoto

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