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Bottomley" , "Martin K. Petersen" , Sai Krishna Potthuri , Ajay Neeli , Manivannan Sadhasivam , Pedro Sousa , Hannes Reinicke , Joao Pinto , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, clizzi@redhat.com, aruizrui@redhat.com, eballetb@redhat.com, echanude@redhat.com References: <20261013103003.373156-1-larisa.grigore@oss.nxp.com> <20261013103003.373156-8-larisa.grigore@oss.nxp.com> <20261014-valiant-goose-of-revolution-efec17@quoll> Content-Language: en-US From: Larisa Ileana Grigore In-Reply-To: <20261014-valiant-goose-of-revolution-efec17@quoll> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: FR4P281CA0015.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:c8::7) To MIYPR04MB12551.eurprd04.prod.outlook.com (2603:10a6:290:78::24) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MIYPR04MB12551:EE_|ZR6PR04MB642384:EE_ X-MS-Office365-Filtering-Correlation-Id: a9655d5f-caa9-4ae0-d430-08df29fb3cc9 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-LD-Processed: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|19092799006|1800799024|7416014|376014|366016|18002099003|22082099003|10067099003|11063799006|4143699003|261009223027099003|56012099006; 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The UFS core then uses this list to manage the clock, including enabling and disabling it during suspend and resume. Without this information, the clock would need to be handled separately by the S32N79 variant driver. The OPP table contains one operating point with `opp-hz = <0>`. This is intentional and follows the semantics documented in `ufs-common.yaml`: If clock frequency in the array is "0" then it is assumed that the frequency is set by the parent clock or a fixed rate clock source. On S32N79, the clock rate is configured by an entity outside Linux. Linux does not program or scale this rate. A similar pattern is used by the `amd,versal2-ufs` binding. It describes a single clock named `core` together with `freq-table-hz = <0 0>`. Best regards, Larisa >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - clocks >> + - clock-names >> + - operating-points-v2 > > Your opp-table is empty, so requiring such property looks like wrongly > written driver. > >> + >> +allOf: >> + - $ref: ufs-common.yaml >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + ufshc@4ac80000 { >> + compatible = "nxp,s32n79-ufshc"; >> + reg = <0x4ac80000 0x1000>, <0x4ac40000 0x1000>; >> + reg-names = "ufshc", "scm"; >> + interrupt-parent = <&irqsteer_coss>; >> + interrupts = <211>; >> + clocks = <&clks 0x92>; >> + clock-names = "core"; >> + operating-points-v2 = <&ufs_opp_table>; >> + >> + ufs_opp_table: opp-table { >> + compatible = "operating-points-v2"; >> + >> + opp-0 { >> + opp-hz = /bits/ 64 <0>; > > Best regards, > Krzysztof >