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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Mark Brown <broonie@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>, Pratyush Yadav <p.yadav@ti.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits
Date: Tue, 1 Mar 2022 12:53:58 +0000	[thread overview]
Message-ID: <fa51ac07-9cba-a8b5-89ed-c51a8a12d452@csgroup.eu> (raw)
In-Reply-To: <Yhz0/1kiAy7Mlgtv@sirena.org.uk>



Le 28/02/2022 à 17:14, Mark Brown a écrit :
> On Mon, Feb 28, 2022 at 04:02:30PM +0000, Christophe Leroy wrote:
>> Le 28/02/2022 à 16:29, Mark Brown a écrit :
> 
>>> The binding looks good now but this is still driver specific code when
>>> it looks like it could easily be implemented in the core - like I said
>>> on the previous version you'd need to update drivers to advertise less
>>> than 8 bits but there's basically nothing driver specific I can see here
>>> so any driver using transfer_one() would get support that way.
> 
>> Argh ! Sorry your comment to the previous version ended up in Junk
>> mails. I see it now.
> 
> No problem.
> 
>> We discussed that back in 2016 in
>> https://lore.kernel.org/linux-spi/20160824112701.GE22076@sirena.org.uk/
>> and my understanding at that time was that it was not something that
>> could be done at core level.
> 
>> But maybe things have changed since then ?
> 
> What I said then was "it would need a new core feature" which is what
> the binding does, I'm suggesting that you also do that for the handling
> of the implementation as well.
> 
> Actually now I think about it perhaps this shouldn't be a binding at all
> but rather something specified by the client driver - presumably any
> system using an affected device is going to need these extra clock
> cycles so they'll all need to add the same property.
> 
>> By the way, fsl-spi driver doesn't implement transfer_one() but
>> transfer_one_message() so it takes care of the chipselect changes and
>> therefore the final dummy transfer with CS off is to be done there as
>> far as I understand.
> 
>> Would it mean changing fsl-spi driver to implement transfer_one() first ?
> 
> Well, if it can implement transfer_one() without any negative
> consequences whichh

Seems like your sentence is truncated.

My understanding today is that this trailing transfer with chipselect 
OFF is to be added at the end of transfer_one_message().

It can be implemented in the core transfer_one_message() for drivers 
implementing transfer_one(). For the other drivers not having 
transfer_one() but having transfer_one_message(), it must be implemented 
in the driver's transfer_one_message().

Am I right ?


fsl-spi driver is the one I need to support this new functionnality and 
it has its own transfer_one_message().

What would you expect ?


Thanks
Christophe

  reply	other threads:[~2022-03-01 12:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-28 15:15 [PATCH v2 0/2] Add support for components requiring trailing clock after transfer Christophe Leroy
2022-02-28 15:15 ` [PATCH v2 1/2] spi: Add optional number of additional clock cycles to be generated Christophe Leroy
2022-03-08  0:52   ` Rob Herring
2022-02-28 15:15 ` [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits Christophe Leroy
2022-02-28 15:29   ` Mark Brown
2022-02-28 16:02     ` Christophe Leroy
2022-02-28 16:14       ` Mark Brown
2022-03-01 12:53         ` Christophe Leroy [this message]
2022-03-01 13:25           ` Mark Brown
2022-08-18 18:35         ` Christophe Leroy
2022-08-22 17:15           ` Mark Brown
2022-08-22 18:38             ` Christophe Leroy
2022-08-22 19:29               ` Mark Brown
2022-02-28 18:28   ` kernel test robot
2022-02-28 18:38   ` kernel test robot
2022-02-28 18:48   ` kernel test robot

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