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From: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
To: Anton Vorontsov <avorontsov-hkdhdckH98+B+jHODAdFcQ@public.gmane.org>
Cc: linuxppc-dev-mnsaURCQ41sdnm+yROfE0A@public.gmane.org,
	Pierre Ossman <pierre-vCPtPcF4ZGuHXe+LvDLADg@public.gmane.org>,
	devicetree-discuss-mnsaURCQ41sdnm+yROfE0A@public.gmane.org,
	sdhci-devel-qjLDD68F18NoYZYVwN2jqg@public.gmane.org
Subject: Re: [PATCH v2] sdhci: Add support for hosts that are only capable of 1-bit transfers
Date: Wed, 17 Jun 2009 14:55:46 -0600	[thread overview]
Message-ID: <fa686aa40906171355x5a917b60ne372796133c9e336@mail.gmail.com> (raw)
In-Reply-To: <20090617201408.GA17909-wnGakbxT3iijyJ0x5qLZdcN33GVbZNy3@public.gmane.org>

On Wed, Jun 17, 2009 at 2:14 PM, Anton
Vorontsov<avorontsov-hkdhdckH98+B+jHODAdFcQ@public.gmane.org> wrote:
> Some hosts (hardware configurations, or particular SD/MMC slots) may
> not support 4-bit bus. For example, on MPC8569E-MDS boards we can
> switch between serial (1-bit only) and nibble (4-bit) modes, thought
> we have to disable more peripherals to work in 4-bit mode.
>
> Along with some small core changes, this patch modifies sdhci-of
> driver, so that now it looks for "sdhci,1-bit-only" property in the
> device-tree, and if specified we enable a proper quirk.
>
> Signed-off-by: Anton Vorontsov <avorontsov-hkdhdckH98+B+jHODAdFcQ@public.gmane.org>

Looks good to me.

Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>

g.

> ---
>
> Pierre,
>
> As promised, here is a version with a quirk.
> Also incorporated suggestions by Grant Likely.
>
>
> Thanks,
>
>  Documentation/powerpc/dts-bindings/fsl/esdhc.txt |    2 ++
>  drivers/mmc/host/sdhci-of.c                      |    3 +++
>  drivers/mmc/host/sdhci.c                         |    5 ++++-
>  drivers/mmc/host/sdhci.h                         |    2 ++
>  4 files changed, 11 insertions(+), 1 deletions(-)
>
> diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
> index 5093ddf..3ed3797 100644
> --- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
> +++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
> @@ -10,6 +10,8 @@ Required properties:
>   - interrupts : should contain eSDHC interrupt.
>   - interrupt-parent : interrupt source phandle.
>   - clock-frequency : specifies eSDHC base clock frequency.
> +  - sdhci,1-bit-only : (optional) specifies that a controller can
> +    only handle 1-bit data transfers.
>
>  Example:
>
> diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c
> index 09cc597..dd65f84 100644
> --- a/drivers/mmc/host/sdhci-of.c
> +++ b/drivers/mmc/host/sdhci-of.c
> @@ -244,6 +244,9 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev,
>                host->ops = &sdhci_of_data->ops;
>        }
>
> +       if (of_get_property(np, "sdhci,1-bit-only", NULL))
> +               host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
> +
>        clk = of_get_property(np, "clock-frequency", &size);
>        if (clk && size == sizeof(*clk) && *clk)
>                of_host->clock = *clk;
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 9234be2..f28f94a 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1721,7 +1721,10 @@ int sdhci_add_host(struct sdhci_host *host)
>        mmc->ops = &sdhci_ops;
>        mmc->f_min = host->max_clk / 256;
>        mmc->f_max = host->max_clk;
> -       mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
> +       mmc->caps = MMC_CAP_SDIO_IRQ;
> +
> +       if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA))
> +               mmc->caps |= MMC_CAP_4_BIT_DATA;
>
>        if (caps & SDHCI_CAN_DO_HISPD)
>                mmc->caps |= MMC_CAP_SD_HIGHSPEED;
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 65c6f99..834f877 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -226,6 +226,8 @@ struct sdhci_host {
>  #define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET           (1<<19)
>  /* Controller has to be forced to use block size of 2048 bytes */
>  #define SDHCI_QUIRK_FORCE_BLK_SZ_2048                  (1<<20)
> +/* Controller can only handle 1-bit data transfers */
> +#define SDHCI_QUIRK_FORCE_1_BIT_DATA                   (1<<21)
>
>        int                     irq;            /* Device IRQ */
>        void __iomem *          ioaddr;         /* Mapped address */
> --
> 1.6.3.1
>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

  parent reply	other threads:[~2009-06-17 20:55 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-06-11 20:15 [PATCH] sdhci: Add support for hosts that are only capable of 1-bit transfers Anton Vorontsov
     [not found] ` <20090611201545.GA15942-wnGakbxT3iijyJ0x5qLZdcN33GVbZNy3@public.gmane.org>
2009-06-13 11:05   ` Pierre Ossman
2009-06-13 15:40   ` Grant Likely
     [not found]     ` <fa686aa40906130840lfb751a7xc9e24646c860a76d-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2009-06-17 20:13       ` Anton Vorontsov
2009-06-17 20:14   ` [PATCH v2] " Anton Vorontsov
     [not found]     ` <20090617201408.GA17909-wnGakbxT3iijyJ0x5qLZdcN33GVbZNy3@public.gmane.org>
2009-06-17 20:55       ` Grant Likely [this message]
2009-06-19 19:21       ` Pierre Ossman

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