Devicetree
 help / color / mirror / Atom feed
From: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
To: John Williams <john.williams-g5w7nrANp4BDPfheJLI6IQ@public.gmane.org>
Cc: devicetree-discuss-mnsaURCQ41sdnm+yROfE0A@public.gmane.org
Subject: Re: Gpio reset handling
Date: Tue, 15 Sep 2009 17:07:47 -0600	[thread overview]
Message-ID: <fa686aa40909151607u29d4025ay101e89d9eae5f30a@mail.gmail.com> (raw)
In-Reply-To: <1d3f23370909151540p411f0bc0r1c81b68ceb2fb45e-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

On Tue, Sep 15, 2009 at 4:40 PM, John Williams
<john.williams-g5w7nrANp4BDPfheJLI6IQ@public.gmane.org> wrote:
> Hi Grant,
>
> On Wed, Sep 16, 2009 at 8:27 AM, Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org> wrote:
>> On Tue, Sep 15, 2009 at 12:32 PM, Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org> wrote:
>>> For this node there should be better reset description not just label with different description.
>>> I expect that it will be useful soft and hard reset and maybe you can find some others.
>>
>> It sounds like what you are doing is very board specific.  It is
>> probably premature to design a 'generic' binding for something that
>> may very well not turn out to be very generic at all.
>
> On the contrary - the MicroBlaze CPU itself has no provision for a
> self-initiated soft reset.  Instead, the way it is achieved is by
> connecting one bit of a GPIO to the AUX_RESET input of Xilinx's
> proc_sys_reset IP (also used in PPC designs as you know).  We are
> looking for a sensible, flexible way of binding this structure that we
> instantiate in almost all MicroBlaze Linux systems.
>
> BTW - how do you handle soft-reset on Xilinx/PPC designs?

It writes the reset command to the DBCR special purpose register.  The
PPC440 core reset output is wired to the RESETPPC0 bus input on the
proc_sys_reset core (which actually consists of three reset request
lines IIRC).

>> What I'd do is
>> create yourself a node for holding board specific properties (like the
>> binding to the gpio reset line) and parse that data from your board
>> specific setup code.  I suppose you could also do it from an
>> of_platform driver, but like irq controllers, it probably doesn't make
>> a lot of sense to.
>
> We are trying to avoid board-specific platform code at all costs - the
> ability to fully configure a standard kernel onto arbitrary boards via
> a DTB is proving very useful, and as I said above we see this
> reset-gpio capability as a generic thing that will be used across many
> platforms.  We just want to do it right.

okay

> Given my justification above, can you spare some of your bountiful
> neurons on considering how we might do it generically?  Does flattery
> work on you? :)

:-P

>From what I've heard so far, I'd do it the same way but use something
like "xlnx,microblaze-gpio-reset" for the compatible value.  As long
as you document the binding and post it to the devicetree-discuss
mailing list for review you should have no problem doing what you want
to do.

BTW, start with the "xlnx,microblaze-*" value for now.  A architecture
neutral value can always be chosen at a later date if this proves to
be useful.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

  parent reply	other threads:[~2009-09-15 23:07 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-09-15 18:32 Gpio reset handling Michal Simek
     [not found] ` <4AAFDDD1.9070702-pSz03upnqPeHXe+LvDLADg@public.gmane.org>
2009-09-15 22:27   ` Grant Likely
     [not found]     ` <fa686aa40909151527r36334528ne1194523f141a8a2-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2009-09-15 22:40       ` John Williams
     [not found]         ` <1d3f23370909151540p411f0bc0r1c81b68ceb2fb45e-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2009-09-15 23:07           ` Grant Likely [this message]
     [not found]             ` <fa686aa40909151607u29d4025ay101e89d9eae5f30a-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2009-09-17  6:46               ` Michal Simek
     [not found]                 ` <4AB1DB2A.6050109-pSz03upnqPeHXe+LvDLADg@public.gmane.org>
2009-09-17 13:42                   ` Grant Likely
     [not found]                     ` <fa686aa40909170642j63ccef7bnf162cb88b9733023-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2009-09-17 13:46                       ` Michal Simek
2009-09-16 11:07           ` Martin Donnelly
2009-09-16  0:24       ` David Gibson
     [not found]         ` <20090916002459.GA8891-787xzQ0H9iRg7VrjXcPTGA@public.gmane.org>
2009-09-17  6:46           ` Michal Simek

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=fa686aa40909151607u29d4025ay101e89d9eae5f30a@mail.gmail.com \
    --to=grant.likely-s3s/wqlpoipyb63q8fvjnq@public.gmane.org \
    --cc=devicetree-discuss-mnsaURCQ41sdnm+yROfE0A@public.gmane.org \
    --cc=john.williams-g5w7nrANp4BDPfheJLI6IQ@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox