From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Roy Luo" <royluo@google.com>, "Vinod Koul" <vkoul@kernel.org>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Thinh Nguyen" <Thinh.Nguyen@synopsys.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Peter Griffin" <peter.griffin@linaro.org>,
"André Draszik" <andre.draszik@linaro.org>,
"Tudor Ambarus" <tudor.ambarus@linaro.org>
Cc: Joy Chakraborty <joychakr@google.com>,
Naveen Kumar <mnkumar@google.com>,
Badhri Jagan Sridharan <badhri@google.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org
Subject: Re: [PATCH v2 3/4] dt-bindings: phy: google: Add Google Tensor G5 USB PHY
Date: Thu, 9 Oct 2025 08:58:24 +0900 [thread overview]
Message-ID: <fa743412-d9f1-43fd-95e8-3b2a58cd6c25@kernel.org> (raw)
In-Reply-To: <20251008060000.3136021-4-royluo@google.com>
On 08/10/2025 14:59, Roy Luo wrote:
> Document the device tree bindings for the USB PHY interfaces integrated
> with the DWC3 controller on Google Tensor SoCs, starting with G5
> generation.
>
> Due to a complete architectural overhaul in the Google Tensor G5, the
> existing Samsung/Exynos USB PHY driver and binding for older generations
> of Google silicons such as gs101 are no longer compatible.
>
> The USB PHY on Tensor G5 includes two integrated Synopsys PHY IPs: the
> eUSB 2.0 PHY IP and the USB 3.2/DisplayPort combo PHY IP. Currently only
> USB high-speed is described and supported.
>
> Signed-off-by: Roy Luo <royluo@google.com>
> ---
> .../bindings/phy/google,gs-usb-phy.yaml | 96 +++++++++++++++++++
> 1 file changed, 96 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml b/Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml
> new file mode 100644
> index 000000000000..22961e2da6ef
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/google,gs-usb-phy.yaml
> @@ -0,0 +1,96 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2025, Google LLC
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/google,gs-usb-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Google Tensor Series (G5+) USB PHY
> +
> +maintainers:
> + - Roy Luo <royluo@google.com>
> +
> +description: |
> + Describes the USB PHY interfaces integrated with the DWC3 USB controller on
> + Google Tensor SoCs, starting with the G5 generation.
> + Two specific PHY IPs from Synopsys are integrated, including eUSB 2.0 PHY IP
> + and USB 3.2/DisplayPort combo PHY IP.
> + The first phandle argument within the PHY specifier is used to identify the
> + desired PHY. The currently supported value is::
Currently supported as hardware will change? You describe here hardware
ONLY.
> + 0 - USB high-speed.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - google,gs5-usb-phy
> +
> + reg:
> + minItems: 3
> + maxItems: 3
> +
> + reg-names:
> + items:
> + - const: usb2_cfg_csr
> + - const: dp_top_csr
> + - const: usb_top_cfg_csr
Drop csr
> +
> + "#phy-cells":
> + const: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: usb2_phy_clk
Drop names, pointless for one entry.
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: usb2_phy_reset
Drop names, pointless for one entry.
> +
> + power-domains:
> + maxItems: 1
> +
> + orientation-switch:
> + type: boolean
> + description:
> + Indicates the PHY as a handler of USB Type-C orientation changes
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - "#phy-cells"
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +unevaluatedProperties: false
> +
additionalProps instead. Read writing schema or example schema.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-10-08 23:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-08 5:59 [PATCH v2 0/4] Add Google Tensor SoC USB support Roy Luo
2025-10-08 5:59 ` [PATCH v2 1/4] dt-bindings: usb: dwc3: Add Google Tensor G5 DWC3 Roy Luo
2025-10-08 20:58 ` Conor Dooley
2025-10-09 4:40 ` Roy Luo
2025-10-09 17:13 ` Conor Dooley
2025-10-10 0:36 ` Roy Luo
2025-10-08 23:56 ` Krzysztof Kozlowski
2025-10-09 5:12 ` Roy Luo
2025-10-09 7:26 ` Krzysztof Kozlowski
2025-10-10 0:21 ` Roy Luo
2025-10-08 5:59 ` [PATCH v2 2/4] usb: dwc3: Add Google Tensor SoC DWC3 glue driver Roy Luo
2025-10-08 5:59 ` [PATCH v2 3/4] dt-bindings: phy: google: Add Google Tensor G5 USB PHY Roy Luo
2025-10-08 23:58 ` Krzysztof Kozlowski [this message]
2025-10-09 5:32 ` Roy Luo
2025-10-08 6:00 ` [PATCH v2 4/4] phy: Add Google Tensor SoC USB PHY driver Roy Luo
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