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From: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
To: Rob Herring <robh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	linux-aspeed <linux-aspeed@lists.ozlabs.org>,
	Wolfram Sang <wsa@the-dreams.de>,
	Andrew Jeffery <andrew@aj.id.au>,
	OpenBMC Maillist <openbmc@lists.ozlabs.org>,
	Brendan Higgins <brendanhiggins@google.com>,
	Linux I2C <linux-i2c@vger.kernel.org>, Tao Ren <taoren@fb.com>,
	Cedric Le Goater <clg@kaod.org>
Subject: Re: [PATCH v4 1/4] dt-bindings: i2c: aspeed: add transfer mode support
Date: Thu, 8 Apr 2021 10:50:41 -0700	[thread overview]
Message-ID: <fadf1244-ed6e-5973-ff1b-018bd20ff3b1@linux.intel.com> (raw)
In-Reply-To: <f1811747-3826-215a-d822-85170303a7c9@linux.intel.com>

Ping.

On 3/10/2021 7:55 AM, Jae Hyun Yoo wrote:
> On 3/9/2021 6:15 PM, Rob Herring wrote:
>> On Tue, Mar 9, 2021 at 10:02 AM Jae Hyun Yoo
>> <jae.hyun.yoo@linux.intel.com> wrote:
>>>
>>> Hi Rob,
>>>
>>> On 3/6/2021 12:30 PM, Rob Herring wrote:
>>>> On Wed, Feb 24, 2021 at 11:17:17AM -0800, Jae Hyun Yoo wrote:
>>>>> Append bindings to support transfer mode.
>>>>>
>>>>> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
>>>>> Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
>>>>> ---
>>>>> Changes since v3:
>>>>> - None
>>>>>
>>>>> Changes since v2:
>>>>> - Moved SRAM resources back to default dtsi and added mode selection
>>>>>     property.
>>>>>
>>>>> Changes since v1:
>>>>> - Removed buffer reg settings from default device tree and added 
>>>>> the settings
>>>>>     into here to show the predefined buffer range per each bus.
>>>>>
>>>>>    .../devicetree/bindings/i2c/i2c-aspeed.txt    | 37 
>>>>> +++++++++++++++----
>>>>>    1 file changed, 30 insertions(+), 7 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt 
>>>>> b/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt
>>>>> index b47f6ccb196a..242343177324 100644
>>>>> --- a/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt
>>>>> +++ b/Documentation/devicetree/bindings/i2c/i2c-aspeed.txt
>>>>> @@ -17,6 +17,20 @@ Optional Properties:
>>>>>    - bus-frequency    : frequency of the bus clock in Hz defaults 
>>>>> to 100 kHz when not
>>>>>                 specified
>>>>>    - multi-master     : states that there is another master active 
>>>>> on this bus.
>>>>> +- aspeed,i2c-xfer-mode      : should be "byte", "buf" or "dma" to 
>>>>> select transfer
>>>>> +                      mode defaults to "byte" mode when not 
>>>>> specified.
>>>>> +
>>>>> +                      I2C DMA mode on AST2500 has these restrictions:
>>>>> +                        - If one of these controllers is enabled
>>>>> +                            * UHCI host controller
>>>>> +                            * MCTP controller
>>>>> +                          I2C has to use buffer mode or byte mode 
>>>>> instead
>>>>> +                          since these controllers run only in DMA 
>>>>> mode and
>>>>> +                          I2C is sharing the same DMA H/W with them.
>>>>> +                        - If one of these controllers uses DMA 
>>>>> mode, I2C
>>>>> +                          can't use DMA mode
>>>>> +                            * SD/eMMC
>>>>> +                            * Port80 snoop
>>>>
>>>> How does one decide between byte or buf mode?
>>>
>>> If a given system makes just one byte r/w transactions most of the time
>>> then byte mode will be a right setting. Otherwise, buf mode is more
>>> efficient because it doesn't generate a bunch of interrupts on every
>>> byte handling.
>>
>> Then why doesn't the driver do byte transactions when it gets small
>> 1-4? byte transactions and buffer transactions when it gets larger
>> sized transactions.
> 
> Good question and it could be an option of this implementation.
> Actually, each mode needs different register handling so we need to add
> additional conditional branches to make it dynamic mode change depends
> on the data size which can be a downside. Also, checked that small
> amount of data transfer efficiency in 'buf' transfer mode is almost same
> to 'byte' mode so there would be no big benefit from the dynamic mode
> change. Of course, we can remove the 'byte' transfer mode but we should
> also provide flexibility of configuration on what this hardware can
> support, IMO.
> 
> Thanks,
> Jae

  reply	other threads:[~2021-04-08 17:50 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-24 19:17 [PATCH v4 0/4] i2c: aspeed: Add buffer and DMA modes support Jae Hyun Yoo
2021-02-24 19:17 ` [PATCH v4 1/4] dt-bindings: i2c: aspeed: add transfer mode support Jae Hyun Yoo
2021-03-06 20:30   ` Rob Herring
2021-03-09 17:02     ` Jae Hyun Yoo
2021-03-10  2:15       ` Rob Herring
2021-03-10 15:55         ` Jae Hyun Yoo
2021-04-08 17:50           ` Jae Hyun Yoo [this message]
2021-04-13 19:50             ` Brendan Higgins
2021-10-01 17:05               ` Jae Hyun Yoo
2021-02-24 19:17 ` [PATCH v4 2/4] ARM: dts: aspeed: modify I2C node to support buffer mode Jae Hyun Yoo
2021-02-24 19:17 ` [PATCH v4 3/4] i2c: aspeed: add buffer mode transfer support Jae Hyun Yoo
2021-04-13 21:24   ` Brendan Higgins
2021-02-24 19:17 ` [PATCH v4 4/4] i2c: aspeed: add DMA " Jae Hyun Yoo
2021-04-13 21:32   ` Brendan Higgins
2021-04-14 15:08     ` Jae Hyun Yoo
2021-05-19 18:38       ` Jae Hyun Yoo
2021-09-30  2:44 ` [PATCH v4 0/4] i2c: aspeed: Add buffer and DMA modes support Zev Weiss
2021-10-01 17:06   ` Jae Hyun Yoo

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