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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id h9-20020ac24d29000000b004b50b4f63b7sm287771lfk.170.2022.12.09.06.56.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 09 Dec 2022 06:56:25 -0800 (PST) Message-ID: Date: Fri, 9 Dec 2022 15:56:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH v3 10/12] dt-bindings: mediatek: mt8188: add audio afe document Content-Language: en-US To: =?UTF-8?B?VHJldm9yIFd1ICjlkLPmlofoia8p?= , "robh+dt@kernel.org" , "broonie@kernel.org" , "p.zabel@pengutronix.de" , "tiwai@suse.com" , "lgirdwood@gmail.com" , "krzysztof.kozlowski+dt@linaro.org" , "matthias.bgg@gmail.com" , "perex@perex.cz" Cc: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-mediatek@lists.infradead.org" , "angelogioacchino.delregno@collabora.com" , "alsa-devel@alsa-project.org" , Project_Global_Chrome_Upstream_Group , "devicetree@vger.kernel.org" References: <20221208033148.21866-1-trevor.wu@mediatek.com> <20221208033148.21866-11-trevor.wu@mediatek.com> <45b4b287dfd57b99e0ba5675bf99194f6d84d9da.camel@mediatek.com> From: Krzysztof Kozlowski In-Reply-To: <45b4b287dfd57b99e0ba5675bf99194f6d84d9da.camel@mediatek.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 09/12/2022 11:56, Trevor Wu (吳文良) wrote: >>> + >>> +patternProperties: >>> + "^mediatek,etdm-in[1-2]-chn-disabled$": >>> + $ref: /schemas/types.yaml#/definitions/uint8-array >>> + minItems: 1 >>> + maxItems: 16 >>> + description: >>> + By default, all data received from ETDM pins will be >>> outputed to >>> + memory. etdm in supports disable_out in direct mode(w/o >>> interconn). >>> + User can specify the channel ID which they hope dropping and >>> then >>> + the specified channel won't be seen on memory. >> >> So we know what are the IDs but it's a mystery what are the values. >> Especially with unique values - how any of these should case that >> channel "won't be seen in memory"? >> > For example, > FE can support 14ch, but BE(etdm) can't support 14ch(it can support > 16ch). > In the case, we can configure 16ch to etdm and make use of the property > to disable the last two channels. > > mediatek,etdm-in1-chn-disabled = /bits/ 8 <0xE 0xF>; Your description should explain that this is a list of channel IDs which should be disabled. > > >>> + uniqueItems: true >>> + items: >>> + minimum: 0 >>> + maximum: 15 >>> + >>> + "^mediatek,etdm-in[1-2]-mclk-always-on-rate-hz$": >>> + description: Specify etdm in mclk output rate for always on >>> case. >> >> How is it different than assigned-clock-rates? >> > This includes clock enabling at init stage. assigned-clock-rates are also at init stage. I asked what is different. > >>> + >>> + "^mediatek,etdm-out[1-3]-mclk-always-on-rate-hz$": >>> + description: Specify etdm out mclk output rate for always on >>> case. >>> + >>> + "^mediatek,etdm-in[1-2]-multi-pin-mode$": >>> + type: boolean >>> + description: if present, the etdm data mode is I2S. >>> + >>> + "^mediatek,etdm-out[1-3]-multi-pin-mode$": >>> + type: boolean >>> + description: if present, the etdm data mode is I2S. >>> + >>> + "^mediatek,etdm-in[1-2]-cowork-source$": >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + description: >>> + etdm modules can share the same external clock pin. Specify >>> + which etdm clock source is required by this etdm in moudule. >> >> typo: module >> Best regards, Krzysztof