From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Pranavi Somisetty <pranavi.somisetty@amd.com>,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, nicolas.ferre@microchip.com,
claudiu.beznea@microchip.com
Cc: git@amd.com, michal.simek@amd.com, harini.katakam@amd.com,
radhey.shyam.pandey@amd.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH net-next v3 1/2] dt-bindings: net: cdns,macb: Add rx-watermark property
Date: Wed, 31 May 2023 09:18:15 +0200 [thread overview]
Message-ID: <fb3de5a5-4477-ec8d-eb2c-e00813f078a0@linaro.org> (raw)
In-Reply-To: <20230530095138.1302-2-pranavi.somisetty@amd.com>
On 30/05/2023 11:51, Pranavi Somisetty wrote:
> watermark value is the minimum amount of packet data
> required to activate the forwarding process. The watermark
> implementation and maximum size is dependent on the device
> where Cadence MACB/GEM is used.
>
> Signed-off-by: Pranavi Somisetty <pranavi.somisetty@amd.com>
> ---
> Changes v2:
> None (patch added in v2)
>
> Changes v3:
> 1. Fixed DT schema error: "scalar properties shouldn't have array keywords".
> 2. Modified description of rx-watermark to include units of the watermark value.
> 3. Modified the DT property name corresponding to rx_watermark in
> pbuf_rxcutthru to "cdns,rx-watermark".
> 4. Modified commit description to remove references to Xilinx platforms,
> since the changes aren't platform specific.
> ---
> Documentation/devicetree/bindings/net/cdns,macb.yaml | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index bef5e0f895be..2c733c061dce 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -109,6 +109,14 @@ properties:
> power-domains:
> maxItems: 1
>
> + cdns,rx-watermark:
> + $ref: /schemas/types.yaml#/definitions/uint16
> + description:
> + Set watermark value for pbuf_rxcutthru reg and enable
> + rx partial store and forward. Watermark value here
> + corresponds to number of SRAM locations. The width of SRAM is
> + system dependent and can be 4,8 or 16 bytes.
You described device programming model - registers - not the actual
hardware.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-05-31 7:18 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-30 9:51 [PATCH net-next v3 0/2] Add support for partial store and forward Pranavi Somisetty
2023-05-30 9:51 ` [PATCH net-next v3 1/2] dt-bindings: net: cdns,macb: Add rx-watermark property Pranavi Somisetty
2023-05-30 12:25 ` Krzysztof Kozlowski
2023-05-31 7:17 ` Krzysztof Kozlowski
2023-05-31 6:31 ` Claudiu.Beznea
2023-05-31 7:18 ` Krzysztof Kozlowski [this message]
2023-05-30 9:51 ` [PATCH net-next v3 2/2] net: macb: Add support for partial store and forward Pranavi Somisetty
2023-05-30 19:22 ` Simon Horman
2023-05-31 6:56 ` Claudiu.Beznea
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