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[95.233.232.76]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42ca053ec61sm14854315e9.0.2024.09.06.02.45.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 06 Sep 2024 02:45:36 -0700 (PDT) Message-ID: Date: Fri, 6 Sep 2024 11:44:23 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/9] iio: add support for the ad3552r AXI DAC IP To: Conor Dooley Cc: Lars-Peter Clausen , Michael Hennerich , =?UTF-8?Q?Nuno_S=C3=A1?= , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Olivier Moysan , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, David Lechner References: <20240905-wip-bl-ad3552r-axi-v0-iio-testing-v2-0-87d669674c00@baylibre.com> <20240906-unwatched-backshift-4782a627278f@squawk> Content-Language: en-US From: Angelo Dureghello In-Reply-To: <20240906-unwatched-backshift-4782a627278f@squawk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Conor, On 06/09/24 11:07 AM, Conor Dooley wrote: > On Thu, Sep 05, 2024 at 05:17:30PM +0200, Angelo Dureghello wrote: >> The serie comes from the previously discussed RFC, that i >> converted to a normal patch from this v2. >> >> Purpose is to add ad3552r AXI DAC (fpga-based) support. >> >> The fpga DAC IP has been created to reach the maximum speed >> (33MUPS) supported from the ad3552r. To obtain the maximum >> transfer rate, the custom module has been implemented using >> the QSPI lines in DDR mode, using a dma buffer. >> >> The design is actually using the DAC backend since the register >> map is the same of the generic DAC IP, except for some customized >> bitfields. For this reason, a new "compatible" has been added >> in adi-axi-dac.c. >> >> Also, backend has been extended with all the needed functions >> needed for this use case, keeping the names gneric. >> >> Note: the following patch is actually for linux-iio/testing >> --- >> Changes in v2: >> - use unsigned int on bus_reg_read/write >> - add a compatible in axi-dac backend for the ad3552r DAC IP >> - minor code alignment fixes >> - fix a return value not checked >> - change devicetree structure setting ad3552r-axi as a backend >> subnode >> - add synchronous_mode_available in the ABI doc > Please give reviewers a chance to response to in-progress discussion on > a version before sending a new one. I've left a couple of responses to > v1 that I only had a chance to reply to today due to travel. sure, will wait some more days next time. Regards, -- ,,, Angelo Dureghello :: :. BayLibre -runtime team- Developer :`___: `____: