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([2a02:810d:15c0:828:49e6:bb8c:a05b:c4ed]) by smtp.gmail.com with ESMTPSA id y30-20020a50ce1e000000b0050470829dbesm651614edi.63.2023.04.06.11.52.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Apr 2023 11:52:21 -0700 (PDT) Message-ID: Date: Thu, 6 Apr 2023 20:52:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH v1 1/3] dt-binding: pci: add JH7110 PCIe dt-binding documents. Content-Language: en-US To: Conor Dooley Cc: Minda Chen , Emil Renner Berthing , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=c5=84ski?= , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie References: <20230406111142.74410-1-minda.chen@starfivetech.com> <20230406111142.74410-2-minda.chen@starfivetech.com> <38bc48bf-7d8c-8ddd-861f-3b7f3d2edce6@linaro.org> <20230406-revisit-patchy-a0063d964070@spud> <20230406-cinema-profile-1bfed00e4a5f@spud> From: Krzysztof Kozlowski In-Reply-To: <20230406-cinema-profile-1bfed00e4a5f@spud> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 06/04/2023 20:45, Conor Dooley wrote: > On Thu, Apr 06, 2023 at 07:35:09PM +0100, Conor Dooley wrote: >> On Thu, Apr 06, 2023 at 08:24:55PM +0200, Krzysztof Kozlowski wrote: >>> On 06/04/2023 13:11, Minda Chen wrote: >>>> + >>>> + interrupt-controller: >>>> + type: object >>>> + properties: >>>> + '#address-cells': >>>> + const: 0 >>>> + >>>> + '#interrupt-cells': >>>> + const: 1 >>>> + >>>> + interrupt-controller: true >>>> + >>>> + required: >>>> + - '#address-cells' >>>> + - '#interrupt-cells' >>>> + - interrupt-controller >>>> + >>>> + additionalProperties: false >>>> + >>>> +required: >>>> + - reg >>>> + - reg-names >>>> + - "#interrupt-cells" >>> >>> Keep consistent quotes - either ' or " >>> >>> Are you sure this is correct? You have interrupt controller as child node. >> >> I know existing stuff in-tree is far from a guarantee that it'll be >> right, but this does at least follow what we've got for PolarFire SoC: >> Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml >> >> Both PLDA and both RISC-V w/ a PLIC as the interrupt controller, so in >> similar waters. >> This note existed in the original text form binding of the Microchip >> PCI controller: >> | +NOTE: >> | +The core provides a single interrupt for both INTx/MSI messages. So, >> | +create an interrupt controller node to support 'interrupt-map' DT >> | +functionality. The driver will create an IRQ domain for this map, decode >> | +the four INTx interrupts in ISR and route them to this domain. >> >> Given the similarities, I figure the same requirement applies here too. >> Minda? > > Further, if, as I currently suspect, there's a lot of commonality here, > should the binding as well as the driver be split into common pdla bits > and microchip/starfive specific ones? > > Suppose that's more one for you Krzysztof. Yeah, looks like only clocks and resets are different. At the end it depends how much code you would remove... Best regards, Krzysztof