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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI3MDA1NSBTYWx0ZWRfX1r0O4SZsjouJ 6RjVIuQfGuzbcDzEJUJwmgrmMxrIhpxcYB3SjFnYizGWq47BrEK+BvXIQIm35cNz8cZ5k6MCsGB ipDJqQAx0Dk9iYz3GG+D3mS2vH2quNw= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI3MDA1NSBTYWx0ZWRfX1iDPF3Zrf46L cLoleiU4132R7SSe4B9eqVFet3cSDYKdn7E7gCZmBtf5rJSMZAD6htG1p3ypPUlFye8K21hKha4 o1C19P7b+vBjw5ZUZS7wj97RHj0uJHFokvgPG5jU8XvVnIjd+dR21MejR3oAYlvA7/NQhnLupLI DTXHggIhTJHH/YaX3C4RpXPjFJw/rRkygn/gz6uxWY4KEehlkmXDrEWCtTdt1WBX+a3Rd2+DY9Y ofMeus0Rozt1tBNS7BMHhUHd4uiAoYjrKdAE3n6K8vVTZpAJ+5GHq2dRluSchFs5IsC9ercqqDo FR2Bf1Roo+nhlPaPIVl8SzDQFNepMeSKHoSopn4oakvjAbDbJpDtz37vsSiLgojJ/PD5ulRfAJ8 Ji7LEFUDVsoK8Re8nWVnU3RebfT2xwP/RKmRHyT8Np77/7luEVisEgxM5rhQ2ojSh8yeUyDnhwp iWr+Qqmzkac4XWmE4kQ== X-Proofpoint-GUID: yehYPzR8Tu46g55aPeGApU8SR6Yue1qF X-Proofpoint-ORIG-GUID: yehYPzR8Tu46g55aPeGApU8SR6Yue1qF X-Authority-Analysis: v=2.4 cv=K6G3jCWI c=1 sm=1 tr=0 ts=6ab921ab cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=M4XmOyF+KGVEWXraXaCqgQ==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=EPIbeGyanE4VvX7pOL0A:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609270055 On 9/26/2026 12:46 AM, Robert Marko wrote: > Add reset to SDHCI controller so it can be reset to avoid timeout issues > after software reset due to bootloader set configuration. > > Signed-off-by: Robert Marko Reviewed-by: Kathiravan Thirumoorthy Thanks for submitting this. Similar change is needed for other IPQ SoCs which is in my TODO list. I will submit those changes in the coming weeks. > --- > arch/arm64/boot/dts/qcom/ipq9574.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > index 5a5bda5f21a11..ecafd4cda6e7a 100644 > --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi > @@ -471,6 +471,7 @@ sdhc_1: mmc@7804000 { > <&xo_board_clk>, > <&gcc GCC_SDCC1_ICE_CORE_CLK>; > clock-names = "iface", "core", "xo", "ice"; > + resets = <&gcc GCC_SDCC_BCR>; > non-removable; > supports-cqe; > pinctrl-0 = <&sdc_default_state>;