From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FF1EC433F5 for ; Mon, 9 May 2022 09:12:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236249AbiEIJNN (ORCPT ); Mon, 9 May 2022 05:13:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52274 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236989AbiEIIts (ORCPT ); Mon, 9 May 2022 04:49:48 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F296619B3AF; Mon, 9 May 2022 01:45:52 -0700 (PDT) X-UUID: b13aee952fc048978f6059a48e5462e1-20220509 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:7730f550-ca22-4d26-a3ed-1240a9238bbc,OB:0,LO B:0,IP:0,URL:8,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACT ION:release,TS:53 X-CID-INFO: VERSION:1.1.4,REQID:7730f550-ca22-4d26-a3ed-1240a9238bbc,OB:0,LOB: 0,IP:0,URL:8,TC:0,Content:0,EDM:0,RT:0,SF:45,FILE:0,RULE:Release_Ham,ACTIO N:release,TS:53 X-CID-META: VersionHash:faefae9,CLOUDID:c1f019b3-56b5-4c9e-8d83-0070b288eb6a,C OID:f2f2a8b00f34,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,File:nil ,QS:0,BEC:nil X-UUID: b13aee952fc048978f6059a48e5462e1-20220509 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1070502207; Mon, 09 May 2022 16:45:47 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 9 May 2022 16:45:46 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 9 May 2022 16:45:46 +0800 Message-ID: Subject: Re: [PATCH v2 1/3] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 From: Rex-BC Chen To: Krzysztof Kozlowski , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "chunkuang.hu@kernel.org" , "p.zabel@pengutronix.de" CC: "airlied@linux.ie" , "matthias.bgg@gmail.com" , "angelogioacchino.delregno@collabora.com" , Jason-JH Lin =?UTF-8?Q?=28=E6=9E=97=E7=9D=BF=E7=A5=A5=29?= , Nancy Lin =?UTF-8?Q?=28=E6=9E=97=E6=AC=A3=E8=9E=A2=29?= , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , "linux-mediatek@lists.infradead.org" , "linux-arm-kernel@lists.infradead.org" , Project_Global_Chrome_Upstream_Group Date: Mon, 9 May 2022 16:45:46 +0800 In-Reply-To: References: <20220509044302.27878-1-rex-bc.chen@mediatek.com> <20220509044302.27878-2-rex-bc.chen@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Mon, 2022-05-09 at 15:31 +0800, Krzysztof Kozlowski wrote: > On 09/05/2022 06:43, Rex-BC Chen wrote: > > From: "Nancy.Lin" > > > > Add vdosys1 RDMA definition. > > > > Signed-off-by: Nancy.Lin > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > .../display/mediatek/mediatek,mdp-rdma.yaml | 94 > > +++++++++++++++++++ > > 1 file changed, 94 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > new file mode 100644 > > index 000000000000..ca31accb0a95 > > --- /dev/null > > +++ > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp- > > rdma.yaml > > @@ -0,0 +1,94 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!x6pqRSLbN1fx6j57PKXCTTp8n7bulgpLzXS8uUh5vAIxkRKD8K6EqOopnFrXvT54LQXmIEDFFvPQzC4ldr1TddEeTw$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!x6pqRSLbN1fx6j57PKXCTTp8n7bulgpLzXS8uUh5vAIxkRKD8K6EqOopnFrXvT54LQXmIEDFFvPQzC4ldr3y-9sW3w$ > > > > + > > +title: MediaTek MDP RDMA > > + > > +maintainers: > > + - Chun-Kuang Hu > > + - Philipp Zabel > > + > > +description: > > + The MediaTek MDP RDMA stands for Read Direct Memory Access. > > + It provides real time data to the back-end panel driver, such as > > DSI, > > + DPI and DP_INTF. > > + It contains one line buffer to store the sufficient pixel data. > > + RDMA device node must be siblings to the central MMSYS_CONFIG > > node. > > + For a description of the MMSYS_CONFIG binding, see > > + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya > > ml for details. > > + > > +properties: > > + compatible: > > + oneOf: > > oneOf is not needed > > > + - items: > > items not needed, you have only one item. > Hello Krzysztof, Thanks for your review. ok, we will drop them. > > + - const: mediatek,mt8195-vdo1-rdma > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + maxItems: 1 > > + > > + power-domains: > > + description: A phandle and PM domain specifier as defined by > > bindings of > > + the power controller specified by phandle. See > > + Documentation/devicetree/bindings/power/power-domain.yaml > > for details. > > Skip description, it's obvious. Instead maxItems. > ok, we will fix it. > > + > > + clocks: > > + items: > > + - description: RDMA Clock > > + > > + iommus: > > + description: > > + This property should point to the respective IOMMU block > > with master port as argument, > > + see > > Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for > > details. > > Skip description, it's obvious. Instead maxItems. > ok, we will fix it. > > + > > + mediatek,gce-client-reg: > > + description: > > + The register of display function block to be set by gce. > > There are 4 arguments, > > + such as gce node, subsys id, offset and register size. The > > subsys id that is > > + mapping to the register of display function blocks is > > defined in the gce header > > + include/include/dt-bindings/gce/-gce.h of each chips. > > Double "include" in the path. ok, we will fix it. > > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + items: > > + items: > > + - description: phandle of GCE > > + - description: GCE subsys id > > + - description: register offset > > + - description: register size > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - power-domains > > + - clocks > > + - iommus > > + - mediatek,gce-client-reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include > > + #include > > + #include > > + #include > > + #include > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + vdo1_rdma0: mdp-rdma@1c104000 { > > Generic node name. dma-controller (if it does not conflict with > dma-common.yaml schema)? We don't understand what dma-controller you are referring to? Can you help explain more? Thanks! BRs, Rex > > > + compatible = "mediatek,mt8195-vdo1-rdma"; > > + reg = <0 0x1c104000 0 0x1000>; > > + interrupts = ; > > + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; > > + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; > > + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; > > + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX > > 0x4000 0x1000>; > > + }; > > + }; > > > Best regards, > Krzysztof