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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Wenbin Yao (Consultant)" <quic_wenbyao@quicinc.com>,
	Bartosz Golaszewski <brgl@bgdev.pl>
Cc: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, catalin.marinas@arm.com,
	will@kernel.org, quic_qianyu@quicinc.com, sfr@canb.auug.org.au,
	linux-arm-kernel@lists.infradead.org,
	Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH v1 1/3] arm64: defconfig: enable PCI Power Control for PCIe3
Date: Mon, 24 Mar 2025 08:38:34 +0100	[thread overview]
Message-ID: <fbd5c153-b73a-4dbc-a923-4e3d3924e748@kernel.org> (raw)
In-Reply-To: <9ea8fe39-b818-403b-bd69-815e58eb2949@quicinc.com>

On 24/03/2025 08:09, Wenbin Yao (Consultant) wrote:
> On 3/21/2025 5:43 PM, Bartosz Golaszewski wrote:
>> On Fri, Mar 21, 2025 at 8:37 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>>> On 20/03/2025 06:55, Wenbin Yao wrote:
>>>> From: Qiang Yu <quic_qianyu@quicinc.com>
>>>>
>>>> Enable the pwrctrl driver, which is utilized to manage the power supplies
>>>> of the devices connected to the PCI slots. This ensures that the voltage
>>>> rails of the x8 PCI slots on the X1E80100 - QCP can be correctly turned
>>>> on/off if they are described under PCIe port device tree node.
>>>>
>>>> Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
>>>> Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com>
>>>> ---
>>>>   arch/arm64/configs/defconfig | 1 +
>>>>   1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
>>>> index 85ec2fba1..de86d1121 100644
>>>> --- a/arch/arm64/configs/defconfig
>>>> +++ b/arch/arm64/configs/defconfig
>>>> @@ -245,6 +245,7 @@ CONFIG_PCIE_LAYERSCAPE_GEN4=y
>>>>   CONFIG_PCI_ENDPOINT=y
>>>>   CONFIG_PCI_ENDPOINT_CONFIGFS=y
>>>>   CONFIG_PCI_EPF_TEST=m
>>>> +CONFIG_PCI_PWRCTL_SLOT=y
>>> Bartosz,
>>>
>>> Wasn't the intention to select it the same way as PCI_PWRCTL_PWRSEQ is
>>> selected?
>>>
>>> Best regards,
>>> Krzysztof
>>>
>> For sure. I would expect there to be something like:
>>
>> select PCI_PWRCTL_SLOT if ARCH_QCOM
>>
>> in Kconfig and nothing in defconfig.
>>
>> Bartosz
> 
> IIUC, pci slot power driver is a common driver that could be used by all DT
> based platform.


You are not responding to the raised problem.

Best regards,
Krzysztof

  reply	other threads:[~2025-03-24  7:38 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-20  5:54 [PATCH v1 0/3] arm64: qcom: x1e80100-qcp: Add power supply and sideband signals config for PCIe3 Wenbin Yao
2025-03-20  5:55 ` [PATCH v1 1/3] arm64: defconfig: enable PCI Power Control " Wenbin Yao
2025-03-20 22:01   ` Bryan O'Donoghue
2025-03-24  6:55     ` Wenbin Yao (Consultant)
2025-03-21  7:36   ` Krzysztof Kozlowski
2025-03-21  9:43     ` Bartosz Golaszewski
2025-03-24  7:09       ` Wenbin Yao (Consultant)
2025-03-24  7:38         ` Krzysztof Kozlowski [this message]
2025-03-26  2:24           ` Wenbin Yao (Consultant)
2025-03-20  5:55 ` [PATCH v1 2/3] arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3 Wenbin Yao
2025-03-20 22:06   ` Bryan O'Donoghue
2025-03-24  6:51     ` Wenbin Yao (Consultant)
2025-03-21 17:19   ` Dmitry Baryshkov
2025-03-24  7:11     ` Wenbin Yao (Consultant)
2025-03-20  5:55 ` [PATCH v1 3/3] arm64: dts: qcom: x1e80100-qcp: Add power control and sideband signals for PCIe3 Wenbin Yao
2025-03-20 22:08   ` Bryan O'Donoghue
2025-03-24  7:21     ` Wenbin Yao (Consultant)
2025-03-21  7:39   ` Krzysztof Kozlowski
2025-03-24  7:13     ` Wenbin Yao (Consultant)

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