[PATCH v2 0/6] iio: adc: ad4080: add support for AD4082, AD4085 and AD4088

[PATCH v2 0/6] iio: adc: ad4080: add support for AD4082, AD4085 and AD4088

[Antoniu Miclaus]

Add support for AD4082, AD4085 and AD4088 SAR ADCs to the existing
ad4080 driver:

- AD4082: 20-bit SAR ADC with LVDS CNV clock count max of 8
- AD4085: 16-bit SAR ADC with LVDS CNV clock count max of 8
- AD4088: 14-bit SAR ADC with LVDS CNV clock count max of 8

These devices share the same register map as AD4080 but differ in
resolution and LVDS CNV clock count maximum values.

Changes in v2:
  - No functional changes.
  - Dropped redundant Changes sections from driver commit messages.
  - Collected Reviewed-by tags.

Antoniu Miclaus (6):
  dt-bindings: iio: adc: adi,ad4080: add support for AD4082
  iio: adc: ad4080: add support for AD4082
  dt-bindings: iio: adc: adi,ad4080: add support for AD4085
  iio: adc: ad4080: add support for AD4085
  dt-bindings: iio: adc: adi,ad4080: add support for AD4088
  iio: adc: ad4080: add support for AD4088

 .../bindings/iio/adc/adi,ad4080.yaml          |  3 ++
 drivers/iio/adc/ad4080.c                      | 45 +++++++++++++++++++
 2 files changed, 48 insertions(+)

-- 
2.43.0

[PATCH v2 1/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4082

[Antoniu Miclaus]

Add device tree binding support for the AD4082 20-bit SAR ADC.
Add adi,ad4082 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4082 has a different LVDS CNV clock count maximum (8 vs 7), requiring
different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
No changes since v1.

 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index ccd6a0ac1539..eeabf99f9a12 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -27,6 +27,7 @@ properties:
     enum:
       - adi,ad4080
       - adi,ad4081
+      - adi,ad4082
       - adi,ad4083
       - adi,ad4084
       - adi,ad4086
-- 
2.43.0

[PATCH v2 2/6] iio: adc: ad4080: add support for AD4082

[Antoniu Miclaus]

Add support for AD4082 20-bit SAR ADC. The AD4082 has the same
resolution as AD4080 (20-bit) but differs in LVDS CNV clock count
maximum (8 vs 7).

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
Changes in v2:
  - Dropped redundant Changes section from commit body.

 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cf3b6ed7940..7cbbe284dea7 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -127,6 +127,7 @@
 #define AD4080_SPI_READ						BIT(7)
 #define AD4080_CHIP_ID						0x0050
 #define AD4081_CHIP_ID						0x0051
+#define AD4082_CHIP_ID						0x0052
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
 #define AD4086_CHIP_ID						0x0056
@@ -442,6 +443,8 @@ static const struct iio_chan_spec ad4080_channel = AD4080_CHANNEL_DEFINE(20, 32)
 
 static const struct iio_chan_spec ad4081_channel = AD4080_CHANNEL_DEFINE(20, 32);
 
+static const struct iio_chan_spec ad4082_channel = AD4080_CHANNEL_DEFINE(20, 32);
+
 static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
@@ -470,6 +473,16 @@ static const struct ad4080_chip_info ad4081_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4082_chip_info = {
+	.name = "ad4082",
+	.product_id = AD4082_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4082_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static const struct ad4080_chip_info ad4083_chip_info = {
 	.name = "ad4083",
 	.product_id = AD4083_CHIP_ID,
@@ -666,6 +679,7 @@ static int ad4080_probe(struct spi_device *spi)
 static const struct spi_device_id ad4080_id[] = {
 	{ "ad4080", (kernel_ulong_t)&ad4080_chip_info },
 	{ "ad4081", (kernel_ulong_t)&ad4081_chip_info },
+	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
@@ -677,6 +691,7 @@ MODULE_DEVICE_TABLE(spi, ad4080_id);
 static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4080", &ad4080_chip_info },
 	{ .compatible = "adi,ad4081", &ad4081_chip_info },
+	{ .compatible = "adi,ad4082", &ad4082_chip_info },
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
-- 
2.43.0

[PATCH v2 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Antoniu Miclaus]

Add device tree binding support for the AD4085 16-bit SAR ADC.
Add adi,ad4085 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
No changes since v1.

 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index eeabf99f9a12..106267aee195 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -30,6 +30,7 @@ properties:
       - adi,ad4082
       - adi,ad4083
       - adi,ad4084
+      - adi,ad4085
       - adi,ad4086
       - adi,ad4087
 
-- 
2.43.0

[PATCH v2 4/6] iio: adc: ad4080: add support for AD4085

[Antoniu Miclaus]

Add support for AD4085 16-bit SAR ADC. The AD4085 has the same
resolution as AD4084 (16-bit) but differs in LVDS CNV clock count
maximum (8 vs 2).

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
Changes in v2:
  - Dropped redundant Changes section from commit body.

 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 7cbbe284dea7..728df626f09e 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -130,6 +130,7 @@
 #define AD4082_CHIP_ID						0x0052
 #define AD4083_CHIP_ID						0x0053
 #define AD4084_CHIP_ID						0x0054
+#define AD4085_CHIP_ID						0x0055
 #define AD4086_CHIP_ID						0x0056
 #define AD4087_CHIP_ID						0x0057
 
@@ -449,6 +450,8 @@ static const struct iio_chan_spec ad4083_channel = AD4080_CHANNEL_DEFINE(16, 16)
 
 static const struct iio_chan_spec ad4084_channel = AD4080_CHANNEL_DEFINE(16, 16);
 
+static const struct iio_chan_spec ad4085_channel = AD4080_CHANNEL_DEFINE(16, 16);
+
 static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16);
 
 static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
@@ -503,6 +506,16 @@ static const struct ad4080_chip_info ad4084_chip_info = {
 	.lvds_cnv_clk_cnt_max = 2,
 };
 
+static const struct ad4080_chip_info ad4085_chip_info = {
+	.name = "ad4085",
+	.product_id = AD4085_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4085_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static const struct ad4080_chip_info ad4086_chip_info = {
 	.name = "ad4086",
 	.product_id = AD4086_CHIP_ID,
@@ -682,6 +695,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4082", (kernel_ulong_t)&ad4082_chip_info },
 	{ "ad4083", (kernel_ulong_t)&ad4083_chip_info },
 	{ "ad4084", (kernel_ulong_t)&ad4084_chip_info },
+	{ "ad4085", (kernel_ulong_t)&ad4085_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
 	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
 	{ }
@@ -694,6 +708,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4082", &ad4082_chip_info },
 	{ .compatible = "adi,ad4083", &ad4083_chip_info },
 	{ .compatible = "adi,ad4084", &ad4084_chip_info },
+	{ .compatible = "adi,ad4085", &ad4085_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
 	{ .compatible = "adi,ad4087", &ad4087_chip_info },
 	{ }
-- 
2.43.0

[PATCH v2 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4088

[Antoniu Miclaus]

Add device tree binding support for the AD4088 14-bit SAR ADC.
Add adi,ad4088 to the compatible enum.

A fallback compatible string to adi,ad4080 is not appropriate as the
AD4088 has a different LVDS CNV clock count maximum (8 vs 7), requiring
different driver configuration.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
No changes since v1.

 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
index 106267aee195..79df2696ef24 100644
--- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
@@ -33,6 +33,7 @@ properties:
       - adi,ad4085
       - adi,ad4086
       - adi,ad4087
+      - adi,ad4088
 
   reg:
     maxItems: 1
-- 
2.43.0

[PATCH v2 6/6] iio: adc: ad4080: add support for AD4088

[Antoniu Miclaus]

Add support for AD4088 14-bit SAR ADC. The AD4088 has the same
resolution as AD4087 (14-bit) but differs in LVDS CNV clock count
maximum (8 vs 1).

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
---
Changes in v2:
  - Dropped redundant Changes section from commit body.

 drivers/iio/adc/ad4080.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/iio/adc/ad4080.c b/drivers/iio/adc/ad4080.c
index 728df626f09e..fc261d3d7687 100644
--- a/drivers/iio/adc/ad4080.c
+++ b/drivers/iio/adc/ad4080.c
@@ -133,6 +133,7 @@
 #define AD4085_CHIP_ID						0x0055
 #define AD4086_CHIP_ID						0x0056
 #define AD4087_CHIP_ID						0x0057
+#define AD4088_CHIP_ID						0x0058
 
 #define AD4080_LVDS_CNV_CLK_CNT_MAX				7
 
@@ -456,6 +457,8 @@ static const struct iio_chan_spec ad4086_channel = AD4080_CHANNEL_DEFINE(14, 16)
 
 static const struct iio_chan_spec ad4087_channel = AD4080_CHANNEL_DEFINE(14, 16);
 
+static const struct iio_chan_spec ad4088_channel = AD4080_CHANNEL_DEFINE(14, 16);
+
 static const struct ad4080_chip_info ad4080_chip_info = {
 	.name = "ad4080",
 	.product_id = AD4080_CHIP_ID,
@@ -536,6 +539,16 @@ static const struct ad4080_chip_info ad4087_chip_info = {
 	.lvds_cnv_clk_cnt_max = 1,
 };
 
+static const struct ad4080_chip_info ad4088_chip_info = {
+	.name = "ad4088",
+	.product_id = AD4088_CHIP_ID,
+	.scale_table = ad4080_scale_table,
+	.num_scales = ARRAY_SIZE(ad4080_scale_table),
+	.num_channels = 1,
+	.channels = &ad4088_channel,
+	.lvds_cnv_clk_cnt_max = 8,
+};
+
 static int ad4080_setup(struct iio_dev *indio_dev)
 {
 	struct ad4080_state *st = iio_priv(indio_dev);
@@ -698,6 +711,7 @@ static const struct spi_device_id ad4080_id[] = {
 	{ "ad4085", (kernel_ulong_t)&ad4085_chip_info },
 	{ "ad4086", (kernel_ulong_t)&ad4086_chip_info },
 	{ "ad4087", (kernel_ulong_t)&ad4087_chip_info },
+	{ "ad4088", (kernel_ulong_t)&ad4088_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(spi, ad4080_id);
@@ -711,6 +725,7 @@ static const struct of_device_id ad4080_of_match[] = {
 	{ .compatible = "adi,ad4085", &ad4085_chip_info },
 	{ .compatible = "adi,ad4086", &ad4086_chip_info },
 	{ .compatible = "adi,ad4087", &ad4087_chip_info },
+	{ .compatible = "adi,ad4088", &ad4088_chip_info },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad4080_of_match);
-- 
2.43.0

Re: [PATCH v2 1/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4082

[Conor Dooley]

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Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

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Re: [PATCH v2 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1244 bytes --]

On Fri, Feb 13, 2026 at 04:46:24PM +0200, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4085 16-bit SAR ADC.
> Add adi,ad4085 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the

Is citing 4080 a copy-paste mistake here? I assume you mean to reference
a different device in each of these three patches, each matching a
different accuracy?

> AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> No changes since v1.
> 
>  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> index eeabf99f9a12..106267aee195 100644
> --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> @@ -30,6 +30,7 @@ properties:
>        - adi,ad4082
>        - adi,ad4083
>        - adi,ad4084
> +      - adi,ad4085
>        - adi,ad4086
>        - adi,ad4087
>  
> -- 
> 2.43.0
> 

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Re: [PATCH v2 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4088

[Conor Dooley]

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On Fri, Feb 13, 2026 at 04:46:26PM +0200, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4088 14-bit SAR ADC.
> Add adi,ad4088 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the
> AD4088 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.

Same here, as your driver patch says:
|Add support for AD4088 14-bit SAR ADC. The AD4088 has the same
|resolution as AD4087 (14-bit) but differs in LVDS CNV clock count
|maximum (8 vs 1).

> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> No changes since v1.
> 
>  Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> index 106267aee195..79df2696ef24 100644
> --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> @@ -33,6 +33,7 @@ properties:
>        - adi,ad4085
>        - adi,ad4086
>        - adi,ad4087
> +      - adi,ad4088
>  
>    reg:
>      maxItems: 1
> -- 
> 2.43.0
> 

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Re: [PATCH v2 3/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4085

[Krzysztof Kozlowski]

On Fri, Feb 13, 2026 at 04:46:24PM +0200, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4085 16-bit SAR ADC.
> Add adi,ad4085 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the
> AD4085 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> No changes since v1.

So you just ignored entire feedback?

NAK

Best regards,
Krzysztof

Re: [PATCH v2 1/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4082

[Krzysztof Kozlowski]

On 13/02/2026 15:46, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4082 20-bit SAR ADC.
> Add adi,ad4082 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the
> AD4082 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> No changes since v1.
> 

You ignored feedback and never responded to it.

Best regards,
Krzysztof

Re: [PATCH v2 5/6] dt-bindings: iio: adc: adi,ad4080: add support for AD4088

[Krzysztof Kozlowski]

On 13/02/2026 15:46, Antoniu Miclaus wrote:
> Add device tree binding support for the AD4088 14-bit SAR ADC.
> Add adi,ad4088 to the compatible enum.
> 
> A fallback compatible string to adi,ad4080 is not appropriate as the
> AD4088 has a different LVDS CNV clock count maximum (8 vs 7), requiring
> different driver configuration.
> 
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
> ---
> No changes since v1.

Not really acceptable. You ignored feedback and never responded to it.

Best regards,
Krzysztof