From: "Nuno Sá" <noname.nuno@gmail.com>
To: Andy Shevchenko <andy@kernel.org>
Cc: Nuno Sa <nuno.sa@analog.com>,
linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org,
devicetree@vger.kernel.org, Bartosz Golaszewski <brgl@bgdev.pl>,
Jonathan Corbet <corbet@lwn.net>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Linus Walleij <linus.walleij@linaro.org>,
Guenter Roeck <linux@roeck-us.net>,
Rob Herring <robh+dt@kernel.org>,
Jean Delvare <jdelvare@suse.com>,
Conor Dooley <conor+dt@kernel.org>
Subject: Re: [PATCH 2/2] hwmon: ltc4282: add support for the LTC4282 chip
Date: Tue, 14 Nov 2023 09:36:07 +0100 [thread overview]
Message-ID: <fc3304423a57ca8acb40ecf8d2fb641aa280a8c1.camel@gmail.com> (raw)
In-Reply-To: <ZVJPbV2469kjqbHu@smile.fi.intel.com>
On Mon, 2023-11-13 at 18:31 +0200, Andy Shevchenko wrote:
> On Mon, Nov 13, 2023 at 11:13:44AM +0100, Nuno Sá wrote:
> > On Fri, 2023-11-10 at 18:50 +0200, Andy Shevchenko wrote:
> > > On Fri, Nov 10, 2023 at 04:18:46PM +0100, Nuno Sa wrote:
>
> ...
>
> > > > +/*
> > > > + * relaxed version of FIELD_PREP() to be used when mask is not a
> > > > compile
> > > > time constant
> > > > + * u32_encode_bits() can't also be used as the compiler needs to be
> > > > able to
> > > > evaluate
> > > > + * mask at compile time.
> > > > + */
> > > > +#define LTC4282_FIELD_PREP(m, v) (((v) << (ffs(m) - 1)) & (m))
> > >
> > > Can we name it accordingly as done in other places, and TBH it's a time to
> > > move
> > > it to the header. (At least I know about two more implementations of
> > > this).
> >
> > Not sure what you mean? Is there some other drivers doing it already? I'll,
> > anyways, wait on more feedback for the GPIO stuff because we might end up
> > not
> > needing it...
>
> $ git grep -n 'define field_prep'
>
> ...
>
> > > > + /* GPIO_2,3 and the ALERT pin require setting the bit to 1 to
> > > > pull
> > > > down the line */
> > > > + if (!gpio->active_high)
> > >
> > > Hmm... Why do you need a separate flag for this? Shouldn't be described or
> > > autodetected somehow?
> >
> > Well, if a consumer as an active high gpio, it expects to call
> > gpiod_set_value(..., 1) and the line to assert, right? To have that, we need
> > to
> > write 0 on the device register for some of the pins.
>
> It doesn't matter, the GPIO (not _raw) APIs are using logical levels, 1 —
> activate,
> 0 — deactivate.
>
> > And the same story is true for active low. gpiod_set_value(..., 0) will have
> > the
> > gpiolib to automatically invert the value and we get 1 in the callback.
>
> Yes, but why do you have that flag in the structure?
Because one of the pins (GPIO_1) has the opposite behavior...
>
> > > > + val = !val;
>
> ...
>
> > > > + *val = DIV_ROUND_CLOSEST_ULL(be16_to_cpu(in) * (u64)fs,
> > > > U16_MAX);
> > >
> > > I'm wondering if you can do some trick to "divide" actually to 2^16 so, it
> > > will
> > > not use division op at all?
> >
> > Hmm, not sure if it will be obvious but you mean something like:
> >
> > *val = (be16_to_cpu(in) * (u64)fs) >> 16;
> >
> > Is this what you mean? If so, we`ll loose the "CLOSEST" handling... Not so
> > sure
> > if we need to be "that" performant in such a code path. But Guenter can also
> > share his opinion...
>
> *val = DIV_ROUND_CLOSEST_ULL(be16_to_cpu(in) * (u64)fs + (BIT(16) -
> 1), BIT(16));
>
> will give the same result without division, no?
> What you need is to make sure that the multiplication won't get closer to
> U64_MAX, which seems not the case here (max 48-bit number).
Hmm, I must be missing something but you're still using DIV_ROUND_CLOSEST_ULL().
So, I guess you're rely on some formula optimization that removes the division
(I'm honestly seeing it) but the result won't be exactly the same (off by 1).
Again, this is not a fast path (AFAIK) and this is a typical formula to get a
value from an ADC so I'm not sure making any super "smart" tricks to make this
run faster beats readability.
But, I'm still not seeing what you mean so I might change my mind...
>
> Ditto for all other similar cases which I already pointed out.
>
> ...
>
> > > > + u64 temp = DECA * 40ULL * st->vfs_out * 1 << 16, temp_2;
>
> > >
> > > "* BIT(16)" / "* BIT_ULL(16)" ?
> >
> > Well, I can just place the number as in the formula. Not too keen on the
> > BIT()
> > macros as this is not really a mask.
>
> I'm not sure I got this. The << 16 neither a plain number and BIT() is equally
Well, I do agree with << 16 part...
> good. With power of two it's most likely that this is due to internal
> implementation of the firmware or hardware, so again BIT() can be still good
> enough to show that.
>
I'm still not convinced honestly... I see plain numbers to be a good fit and
they match exactly with the DS. I just see things like BIT(), GENMASK, BITMAP
and the likes to be used on masks.
But I don't really care so unless Guenter has some opinion I can make as you
suggest...
- Nuno Sá
next prev parent reply other threads:[~2023-11-14 8:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-10 15:18 [PATCH 0/2] Add support for LTC4282 Nuno Sa
2023-11-10 15:18 ` [PATCH 1/2] dt-bindings: hwmon: Add LTC4282 bindings Nuno Sa
2023-11-10 18:42 ` Conor Dooley
2023-11-13 9:32 ` Nuno Sá
2023-11-13 20:12 ` Conor Dooley
2023-11-20 15:03 ` Guenter Roeck
2023-11-10 15:18 ` [PATCH 2/2] hwmon: ltc4282: add support for the LTC4282 chip Nuno Sa
2023-11-10 16:50 ` Andy Shevchenko
2023-11-13 10:13 ` Nuno Sá
2023-11-13 16:31 ` Andy Shevchenko
2023-11-14 8:36 ` Nuno Sá [this message]
2023-11-20 15:00 ` Guenter Roeck
2023-11-11 1:04 ` kernel test robot
2023-11-11 17:22 ` Guenter Roeck
2023-11-13 9:24 ` Nuno Sá
2023-11-20 12:10 ` Dan Carpenter
2023-11-20 14:52 ` Guenter Roeck
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