Re: [PATCH v2 2/4] arm64: dts: qcom: qcs8300: add support for video node

[Vikash Garodia <quic_vgarodia@quicinc.com>]

On 4/18/2025 3:57 PM, Bryan O'Donoghue wrote:
> On 18/04/2025 07:28, Vikash Garodia wrote:
>> Video node enables video on Qualcomm QCS8300 platform.
> 
> Add the IRIS video-codec node on QCS8300.
Ok.
> 
>> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs8300.dtsi | 71 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 71 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> index
>> 4a057f7c0d9fae0ebd1b3cf3468746b382bc886b..158779434f610b10ea82d2cdae08090a7a4402de 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>> @@ -2929,6 +2929,77 @@ usb_2_dwc3: usb@a400000 {
>>               };
>>           };
>>   +        iris: video-codec@aa00000 {
>> +            compatible = "qcom,qcs8300-iris";
>> +
>> +            reg = <0x0 0x0aa00000 0x0 0xf0000>;
>> +            interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> +            power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
>> +                    <&videocc VIDEO_CC_MVS0_GDSC>,
>> +                    <&rpmhpd RPMHPD_MX>,
>> +                    <&rpmhpd RPMHPD_MMCX>;
>> +            power-domain-names = "venus",
>> +                         "vcodec0",
>> +                         "mxc",
>> +                         "mmcx";
>> +
>> +            operating-points-v2 = <&iris_opp_table>;
>> +
>> +            clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
>> +                 <&videocc VIDEO_CC_MVS0C_CLK>,
>> +                 <&videocc VIDEO_CC_MVS0_CLK>;
>> +            clock-names = "iface",
>> +                      "core",
>> +                      "vcodec0_core";
>> +
>> +            interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
>> +                     &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
>> +                    <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
>> +                     &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
>> +            interconnect-names = "cpu-cfg",
>> +                         "video-mem";
>> +
>> +            memory-region = <&video_mem>;
>> +
>> +            resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
>> +            reset-names = "bus";
>> +
>> +            iommus = <&apps_smmu 0x0880 0x0400>,
>> +                 <&apps_smmu 0x0887 0x0400>;
>> +            dma-coherent;
>> +
>> +            status = "disabled";
>> +
>> +            iris_opp_table: opp-table {
>> +                compatible = "operating-points-v2";
>> +
>> +                opp-366000000 {
>> +                    opp-hz = /bits/ 64 <366000000>;
>> +                    required-opps = <&rpmhpd_opp_svs_l1>,
>> +                            <&rpmhpd_opp_svs_l1>;
>> +                };
>> +
>> +                opp-444000000 {
>> +                    opp-hz = /bits/ 64 <444000000>;
>> +                    required-opps = <&rpmhpd_opp_nom>,
>> +                            <&rpmhpd_opp_nom>;
>> +                };
>> +
>> +                opp-533333334 {
>> +                    opp-hz = /bits/ 64 <533333334>;
>> +                    required-opps = <&rpmhpd_opp_turbo>,
>> +                            <&rpmhpd_opp_turbo>;
>> +                };
>> +
>> +                opp-560000000 {
>> +                    opp-hz = /bits/ 64 <560000000>;
>> +                    required-opps = <&rpmhpd_opp_turbo_l1>,
>> +                            <&rpmhpd_opp_turbo_l1>;
>> +                };
>> +            };
>> +        };
>> +
>>           videocc: clock-controller@abf0000 {
>>               compatible = "qcom,qcs8300-videocc";
>>               reg = <0x0 0x0abf0000 0x0 0x10000>;
>>
> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>